JPH0653605A - Manufacture of semiconductor laser device - Google Patents

Abstract

PURPOSE:To provide a manufacturing method for a buried type semiconductor laser high in mating accuracy between a contact layer and an electrode. CONSTITUTION:In a semiconductor laser device, where the semiconductor layers of, at least, a first clad layer 2, an active layer 4 sandwiched by optical waveguide layers 3, and a second clad layer 5 are stacked in order on a semiconductor substrate 1, and Si diffusion source film 7, an insulating film 8, and an etching blocking film 9 are overlaid thereon before diffusing Si onto a semiconductor laser, and then the layers 7-9 are removed excluding the region where Si is diffused. And, a mixedly crystallized area 14 is formed by opening a window for thermally diffusing Si from the Si diffusion source film 7, and diffusing Si selectively from this window. And, with the three 7-9 as masks, zn is diffused to form favorable ohmic contact area 15. Since the three layers 7-9 are used as the current blocking layer as they are, the photolithography process for providing a current blocking layer anew becomes needless.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method of manufacturing an embedded semiconductor laser device.

[0002]

2. Description of the Related Art Conventionally, in the fabrication of a semiconductor laser having a buried structure using mixed crystal formation by impurity diffusion, FIG.
The method shown in FIG. 9 and the method shown in FIGS. 10 to 14 are known. First, the method (Appl. Phys. Let) shown in FIGS.
t., Vol.47 (1985), p. 1239). Si
Se-doped Al _0.6 on the doped n-type GaAs substrate 11.
1 μm thick n-type lower cladding layer 1 made of Ga _0.4 As
2. Non-doped Al _0.3 Ga _0.7 As thickness 0.1μ
m optical waveguide layer 13, thickness 10 made of non-doped GaAs
nm active layer 14 and non-doped Al _0.3 Ga _0.7 As optical waveguide layer 13 with a thickness of 0.1 μm (optical waveguide layer 13 in the figure
And the active layer 14 are shown in the same layer. ), Mg-doped Al _0.6
1 μm thick p-type upper cladding layer 1 made of Ga _0.4 As
5. A 0.1 μm thick p-type contact layer 16 made of Mg-doped GaAs is sequentially laminated by MOCVD (FIG. 6A).

On the wafer having this laser structure, an S film having a thickness of 0.1 μm was formed by RF sputtering as an impurity diffusion blocking film.
After depositing the i ₃ N ₄ film 17 (FIG. 6A), a stripe of a resist 18 having a width of 5 μm is formed thereon by the first photolithography process (FIG. 6B), and the resist 18 is used as a mask. As a result, the Si ₃ N ₄ film 17 is etched with buffered hydrofluoric acid to form a stripe-shaped Si ₃ N ₄ film 17 having a width of about 5 μm on the wafer (FIG. 6).
(C)). After removing the resist 18 with an organic solvent (FIG. 7A), S which is a first impurity diffusion source is formed on the resist 18.
The i film 19 is deposited on the entire surface with a thickness of 10 nm by an electron beam heating vapor deposition device, and SiO ₂ which is a diffusion protection film is formed on the i film 19.
The film 20 is deposited on the entire surface with a thickness of 50 nm by RF sputtering (FIG. 7B). This is sealed in a quartz tube together with arsenic and then heat-treated at 850 ° C. for 2 hours in an electric furnace, so that Si reaches the lower clad layer 12 in a region not covered with the Si ₃ N ₄ film 17. Diffuse up to (Fig. 7
(C)). As a result, in the region 21 in which Si is diffused, a mixed crystal is generated between the cladding layers 12 and 15, the optical waveguide layer 13 and the active layer 14, and a region where no mixed crystal is generated is buried as an active region.

After that, by dry etching using CF ₄ gas, a SiO ₂ film 20 as a diffusion protection film, a Si film 19 as a diffusion source, and a Si ₃ N ₄ film 17 as a diffusion block film.
Was removed (Fig. 8 (a)), and this was sealed again in a quartz tube together with zinc and arsenic, and heat-treated at 550 ° C for 20 minutes in an electric furnace, and the second surface layer was formed to a depth of 0.1 µm. Zn, which is an impurity of the above, is diffused to form a Zn diffusion region (hatched portion) 22 (FIG. 8B). As a result, the p-type carrier concentration of the p-type contact layer 16 in the region where Si is not diffused increases, so that a good ohmic contact can be formed. Further, a pn junction is formed in the upper clad layer 15 which has become n-type due to the diffusion of Si. Since the turn-on voltage of the pn junction in the upper clad layer 15 is higher than the turn-on voltage of the active layer 14 in the active region, the current passing through the Si-diffused region 21 is suppressed.

Next, in order to form an n-side electrode that contacts the p-type contact layer 16 in the region where Si is not diffused, a SiO ₂ film 23 and a striped resist 24 are formed by a conventional method (see FIG. 8). (C), (d)), resist 24
The SiO ₂ film 23 was etched using the mask as a mask (FIG. 9).
After (a) and (b), the p-side electrode 25 is formed (FIG. 9).
(C)). Further, the n-type electrode 26 is also formed.

According to the method shown in FIGS. 6 to 9, the transmission current density at the pn junction of the impurity diffusion region 21 is smaller than that of the active layer 14, but p is spread over all regions where Si is diffused. Since the -n junction is formed,
The total current passing through this is a non-negligible amount.

Therefore, in order to reduce the pn junction region in the upper clad layer 15 of the above method, a method of selectively diffusing the second impurity using the Si film 19 which is the first impurity diffusion film as a mask is Appl. ． Phys. Let
t. , Vol, 57 (1990), 2534-253.
It is shown on page 6. This method will be described with reference to FIGS. Here, Si is formed on the n-type GaAs substrate 31.
Doped GaAs buffer layer (not shown), Si-doped A
l _x Ga _1-x As graded buffer layer (not shown),
Si-doped Al _0.7 Ga _0.3 As cladding layer 32, undoped quantum well active layer 33, Be-doped Al _0.7 Ga _0.3 A
s clad layer 34, undoped GaAs contact layer 3
5 was sequentially grown by the MBE method, and a stripe of a resist 36 having a width of 6 μm was formed by the first photolithography process on this (FIG. 10 (a)).
The As contact layer 35 is etched (FIG. 10).
(B)). A Si film 37 serving as an impurity diffusion source film is deposited thereon for 200 .ANG. (FIG. 10C), and then the resist 36 and the Si film 37 on the resist 36 are removed by lift-off (FIG. 11A). After that, as a diffusion protection film, SiO
₂ Film 38 is deposited on 600 Å (Fig. 11 (b)), 850 ℃
The Si diffusion region 39 is formed by diffusing Si by processing for 7 hours (FIG. 11C).

Then, the SiO ₂ film 38 which is a diffusion protection film is removed by buffered hydrofluoric acid (FIG. 12A).
Zn is diffused using the Si film 37, which is the impurity diffusion source layer, as a mask to form a Zn diffusion region (hatched portion) 40 (FIG. 12B). Then, a SiO ₂ film 41 as a current blocking film is deposited to 1000 Å (FIG. 12C), and a striped resist 42 is formed so as to open the Zn diffusion region 40 (FIG. 13A). Then, a window of 3 μm width is formed on the Zn diffusion region 40 on the contact layer 35 of 6 μm by the second photolithography process (FIG. 13).
(B)), the resist 42 is removed (FIG. 13C).
Then, a p-type electrode 43 and an n-type electrode 44 are formed (see FIG. 1).
4).

[0009]

In the fabrication of the conventional semiconductor laser described above, the surface of the semiconductor in which Si is diffused has the GaAs contact layers 16 and 35 and the AlGaAs layer 1.
Mutual diffusion occurs between 2, 13, 15, 32, and 34 A
lGaAs mixed crystal. Generally, the AlGaAs layer is Ga
Since a good ohmic contact is less likely to be formed than the As layer, the GaAs contact layers 16 and 35, which are non-diffusion regions of impurities, and the n-type electrodes 25 and 43 must be in contact with each other in order to effectively inject current. . Therefore, the window region where the SiO ₂ films 23 and 41 for current injection is etched has a thickness of 3 μm in which impurities are not diffused.
Alignment accuracy is required in the first and second photolithography so that it overlaps the stripe-shaped GaAs contact layers 16 and 35 regions. Further, when the width of the non-diffused region of impurities is narrowed to reduce the threshold value, the alignment accuracy is within 1 μm, which is very difficult. Therefore, an object of the present invention is to provide a method of manufacturing a buried type semiconductor laser with high alignment accuracy between a contact layer and an electrode.

[0010]

The above objects of the present invention can be achieved by the following constitutions. That is, in a semiconductor laser device in which a semiconductor substrate and at least a semiconductor layer of an active layer sandwiched between a first cladding layer and an optical waveguide layer and a semiconductor layer of a second cladding layer are sequentially laminated on the semiconductor substrate, Prior to diffusing the first impurity, the first impurity diffusion source film, the insulating film, and the etching stop film are deposited, and then the stripe-shaped first impurity diffusion layer is formed except for the semiconductor layer region in which the impurity is diffused. Removing the three layers of the source film, the insulating film and the etching stop film, forming a diffusion protection film on the entire surface of the semiconductor layer and the three layers, and removing impurities from the first impurity diffusion source film. Thermal diffusion, a step of selectively etching the diffusion protective film using the etching stopper film as a protective film, and a mask of the first impurity diffusion source film, the insulating film, and the etching stopper film. It is a manufacturing method of a semiconductor laser device including a step of diffusing the second impurity in.

[0011]

According to the present invention, before diffusing the first impurity, after depositing the first impurity diffusion source film, the insulating film and the etching stop film, these three layers are removed except the region where the impurity is diffused. After depositing the diffusion protection film on the entire surface, the first impurity is selectively diffused by heat treatment. After that, only the diffusion protection film is etched, the second impurity is selectively diffused using the first impurity diffusion source film, the insulating film, and the etching stop film as a mask, and these three layers are used as the current stop layer. .

According to the present invention, by patterning the first impurity diffusion source film, impurities are selectively diffused to form a mixed crystal region. Further, when the first impurity diffusion source film is patterned, the insulating film and the etching stop film are also patterned at the same time, whereby the diffusion protective film can be selectively removed after the diffusion of the first impurity, and this can be used as a mask. The second impurity can be selectively diffused in the region excluding the first impurity diffusion region. Furthermore, after the second impurity is diffused, the insulating film and the etching stop film can be used as a current stop layer, and a photolithography process for newly providing a current stop layer is unnecessary.

[0013]

Embodiments of the present invention will be described with reference to the drawings. The manufacturing process of the semiconductor laser device of this embodiment is shown in FIGS. FIG. 1 shows the structure of the semiconductor laser obtained in this example. First, Se-doped Al is deposited on the n-type GaAs substrate 1.
1 μm thick cladding layer 2 made of _0.6 Ga _0.4 As, 0.1 μm thick optical waveguide layer 3 made of undoped Al _0.3 Ga _0.7 As, 0.01 μm thick quantum well active layer 4 made of undoped GaAs, undoped Optical waveguide layer 3 made of Al _0.3 Ga _0.7 As and having a thickness of 0.1 μm (optical waveguide layer 3 and active layer 4 are shown as the same layer in the figure), Mg-doped Al _0.6 G
a 1 μm thick clad layer 5 made of a _0.4 As, and 0.1 μm thick contact layer 6 made of Mg-doped GaAs.
After sequentially stacking by the OCVD method, as shown in FIG. 2A, a Si film 7 having a thickness of 10 nm is deposited as an impurity diffusion source film by an electron beam heating vapor deposition apparatus, and then, as shown in FIG.
As shown in (b), a SiO ₂ film 8 having a thickness of 50 nm is formed as an insulating film by RF sputtering, and an SiO ₂ film 8 having a thickness of 10 nm is formed thereon as an etching stop film by an electron beam heating vapor deposition apparatus.
The Si film 9 is deposited.

After forming the resist 13 on this, FIG.
As shown in (c), the resist 13 is formed by a photolithography process.
A stripe-shaped window having a width of 5 μm is formed in the film, and the resist 13 is used as a mask to form the Si film 7 as the impurity diffusion source film, the SiO ₂ film 8 as the insulating film, and the Si as the etching stop film.
The film 9 is removed by dry etching, and a striped window is opened as shown in FIG. After that, FIG.
As shown in (b), the resist 13 is removed with acetone, rinsed with isopropyl alcohol, and washed with pure water. Then, as shown in FIG. 3 (c), the entire surface is a SiO ₂ film 10 as a diffusion protection film having a thickness of 50 nm. Then, the quartz tube is sealed with arsenic, and then heat-treated at 850 ° C. for 2 hours in an electric furnace to diffuse Si as shown in FIG.
4 is formed. Then, as shown in FIG. 4B, after heat treatment, the SiO ₂ film 10 is etched by buffered hydrofluoric acid. In this case the Si film 9 is the etching rate in comparison with the SiO ₂ film 10 is not more than one tenth, it is possible to remove the SiO ₂ film 10 is almost selectively diffused protective film. Then, as shown in FIG. 4C, the quartz tube was sealed together with zinc and arsenic, and heat-treated at 550 ° C. for 20 minutes to obtain Si.
Zn is diffused using the film 7, the SiO ₂ film 8 and the Si film 9 as a mask to form a Zn diffusion region 15. Then, as shown in FIG. 5, the p-side electrode 11 is deposited by using the Si film 7, the SiO ₂ film 8 and the Si film 9 as current blocking layers. In addition, n-type Ga
The n-side electrode 12 is deposited on the As substrate 1 side.

According to this embodiment, the GaAs contact layer 6 which is the non-diffusion region of impurities and the n-type electrode 11 are accurately contacted with each other, and the contact between the electrode and the semiconductor layer is improved. In addition, between the cladding layer 5 and the Si diffusion region 14, a p- having a larger turn-on voltage than the region of the active layer 4 is formed.
An n-junction is formed, and diffusion of current in the lateral direction is suppressed.

[0016]

According to the present invention, after diffusing the first impurity, the second impurity is diffused by using the impurity diffusion source layer, the insulating layer and the etching stop layer as a mask,
By using the insulating layer and the etching blocking layer as the current blocking layer, the pn junction region in the upper cladding layer is reduced, and the lateral current diffusion in the upper cladding layer is suppressed,
Since the current blocking layer is formed by one photolithography process, it is possible to avoid the problem of accuracy in combination.

[Brief description of drawings]

FIG. 1 is a sectional view of an embodiment of a buried semiconductor laser of the present invention.

FIG. 2 is a sectional view showing a manufacturing procedure of an embodiment of the embedded semiconductor laser of the present invention.

FIG. 3 is a cross-sectional view showing the manufacturing procedure of an embodiment of the embedded semiconductor laser of the present invention.

FIG. 4 is a cross-sectional view showing the manufacturing procedure of an embodiment of the embedded semiconductor laser of the present invention.

FIG. 5 is a cross-sectional view showing the manufacturing procedure of an embodiment of the embedded semiconductor laser of the present invention.

FIG. 6 is a cross-sectional view showing a manufacturing procedure of a first prior art embedded semiconductor laser.

FIG. 7 is a cross-sectional view showing a manufacturing procedure of a first prior art embedded semiconductor laser.

FIG. 8 is a cross-sectional view showing a manufacturing procedure of a first prior art embedded semiconductor laser.

FIG. 9 is a cross-sectional view showing a manufacturing procedure of a first prior art embedded semiconductor laser.

FIG. 10 is a cross-sectional view showing a manufacturing procedure of a second prior art embedded semiconductor laser.

FIG. 11 is a cross-sectional view showing a manufacturing procedure of a second prior art embedded semiconductor laser.

FIG. 12 is a cross-sectional view showing a manufacturing procedure of a second prior art embedded semiconductor laser.

FIG. 13 is a cross-sectional view showing a manufacturing procedure of a second prior art embedded semiconductor laser.

FIG. 14 is a cross-sectional view showing the manufacturing procedure of the second prior art embedded semiconductor laser.

[Explanation of symbols]

1 ... n-type GaAs substrate, 2 ... Se-doped Al _0.6 Ga _0.4
As clad layer, 3 ... Undoped Al _0.3 Ga _0.7 As optical waveguide layer, 4 ... Undoped GaAs quantum well active layer, 5 ...
Mg-doped Al _0.6 Ga _0.4 As cladding layer, 6 ... Mg-doped GaAs contact layer, 7 ... Si impurity diffusion source layer,
8 ... SiO ₂ insulating film, 9 ... Si etching stop film, 10
... SiO ₂ diffusion protection film, 11 ... p-side electrode, 12 ... n-side electrode, 13 ... photoresist, 14 ... Si diffusion region, 15
... Zn diffusion region

 ─────────────────────────────────────────────────── ─── Continuation of the front page (72) Inventor Hiromi Otoma 2274 Hongo, Ebina City, Kanagawa Prefecture Fuji Xerox Co., Ltd.

Claims (1)

[Claims] 1. A semiconductor laser device comprising: a semiconductor substrate; and on the semiconductor substrate, at least a first clad layer, an active layer sandwiched between an optical waveguide layer, and a semiconductor layer of a second clad layer are sequentially laminated. Before diffusing the first impurity on the semiconductor laser,
After depositing the first impurity diffusion source film, the insulating film, and the etching stopper film, the stripe-shaped first impurity diffusion source film, the insulating film, and the etching stopper film are formed except for the semiconductor layer region in which impurities are diffused. Removing the three layers, forming a diffusion protective film on the entire surface of the semiconductor layer and the three layers, thermally diffusing impurities from the first impurity diffusion source film, and the etching stopper film. And a step of selectively etching the diffusion protective film with the protective film as a protective film, and a step of diffusing the second impurity with the first impurity diffusion source film, the insulating film, and the etching stop film as a mask. Method for manufacturing semiconductor laser device.