JPH0653374A - Electronic circuit device - Google Patents

Electronic circuit device

Info

Publication number
JPH0653374A
JPH0653374A JP4201473A JP20147392A JPH0653374A JP H0653374 A JPH0653374 A JP H0653374A JP 4201473 A JP4201473 A JP 4201473A JP 20147392 A JP20147392 A JP 20147392A JP H0653374 A JPH0653374 A JP H0653374A
Authority
JP
Japan
Prior art keywords
electronic circuit
hole
circuit device
semiconductor chip
plate
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP4201473A
Other languages
Japanese (ja)
Other versions
JP3113400B2 (en
Inventor
Michifumi Kawai
通文 河合
Ryohei Sato
了平 佐藤
Kiyoshi Matsui
清 松井
Masahide Harada
正英 原田
Toshitada Nezu
利忠 根津
Mitsugi Shirai
貢 白井
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Hitachi Ltd
Original Assignee
Hitachi Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi Ltd filed Critical Hitachi Ltd
Priority to JP04201473A priority Critical patent/JP3113400B2/en
Publication of JPH0653374A publication Critical patent/JPH0653374A/en
Application granted granted Critical
Publication of JP3113400B2 publication Critical patent/JP3113400B2/en
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10Bump connectors; Manufacturing methods related thereto
    • H01L2224/15Structure, shape, material or disposition of the bump connectors after the connecting process
    • H01L2224/16Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
    • H01L2224/161Disposition
    • H01L2224/16151Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/16221Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/16225Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/31Structure, shape, material or disposition of the layer connectors after the connecting process
    • H01L2224/32Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
    • H01L2224/321Disposition
    • H01L2224/32151Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/32221Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/32225Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/73Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
    • H01L2224/732Location after the connecting process
    • H01L2224/73201Location after the connecting process on the same surface
    • H01L2224/73203Bump and layer connectors
    • H01L2224/73204Bump and layer connectors the bump connector being embedded into the layer connector
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/73Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
    • H01L2224/732Location after the connecting process
    • H01L2224/73251Location after the connecting process on different surfaces
    • H01L2224/73253Bump and layer connectors
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/83Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
    • H01L2224/8338Bonding interfaces outside the semiconductor or solid-state body
    • H01L2224/83385Shape, e.g. interlocking features
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/151Die mounting substrate
    • H01L2924/153Connection portion
    • H01L2924/1531Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface
    • H01L2924/15312Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface being a pin array, e.g. PGA

Abstract

PURPOSE:To prevent the stress from being applied to an electronic circuit part even if there is the presence of warpage of a substrate, by providing a through hole in a plate member and a filling member for directly connecting the plate member and the electronic circuit part by filling the through hole. CONSTITUTION:An electronic circuit apparatus comprises a cooling jacket 4 for cooling a semiconductor chip 2, and a plate member 3, a filling member 5 and a heat transfer board 6 for thermally connecting the semiconductor chip 2 to the cooling jacket 4. The plate member 3, the filling member 5 and heat transfer board 6 are in contact with the cooling jacket 4 through a thermal conductive grease 11, and also are in contact with the semiconductor chip 2. In this case, the plate member 3 has a through hole extending from the side of the semiconductor chip 2 to the side of the cooling jacket 4, and the through hole is installed on a mounting place of the semiconductor chip 2. Thus, an electronic circuit part can be replaced easily.

Description

【発明の詳細な説明】Detailed Description of the Invention

【0001】[0001]

【産業上の利用分野】本発明は、高集積の半導体チップ
を高密度微細接続により実装する構造に関する。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a structure for mounting a highly integrated semiconductor chip by high density fine connection.

【0002】[0002]

【従来の技術】電子計算機を高速化するためには、演算
や記憶に用いられる半導体集積回路の配線長を短くする
必要がある。そのため、半導体集積回路の高集積化が進
んでいる。この半導体集積回路の高集積化に伴い、半導
体集積回路から配線基板への入出力端子数が増加し、そ
の接続部は微細化の一途をたどっている。そのため、接
続部の強度が低下し、寿命が低くなるなどの問題が生じ
ている。
2. Description of the Related Art In order to increase the speed of an electronic computer, it is necessary to shorten the wiring length of a semiconductor integrated circuit used for calculation and storage. Therefore, high integration of semiconductor integrated circuits is progressing. Along with the high integration of this semiconductor integrated circuit, the number of input / output terminals from the semiconductor integrated circuit to the wiring board is increasing, and the connecting portion thereof is becoming finer. As a result, the strength of the connection portion is reduced, and the service life is shortened.

【0003】これに対し、半導体チップを冷却すること
により、チップと配線基板との接続部およびその他の接
続部にかかる応力・ひずみの低減および接続部の信頼性
の向上を図る技術が提案されている。例えば、特開平2
−7456号公報によれば、図7に示すように、蛇腹構
造を有するベローズ15の内部に冷却水を循環させて、
半導体チップ2に接触させることにより、半導体チップ
2を冷却する構造が開示されている。また、例えば、特
開平1−125962号公報では、図8に示ような、応
力を吸収する構造をもつダイヤフラム16を介して、冷
却水を接触させ、半導体チップ2を冷却する構造が、ま
た、特開平3−283451号公報では、図9に示すよ
うに、はんだを介して、半導体チップ2を冷却部材に接
触させて冷却する構造が開示されている。
On the other hand, there has been proposed a technique for cooling the semiconductor chip to reduce stress / strain applied to the connecting portion between the chip and the wiring board and other connecting portions and to improve the reliability of the connecting portion. There is. For example, Japanese Patent Laid-Open No.
According to Japanese Patent Publication No. 7456, as shown in FIG. 7, cooling water is circulated inside the bellows 15 having a bellows structure,
A structure is disclosed in which the semiconductor chip 2 is cooled by bringing it into contact with the semiconductor chip 2. Further, for example, in Japanese Unexamined Patent Publication No. 1-125962, a structure for cooling the semiconductor chip 2 by bringing cooling water into contact with the diaphragm 16 having a structure for absorbing stress as shown in FIG. Japanese Unexamined Patent Publication No. 3-283451 discloses a structure in which the semiconductor chip 2 is brought into contact with a cooling member via solder to cool it, as shown in FIG.

【0004】また、電子回路の高集積化により、集積回
路内の発熱密度が高まり、実装プロセス時及び実稼働時
の回路の内部温度変化や三次元温度分布からの熱膨張な
どによる変形の構造への影響が深刻な問題となってきて
いる。さらに、内部温度変化や温度分布の均一化及び発
熱密度の上昇に対応するために冷却性能の向上も重要な
課題となっている。
Further, due to the high integration of electronic circuits, the heat generation density in the integrated circuits is increased, and the structure is deformed by the internal temperature change of the circuit during the mounting process and the actual operation, or the thermal expansion from the three-dimensional temperature distribution. Is becoming a serious problem. Further, improvement of cooling performance is also an important issue in order to cope with internal temperature change, uniform temperature distribution, and increase in heat generation density.

【0005】そこで、従来の図10に示すようなくし歯
19により放熱面積を増加させ強制的に空冷するタイプ
から、図11に示すような水冷系とくし歯20による接
触で冷却するタイプや、フレオンにチップを直接浸し冷
却する液体浸漬タイプや、さらに上述の公開公報のよう
にチップをモジュールキャップにろう材もしくははんだ
で固着し水冷ジャケットに近づけ冷却する間接水冷タイ
プへ変化し、冷却性能向上のための技術の開発などが行
われている。これらの技術については、特開平2−83
957号公報に示されている。
Therefore, from the conventional type shown in FIG. 10 in which the heat dissipation area is increased by the comb teeth 19 and forced air cooling is used, to the type in which cooling is performed by contact with the water cooling system and the comb teeth 20 as shown in FIG. 11 and Freon. In order to improve the cooling performance, it is changed to a liquid immersion type in which the chip is directly dipped and cooled, or an indirect water cooling type in which the chip is fixed to the module cap with brazing material or solder and cooled close to the water cooling jacket Technology development is being carried out. For these techniques, see Japanese Patent Application Laid-Open No. 2-83.
957.

【0006】[0006]

【発明が解決しようとする課題】しかし、上記従来技術
では、十分な放熱特性を得ることと、冷却系を含めた半
導体モジュール構造体の加工性・組立性が良いこととが
両立していないという問題があった。
However, in the above-mentioned prior art, it is said that both sufficient heat dissipation characteristics and good workability and assemblability of the semiconductor module structure including the cooling system are not compatible with each other. There was a problem.

【0007】さらに、従来の技術で述べた半導体モジュ
ール構造体は、いずれも、実装プロセス時に、構造体に
熱変形が生じた場合、接続不良を起こすことがあった。
また、実稼働時のオン・オフの繰返しによって、過渡的
温度分布のサイクルにより、接続部破壊を起こすことも
あった。これらは、従来の構造体の構造に起因する問題
であると考えられる。このような問題は、半導体モジュ
ールの接続の信頼性を低下させてしまうため、これらを
向上させる構造の開発が望まれている。
Further, in any of the semiconductor module structures described in the prior art, if the structure is thermally deformed during the mounting process, connection failure may occur.
In addition, repeated turning on and off during actual operation may cause destruction of the connection part due to a cycle of transient temperature distribution. These are considered to be problems caused by the structure of the conventional structure. Since such a problem lowers the reliability of the connection of the semiconductor module, it is desired to develop a structure for improving them.

【0008】従来技術の問題点を具体的に説明する。上
述のベローズやダイヤフラム構造は、冷却性は良いが、
不良のチップを交換する際に、水冷系をとり外さなけれ
ばならず、リペア性が悪い。水冷系は、部品数が多いの
で、不良チップを交換する際に、とり外さなければなら
ない部品数が多くなり、加工精度および組立て精度のバ
ラツキが接続部寿命に大きく影響する。加えて、ベロー
ズやダイヤフラム構造ではチップに応力をかけないため
に、バネ構造部を備えなければならない。そのため、バ
ネ構造部のスペースが必要であり、モジュール全体構造
の小型化にも限界がある。
The problems of the prior art will be specifically described. Although the bellows and diaphragm structure described above have good cooling properties,
When replacing a defective chip, the water cooling system must be removed, and the repairability is poor. Since the water-cooled system has a large number of parts, the number of parts that must be removed when replacing a defective chip is large, and variations in processing accuracy and assembly accuracy greatly affect the service life of the connection part. In addition, the bellows or diaphragm structure must have a spring structure to prevent stress on the chip. Therefore, a space for the spring structure is required, and there is a limit to downsizing the entire module structure.

【0009】次に、くし歯熱伝導構造では、くし歯の噛
み合いしろ範囲内のずれを許容できるという利点がある
ので、他の構造と比べて加工性、組立て性、リペア性が
良いが、くし歯構造部分の接触熱抵抗が大きいため熱抵
抗の減少に限界がある。そのため、チップ発熱密度の増
大に対し冷却性能をあげることができない。また、くし
歯スペースを確保するためモジュール高さが高くなると
いう問題もある。
Next, the comb-tooth heat conduction structure has an advantage that it is possible to allow a shift of the comb teeth within the meshing allowance range. Therefore, the comb-shaped heat conduction structure has better workability, assembling property, and repairability than other structures. Since the contact thermal resistance of the tooth structure is large, there is a limit to the reduction of the thermal resistance. Therefore, the cooling performance cannot be improved against the increase in heat generation density of the chip. There is also a problem that the module height is increased to secure the comb tooth space.

【0010】また、はんだ固着構造では、構造が簡単で
リペア性も良く、チップを冷却系に近づけられるため冷
却性能を大幅に向上でき、さらに、モジュールの大幅な
小型化が可能となるなど利点も多いが、基板の反りへの
対応が難しい。すなわち、ほとんどの基板は反りを有し
ているが、基板の反っている場合、チップにも傾きが生
じる。その場合、チップと冷却系との間隔が、基板の反
り加減で異なってしまう。そのため、チップと冷却系と
のあいだに、充填すべきはんだの量が、基板の部位によ
ってばらつく。このようなバラツキに個々に対応してい
たのでは、製造効率が極端に低下してしまう。しかし、
はんだ固着構造では、はんだによって、チップと冷却系
の接合部の応力を吸収する構造であるため、はんだ量の
調節を行なわないと、チップとはんだとの接合部でチッ
プに加わるストレスが大きくなる。
In addition, the solder fixing structure has advantages that the structure is simple and the repairability is good, the cooling performance can be greatly improved because the chip can be brought close to the cooling system, and the module can be greatly downsized. There are many, but it is difficult to deal with the warp of the substrate. That is, most of the substrates have a warp, but when the substrate is warped, the chip also tilts. In that case, the distance between the chip and the cooling system varies depending on the warp of the substrate. Therefore, the amount of solder to be filled between the chip and the cooling system varies depending on the part of the board. If such variations are dealt with individually, the manufacturing efficiency will be extremely reduced. But,
In the solder fixing structure, since the solder absorbs the stress at the joint between the chip and the cooling system, unless the amount of solder is adjusted, the stress applied to the chip at the joint between the chip and the solder becomes large.

【0011】本発明の目的は、電子回路部品の交換を容
易に行なうことができ、小型で、高い冷却性能を備え、
さらに、基板の反りある場合にも電子回路部品に応力を
加えない電子回路装置と、これを演算・記憶素子として
備えた高性能の電子計算機を提供することにある。
An object of the present invention is to easily replace electronic circuit parts, to have a small size and to provide high cooling performance.
Another object of the present invention is to provide an electronic circuit device that does not apply stress to electronic circuit parts even when the substrate is warped, and a high-performance electronic computer equipped with the electronic circuit device as an arithmetic / memory element.

【0012】[0012]

【課題を解決するための手段】上記課題を解決するため
に本発明によれば、基板と、電子回路部品と、前記基板
と電子回路部品とを電気的に接続する接続手段と、前記
電子回路部品を冷却する冷却手段と、前記冷却手段と前
記電子回路部品との双方に接触して、前記冷却手段と前
記電子回路部品とを熱的に連結する連結手段とを有する
電子回路装置であって、前記連結手段は、貫通孔を有す
る板状部材と、前記貫通孔を充填する充填部材とを有
し、前記板状部材は、前記貫通孔の開口部を、前記電子
回路部品に接触する側と前記冷却手段に接触する側とに
有し、前記充填部材は、少なくとも一部が前記電子回路
部品に接触し、かつ、前記貫通孔の電子回路部品側の開
口部を閉塞するものであることを特徴とする電子回路装
置が提供される。
In order to solve the above problems, according to the present invention, a substrate, an electronic circuit component, a connecting means for electrically connecting the substrate and the electronic circuit component, and the electronic circuit An electronic circuit device comprising: a cooling unit that cools a component; and a connecting unit that contacts both the cooling unit and the electronic circuit component to thermally couple the cooling unit and the electronic circuit component. The connecting means has a plate-shaped member having a through hole and a filling member for filling the through hole, and the plate-shaped member has an opening of the through hole that contacts the electronic circuit component. And at least a part of the filling member that contacts the electronic circuit component and that closes the opening of the through hole on the electronic circuit component side. An electronic circuit device is provided.

【0013】[0013]

【作用】本発明において、電子回路部品は、基板上に配
置され、さらに接続手段によって基板と電気的に接続さ
れる。連結手段は、電子回路部品と冷却手段との双方に
接触することにより、電子回路部品の熱を冷却手段に伝
導して、電子回路部品を冷却する。
In the present invention, the electronic circuit component is arranged on the substrate and is electrically connected to the substrate by the connecting means. The connecting means conducts the heat of the electronic circuit component to the cooling means by contacting both the electronic circuit component and the cooling means to cool the electronic circuit component.

【0014】連結手段は、貫通孔を有する板状部材と、
貫通孔を充填する充填部材とを有している。板状部材
は、貫通孔の開口部を、電子回路部品に接触する側と前
記冷却手段に接触する側とに備えている。充填部材は、
少なくとも一部が電子回路部品に接触し、かつ、貫通孔
の電子回路部品側の開口部を閉塞するものである。
The connecting means includes a plate member having a through hole,
And a filling member that fills the through hole. The plate-shaped member is provided with an opening of the through hole on the side that contacts the electronic circuit component and on the side that contacts the cooling means. The filling member is
At least a part thereof contacts the electronic circuit component and closes the opening of the through hole on the electronic circuit component side.

【0015】基板に反りがある場合には、板状部材と電
子回路部品との位置関係が、基板の反り加減によって、
ばらつくこととなるが、本発明では、等しい量の充填部
材で、そのばらつきを許容することができる。すなわ
ち、基板の反りによって、板状部材と電子回路部品が、
離れている場合には、板状部材と電子回路部品との間隙
が大きく、これを充填部材がを満たすので、貫通孔の内
部を満たす充填部材の量が少なくなる。また、板状部材
と電子回路部品とが接近している場合には、板状部材と
電子回路部品との間隙が小さく、貫通孔の内部を満たす
充填部材の量が多くなる。どちらの場合においても、充
填部材は、貫通孔の電子回路部品側の開口部を閉塞して
いる。これは、板状部材が電子部品側から冷却手段側に
貫通する貫通孔を有しているがゆえに可能となった技術
である。
When the board has a warp, the positional relationship between the plate-shaped member and the electronic circuit component is adjusted by adjusting the warp of the board.
However, in the present invention, it is possible to allow the variation with the same amount of the filling member. That is, due to the warp of the substrate, the plate member and the electronic circuit component are
When they are separated from each other, the gap between the plate-shaped member and the electronic circuit component is large, and the filling member fills the gap, so that the amount of the filling member filling the inside of the through hole is small. Further, when the plate member and the electronic circuit component are close to each other, the gap between the plate member and the electronic circuit component is small, and the amount of the filling member filling the inside of the through hole is large. In either case, the filling member closes the opening of the through hole on the electronic circuit component side. This is a technology made possible because the plate-shaped member has a through hole that penetrates from the electronic component side to the cooling means side.

【0016】また、本発明の電子回路装置は、構造が簡
単であるので、電子回路部品の交換を容易に行なうこと
ができる。また、電子回路部品は、充填部材と、板状部
材とによって、直接冷却手段に連結されるので、冷却効
率も高い。
Further, since the electronic circuit device of the present invention has a simple structure, the electronic circuit parts can be easily replaced. Further, since the electronic circuit component is directly connected to the cooling means by the filling member and the plate member, the cooling efficiency is high.

【0017】このように、本発明の電子回路装置におい
て、板状部材に貫通孔と、これを充填することにより板
状部材と電子回路部品とを直接連結する充填部材とを用
いたことにより、基板の反りある場合にも電子回路部品
に応力を加えない電子回路装置が提供される。
As described above, in the electronic circuit device of the present invention, by using the through hole in the plate member and the filling member for directly connecting the plate member and the electronic circuit component by filling the through hole, Provided is an electronic circuit device that does not apply stress to an electronic circuit component even when the substrate is warped.

【0018】[0018]

【実施例】以下に、本発明の一実施例の電子回路装置
を、図1から図6を用いて説明する。
DESCRIPTION OF THE PREFERRED EMBODIMENTS An electronic circuit device according to an embodiment of the present invention will be described below with reference to FIGS.

【0019】まず、本発明の第1の実施例の電子回路装
置の実装構造を図1を用いて説明する。本実施例の電子
回路装置は、裏面に信号ピン9を有する絶縁多層基板1
と、絶縁多層基板1上に複数個(図1では1個のみ図示
している)の半導体チップ2とを有している。半導体チ
ップ2と絶縁多層基板1とは、はんだバンプ8で接続さ
れている。また、電子回路装置は、半導体チップを冷却
するための冷却ジャケット4と、半導体チップ2を冷却
ジャケット4に熱的に連結するための、天板3と充填部
材5と伝熱板6とを備えている。天板3と充填部材5と
伝熱板6とは、熱伝導性グリス11を介して冷却ジャケ
ット4と接触している。また、天板3と充填部材5と伝
熱板6とは、半導体チップ2とも接触している。天板3
は、基板8の端部に配置されたフレーム7によって、支
持されている。基板1およびフレーム7、フレーム7お
よび天板10はそれぞれろう材10で接続されている。
冷却ジャケット4は、内部に冷却水を循環させるための
冷却管4aを有している。
First, the mounting structure of the electronic circuit device according to the first embodiment of the present invention will be described with reference to FIG. The electronic circuit device of the present embodiment is an insulating multilayer substrate 1 having signal pins 9 on its back surface.
And a plurality of (only one is shown in FIG. 1) semiconductor chips 2 on the insulating multilayer substrate 1. The semiconductor chip 2 and the insulating multilayer substrate 1 are connected by solder bumps 8. The electronic circuit device further includes a cooling jacket 4 for cooling the semiconductor chip, a top plate 3, a filling member 5, and a heat transfer plate 6 for thermally connecting the semiconductor chip 2 to the cooling jacket 4. ing. The top plate 3, the filling member 5, and the heat transfer plate 6 are in contact with the cooling jacket 4 via the heat conductive grease 11. The top plate 3, the filling member 5, and the heat transfer plate 6 are also in contact with the semiconductor chip 2. Top plate 3
Are supported by the frame 7 arranged at the end of the substrate 8. The substrate 1 and the frame 7, and the frame 7 and the top plate 10 are connected by the brazing material 10.
The cooling jacket 4 has a cooling pipe 4a for circulating cooling water inside.

【0020】天板3は、セラミックで構成されている。
天板3は、半導体チップ2側から冷却ジャケット4側
に、貫通する貫通孔を有している。貫通孔は、半導体チ
ップ2の搭載位置に設けられている。貫通穴の半導体チ
ップ2側の開口部のサイズは、半導体チップ2のサイズ
より若干小さめになっている。天板3は、半導体チップ
2の上面と天板3下面がほぼ同一平面内にくるよう配置
されている。
The top plate 3 is made of ceramic.
The top plate 3 has a through hole penetrating from the semiconductor chip 2 side to the cooling jacket 4 side. The through hole is provided at the mounting position of the semiconductor chip 2. The size of the opening of the through hole on the semiconductor chip 2 side is slightly smaller than the size of the semiconductor chip 2. The top plate 3 is arranged so that the upper surface of the semiconductor chip 2 and the lower surface of the top plate 3 are substantially in the same plane.

【0021】この貫通穴には、低融点の金属から成る充
填部材5(例えばIn48Sn(融点:約120℃)、Bi56.3Pb
(融点:約125℃))が充填されている。充填部材5を
構成する材料の融点は、はんだバンプ8を構成するはん
だの融点より低いものを用いる。冷却ジャケット4側の
開口部には、Cuなどの高熱伝導性金属からなる伝熱板
6がのせられている。充填部材5は、少なくとも一部が
前記電子回路部品に接触し、かつ、前記貫通孔の電子回
路部品側の開口部を閉塞している。
In this through hole, a filling member 5 made of a metal having a low melting point (for example, In48Sn (melting point: about 120 ° C.), Bi56.3Pb) is used.
(Melting point: about 125 ° C)) is filled. The melting point of the material forming the filling member 5 is lower than the melting point of the solder forming the solder bump 8. A heat transfer plate 6 made of a highly heat conductive metal such as Cu is placed in the opening on the cooling jacket 4 side. At least a part of the filling member 5 contacts the electronic circuit component, and closes the opening of the through hole on the electronic circuit component side.

【0022】さらに、貫通穴の冷却ジャケット4側を拡
げて段差を設けてることにより、伝熱経路の拡大してい
る。伝熱金属薄板6にも天板側の段差の張出し部3a形
状に対応した段差を設けている。この張出し部3aは、
天板3の剛性を高める補強材としての役目を持ってい
る。また、この張出し部は、絶縁基板1及び天板3など
の加工精度及び組立て精度が悪い場合に、冷却ジャケッ
ト4締め付け時に、伝熱板6を支持することにより、は
んだバンプ8に過剰な圧力を加えないためのスペーサの
役目も果たしている。
Further, the heat transfer path is expanded by expanding the through hole on the cooling jacket 4 side to provide a step. The heat transfer metal thin plate 6 is also provided with a step corresponding to the shape of the projecting portion 3a of the step on the top plate side. This overhanging portion 3a is
It also has a role as a reinforcing material that enhances the rigidity of the top plate 3. Further, when the processing accuracy and the assembly accuracy of the insulating substrate 1 and the top plate 3 are poor, this overhanging portion supports the heat transfer plate 6 when the cooling jacket 4 is tightened, so that excessive pressure is applied to the solder bumps 8. It also serves as a spacer to prevent addition.

【0023】ここで、本実施例では、図1のように、伝
熱板6の下面に曲率を持たせている。このような曲率を
有する場合には、充填部材5が伝熱板6の中心側からぬ
れ拡がるため、接続面にボイドができにくい。また、チ
ップ中心側ほど、充填部材の厚さが薄くなるので、熱抵
抗が小さい構造となり、モジュール全体の温度分布が均
一化されることなどの利点がある。
In this embodiment, the lower surface of the heat transfer plate 6 has a curvature as shown in FIG. When the filling member 5 has such a curvature, the filling member 5 spreads out from the center side of the heat transfer plate 6, so that a void is not easily formed on the connection surface. Further, since the thickness of the filling member becomes thinner toward the center of the chip, there is an advantage that the structure has a small thermal resistance and the temperature distribution of the entire module is made uniform.

【0024】本実施例の電子回路装置を組み立てる手順
を説明する。まず、基板1上にはんだバンプ8によっ
て、半導体チップ2を接続する。つぎに、基板1上に、
フレーム7をろう材10によって取付ける。そして、フ
レーム7上に天板3を搭載する。この時、天板3の下面
と半導体チップ2の上面が一致し、かつ、天板3が半導
体チップ2に、圧力を加えない高さとなるように配置す
る。
A procedure for assembling the electronic circuit device of this embodiment will be described. First, the semiconductor chip 2 is connected to the substrate 1 by the solder bumps 8. Next, on the substrate 1,
The frame 7 is attached by the brazing material 10. Then, the top plate 3 is mounted on the frame 7. At this time, the lower surface of the top plate 3 and the upper surface of the semiconductor chip 2 are aligned with each other, and the top plate 3 is arranged such that the semiconductor chip 2 has a height such that no pressure is applied thereto.

【0025】天板3の貫通孔から半導体チップ2上に、
充填部材5を構成するための低融点の金属の塊をおく。
つぎに、この低融点の金属を加熱して溶融し、半導体チ
ップ2と天板3との間および貫通孔の半導体チップ2側
の開口部を完全に充填する。さらに、低融点金属を溶融
した状態で、伝熱板6を貫通孔の冷却ジャケット側の開
口部にいれる。このとき、伝熱板6と溶融した低融点金
属が接するようにする。天板3の上面から、低融点金属
があふれた場合には、吸引して取り除く。つぎに、低融
点金属を冷却して固体化して充填部材5を構成する。天
板3と、伝熱板6上に、熱伝導性グリス11を塗布し、
水冷ジャケットを搭載して完成させる。
From the through hole of the top plate 3 onto the semiconductor chip 2,
A low melting point metal block for forming the filling member 5 is placed.
Next, the low melting point metal is heated and melted to completely fill the opening between the semiconductor chip 2 and the top plate 3 and the through hole on the semiconductor chip 2 side. Further, the heat transfer plate 6 is put in the opening of the through hole on the cooling jacket side in a state where the low melting point metal is melted. At this time, the heat transfer plate 6 and the melted low melting point metal are brought into contact with each other. When the low melting point metal overflows from the upper surface of the top plate 3, it is sucked and removed. Next, the low melting point metal is cooled and solidified to form the filling member 5. Apply heat conductive grease 11 on the top plate 3 and the heat transfer plate 6,
Complete with a water cooling jacket.

【0026】つぎに、本実施例の電子回路装置のリペア
時に、半導体チップ2を交換する手順について説明す
る。まず、水冷ジャケット4を取外す。そして、充填部
材5を加熱して、充填部材5を構成する低融点金属を溶
融する。この状態で、伝熱板6を取外し、溶融した状態
の低融点金属を吸引する。つぎに天板3をとり外して、
半導体チップを交換する。
Next, a procedure for replacing the semiconductor chip 2 at the time of repairing the electronic circuit device of this embodiment will be described. First, the water cooling jacket 4 is removed. Then, the filling member 5 is heated to melt the low melting point metal forming the filling member 5. In this state, the heat transfer plate 6 is removed, and the molten low melting point metal is sucked. Next, remove the top plate 3,
Replace the semiconductor chip.

【0027】このように、本実施例の電子回路装置にお
いて、半導体チップ2は、熱伝導性グリス11と伝熱板
6と充填部材5とを介して、冷却ジャケット4と接触し
ている。熱伝導性グリス11と伝熱板6と充填部材5
は、熱伝導性が良いので、半導体チップ2を効果的に冷
却することができる。また、基板に反りのある場合に
も、充填部材5が、半導体チップ2と天板3との間隙を
充填して、半導体チップ2に応力を加えることなく、基
板の反りを許容することができる。
As described above, in the electronic circuit device of this embodiment, the semiconductor chip 2 is in contact with the cooling jacket 4 through the heat conductive grease 11, the heat transfer plate 6 and the filling member 5. Thermally conductive grease 11, heat transfer plate 6, and filling member 5
Has good thermal conductivity, so that the semiconductor chip 2 can be effectively cooled. Further, even when the substrate has a warp, the filling member 5 can fill the gap between the semiconductor chip 2 and the top plate 3 to allow the warp of the substrate without applying stress to the semiconductor chip 2. .

【0028】さらに、上述のように本実施例の電子回路
装置は、部品数が少ないので、リペア時に半導体チップ
2を容易に交換することができる。
Furthermore, as described above, the electronic circuit device of this embodiment has a small number of parts, so that the semiconductor chip 2 can be easily replaced during repair.

【0029】また、貫通孔の内部に段差を設けているの
で、天板3と、充填部材5との接触面積が大きく、天板
と充填部材との接合強度が大きいという利点がある。
Further, since the step is provided inside the through hole, there is an advantage that the contact area between the top plate 3 and the filling member 5 is large and the joining strength between the top plate and the filling member is large.

【0030】また、低融点金属によって半導体チップ2
と天板3とを接続しているので、融点から室温までの温
度差が小さいため、接続時の加熱・冷却過程での構造部
材の熱膨張・熱収縮による部材の変形が小さいため、は
んだバンプに余分な応力・ひずみを与えることもほとん
どない。
The semiconductor chip 2 is made of a low melting point metal.
Since the top plate 3 is connected to the top plate 3, the temperature difference from the melting point to room temperature is small, and the deformation of the structural member due to the thermal expansion / contraction of the structural member during the heating / cooling process at the time of connection is small. Almost no extra stress or strain is applied to the.

【0031】本発明の第2の実施例を図2を用いて説明
する。
A second embodiment of the present invention will be described with reference to FIG.

【0032】本実施例は、実施例は、図1の実施例にお
ける貫通穴の開口部のサイズを半導体チップ2のサイズ
とほぼ等しいか、若干大きめにした場合の例である。こ
の場合、絶縁多層配線基盤1及び天板もしくはキャップ
3に反りがあって、天板3の下面より上に半導体チップ
2の上面が位置してしまうような場合でも、貫通孔内に
半導体チップ2が入り込むことで、半導体チップ2の上
面が天板に接触しない。したがって、はんだバンプ8に
余分な圧力をかけることなく、半導体チップ2の上面
と、天板3との接続ができる。
The present embodiment is an example in which the size of the opening of the through hole in the embodiment of FIG. 1 is approximately equal to or slightly larger than the size of the semiconductor chip 2. In this case, even if the insulating multilayer wiring board 1 and the top plate or the cap 3 are warped so that the upper surface of the semiconductor chip 2 is located above the lower surface of the top plate 3, the semiconductor chip 2 is placed in the through hole. By entering, the upper surface of the semiconductor chip 2 does not contact the top plate. Therefore, the upper surface of the semiconductor chip 2 and the top plate 3 can be connected without applying extra pressure to the solder bumps 8.

【0033】本発明の第3の実施例を図3を用いて説明
する。
A third embodiment of the present invention will be described with reference to FIG.

【0034】本実施例は、貫通穴に段差を設けていない
場合の実施例である。貫通穴の開口部のサイズは実施例
2と同様に、半導体チップ2のサイズとほぼ等しいか、
若干大きめにした。貫通孔の段差を設けていないので、
天板3の加工が簡単で、かつ、図2の実施例と同様絶縁
配線基盤1の反りに柔軟に対応できる。
This embodiment is an embodiment in which no step is provided in the through hole. Similar to the second embodiment, the size of the opening of the through hole is substantially equal to the size of the semiconductor chip 2, or
I made it a little larger. Since there is no step in the through hole,
The top plate 3 can be easily processed and can flexibly deal with the warp of the insulated wiring board 1 as in the embodiment of FIG.

【0035】さらに、本実施例において、リペア時に半
導体チップ2を交換する場合に、充填部材5と伝熱板6
とを取外した後、天板3をとり外さずに、貫通孔から半
導体チップ2を交換することも可能である。この場合に
は、交換の工数を減少させることができるので、リペア
の効率を高くすることができる。
Further, in this embodiment, when the semiconductor chip 2 is replaced at the time of repair, the filling member 5 and the heat transfer plate 6 are used.
It is also possible to replace the semiconductor chip 2 through the through hole without removing the top plate 3 after removing and. In this case, the number of man-hours for replacement can be reduced, so that the efficiency of repair can be increased.

【0036】本発明の第4の実施例を図4を用いて説明
する。
A fourth embodiment of the present invention will be described with reference to FIG.

【0037】本実施例は、天板3の貫通孔の半導体チッ
プ2側の開口部のサイズを、半導体チップ2と同等か大
きめにし、冷却ジャケット4側の開口部のサイズを小さ
くして、段差を設けた場合のものである。この段差によ
り、冷却経路は狭くなるが、天板3の剛性が高くなると
いう利点がある。
In this embodiment, the size of the opening on the side of the semiconductor chip 2 of the through hole of the top plate 3 is made equal to or larger than that of the semiconductor chip 2, and the size of the opening on the side of the cooling jacket 4 is reduced to make a step. Is provided. Although the cooling path is narrowed by this step, there is an advantage that the rigidity of the top plate 3 is increased.

【0038】本発明の第5の実施例を図5を用いて説明
する。
A fifth embodiment of the present invention will be described with reference to FIG.

【0039】図5の実施例は、天板3を、外周部と内部
とで構成する部材を変えたものである。外周部を厚板の
枠とし、内部を中間金属薄板の加工物12で構成した。
中間金属薄板の加工物12は、半導体チップ2を搭載部
に、貫通孔を有している。この構成は、天板3全体とし
ての剛性が高く保ちながら、半導体チップ2の搭載部の
剛性を低くすることができ、はんだバンプへのストレス
も小さくすることができる。
In the embodiment shown in FIG. 5, the top plate 3 is different in the members constituting the outer peripheral portion and the inner portion. The outer peripheral portion was a thick plate frame, and the inside was composed of a work piece 12 of an intermediate metal thin plate.
The processed product 12 of the intermediate thin metal plate has a through hole in which the semiconductor chip 2 is mounted. With this configuration, it is possible to reduce the rigidity of the mounting portion of the semiconductor chip 2 while keeping the rigidity of the top plate 3 as a whole high, and to reduce the stress on the solder bumps.

【0040】本発明の第6の実施例を図6を用いて説明
する。
A sixth embodiment of the present invention will be described with reference to FIG.

【0041】本実施例の電子回路装置3は、天板3とフ
レーム7との間、および、フレーム7と絶縁多層配線基
板1と間に、それぞれOリング14a、14bを、配置
している。また、天板3と半導体チップ2との間にも、
Oリング14cを配置している。Oリング14a、14
b、14cは、気密封止と、充填部材5の漏れ防止を図
ったものである。フレーム7には、排気管13を配置し
た。
In the electronic circuit device 3 of this embodiment, O-rings 14a and 14b are arranged between the top plate 3 and the frame 7 and between the frame 7 and the insulating multilayer wiring board 1, respectively. Also, between the top plate 3 and the semiconductor chip 2,
An O-ring 14c is arranged. O-rings 14a, 14
b and 14c are airtightly sealed and prevent the filling member 5 from leaking. An exhaust pipe 13 is arranged in the frame 7.

【0042】この場合、充填部材5を充填する前に、天
板3と基板1とが構成する気密空間の内部気体を排気管
13より高温雰囲気中での排気を行う。この空間を構成
する部材の内面の加工精度が悪い場合、すなわち、天板
3の加工精度が悪い場合や、多層基板1のうねりが激し
い場合には、排気が十分に行われないので、この加工精
度の検出も同時に行うことが可能である。さらに、すべ
てのはんだバンプ8にほぼ一定の荷重をかけることがで
きるという利点がある。また、封止後排気管13より不
活性ガスを注入し密封することにより、気密封止も行え
る構造である。
In this case, before filling the filling member 5, the gas inside the airtight space formed by the top plate 3 and the substrate 1 is exhausted from the exhaust pipe 13 in a high temperature atmosphere. If the processing accuracy of the inner surface of the member forming this space is poor, that is, if the processing accuracy of the top plate 3 is poor, or the undulations of the multilayer substrate 1 are severe, the exhaust is not sufficiently performed. It is possible to detect accuracy at the same time. Further, there is an advantage that a substantially constant load can be applied to all the solder bumps 8. Further, after the sealing, an inert gas is injected from the exhaust pipe 13 and sealed, so that the structure can be hermetically sealed.

【0043】上述の第1の実施例から第6の実施例にお
いて、天板3とこれを支持するフレーム7の部分を一体
構造としたキャップ状の部材とすることも可能である。
また、半導体チップ2を、チップキャリアやその他電子
回路部品に置き換えた場合でもどうように構成すること
が可能である。
In the above-described first to sixth embodiments, the top plate 3 and the portion of the frame 7 supporting the top plate 3 may be formed as a cap-shaped member having an integral structure.
Further, the semiconductor chip 2 can be configured in any way even when it is replaced with a chip carrier or other electronic circuit parts.

【0044】上述の6つの実施例の効果をまとめると以
下の6点のようになる。
The effects of the above-described six embodiments can be summarized as the following six points.

【0045】(1)半導体チップ2と天板3とを実装プ
ロセス時に構造的に分離させ、各接合部に生じる応力・
ひずみを低減させることができる。
(1) The semiconductor chip 2 and the top plate 3 are structurally separated from each other during the mounting process, and stress generated at each joint is
The strain can be reduced.

【0046】(2)充填部材5を構成する低融点金属
は、同時に低剛性であり、これにより実稼働時の内部温
度変化および温度分布による変形を吸収し、他の接合部
に生じる応力・ひずみを低減させることができる。
(2) The low melting point metal forming the filling member 5 has low rigidity at the same time, which absorbs the internal temperature change and the deformation due to the temperature distribution during actual operation, and the stress and strain generated in other joints. Can be reduced.

【0047】(3)天板3を、熱伝導性グリス11を介
して冷却ジャケット4と接続することができ、放熱経路
が特定できる。また、半導体チップ2を冷却系に近づけ
られるため熱抵抗が減少し、冷却性能の向上が図れるた
め電子回路装置内の温度分布および温度上昇が少なくな
り電子回路装置全体の熱変形が小さくなる。
(3) The top plate 3 can be connected to the cooling jacket 4 via the heat conductive grease 11, and the heat radiation path can be specified. Further, since the semiconductor chip 2 can be brought closer to the cooling system, the thermal resistance is reduced and the cooling performance can be improved, so that the temperature distribution and temperature rise in the electronic circuit device are reduced and the thermal deformation of the entire electronic circuit device is reduced.

【0048】(4)貫通穴中の充填部材5を構成する低
融点金属を溶融した状態において、天板3上面と、伝熱
板6上面を同時に平板により加圧しながら冷却すること
により多層基板1の反りを吸収し、電子回路装置の上面
を平坦化することができる。
(4) In a state in which the low melting point metal forming the filling member 5 in the through hole is melted, the upper surface of the top plate 3 and the upper surface of the heat transfer plate 6 are simultaneously pressed by a flat plate and cooled to cool the multilayer substrate 1 It is possible to absorb the warp and flatten the upper surface of the electronic circuit device.

【0049】(5)上記伝熱板6の半導体チップ2側の
面に曲率を持たせ凸状にすることにより、充填部材を構
成する低融点金属が中心からぬれ拡がるため、ボイドな
どの接続欠陥を大幅に低減することが可能となる。
(5) When the surface of the heat transfer plate 6 on the semiconductor chip 2 side has a convex shape with a curvature, the low melting point metal forming the filling member wets and spreads from the center, resulting in a connection defect such as a void. Can be significantly reduced.

【0050】(6)上記伝熱板6の曲率により、充填部
材5の熱抵抗は、チップ2の中心が最も小さくなり、チ
ップ2の発熱でチップ2に生じる温度分布が小さくな
る。そのため、チップ2の熱変形により、はんだバンプ
8に生じる熱応力・ひずみが低減される。
(6) Due to the curvature of the heat transfer plate 6, the heat resistance of the filling member 5 is minimized at the center of the chip 2, and the temperature distribution generated on the chip 2 due to heat generation of the chip 2 is reduced. Therefore, the thermal stress / strain generated in the solder bumps 8 due to the thermal deformation of the chip 2 is reduced.

【0051】(7)不良チップ2の交換において、上記
充填部材5を構成する低融点金属を先に溶かして吸い取
り、チップ2と天板3とをを完全に分離した後、リペア
を行うことができる。
(7) When the defective chip 2 is replaced, the low melting point metal forming the filling member 5 is first melted and absorbed, and the chip 2 and the top plate 3 are completely separated and then repaired. it can.

【0052】本実施例では、伝熱板6として曲率を持た
せたが、必ずしも曲率を持たせる必要はなく、単なる平
板もしくは段付き平板でも、その要求性能に対して適し
た形状を選択すれば良い。
In this embodiment, the heat transfer plate 6 has a curvature. However, it is not always necessary to have a curvature, and a simple flat plate or a stepped flat plate can be selected if a shape suitable for the required performance is selected. good.

【0053】[0053]

【発明の効果】上述のように、本発明によれば、電子回
路部品の交換を容易に行なうことができ、小型で、高い
冷却性能を備えた電子回路装置でありながら、さらに、
基板の反りある場合にも電子回路部品に応力を加えない
電子回路装置が提供することができる。
As described above, according to the present invention, although the electronic circuit parts can be easily replaced, the electronic circuit device is small in size and has high cooling performance.
It is possible to provide an electronic circuit device that does not apply stress to electronic circuit components even when the substrate is warped.

【図面の簡単な説明】[Brief description of drawings]

【図1】本発明による第1の実施例の電子回路装置の構
造を示す断面図。
FIG. 1 is a sectional view showing the structure of an electronic circuit device according to a first embodiment of the present invention.

【図2】本発明による第2の実施例の電子回路装置の構
造を示す断面図。
FIG. 2 is a sectional view showing the structure of an electronic circuit device according to a second embodiment of the present invention.

【図3】本発明による第3の実施例の電子回路装置の構
造を示す断面図。
FIG. 3 is a sectional view showing the structure of an electronic circuit device according to a third embodiment of the present invention.

【図4】本発明による第4の実施例の電子回路装置の構
造を示す断面図。
FIG. 4 is a sectional view showing the structure of an electronic circuit device according to a fourth embodiment of the present invention.

【図5】本発明による第5の実施例の電子回路装置の構
造を示す断面図。
FIG. 5 is a sectional view showing the structure of an electronic circuit device according to a fifth embodiment of the present invention.

【図6】本発明による第6の実施例の電子回路装置の構
造を示す断面図。
FIG. 6 is a sectional view showing the structure of an electronic circuit device according to a sixth embodiment of the present invention.

【図7】従来技術で冷却部にベローズ構造を用いた電子
回路装置の構造を示す断面図。
FIG. 7 is a cross-sectional view showing a structure of an electronic circuit device using a bellows structure in a cooling unit according to a conventional technique.

【図8】従来技術でモジュール上面にダイヤフラムを用
いた電子回路装置の構造を示す断面図。
FIG. 8 is a cross-sectional view showing a structure of an electronic circuit device using a diaphragm on the upper surface of a module according to a conventional technique.

【図9】従来技術でモジュール上面とLSI背面をはん
だで固着した電子回路装置の構造を示す断面図。
FIG. 9 is a cross-sectional view showing the structure of an electronic circuit device in which a module top surface and an LSI back surface are fixed to each other with solder by a conventional technique.

【図10】従来技術でくし歯を用いた電子回路装置の構
造を示す断面図。
FIG. 10 is a cross-sectional view showing a structure of an electronic circuit device using a comb tooth according to a conventional technique.

【図11】従来技術でくし歯を用いた電子回路装置の構
造を示す断面図。
FIG. 11 is a cross-sectional view showing a structure of an electronic circuit device using a comb tooth according to a conventional technique.

【符号の説明】[Explanation of symbols]

1…絶縁多層配線基板、2…チップ、3…天板、4…冷
却ジャケット、5…低融点金属、6…伝熱板、7…モジ
ュールフレーム、8…はんだバンプ、9…I/Oピン、
10…封止用ろう材、11…熱伝導性グリス、12…中
間金属薄板、13…排気管、14…Oリング、15…ベ
ローズ、16…ダイヤフラム、17…チップ背面固着用
はんだ、18…支持リング、19…放熱フィン、20…
くし歯。
DESCRIPTION OF SYMBOLS 1 ... Insulating multilayer wiring board, 2 ... Chip, 3 ... Top plate, 4 ... Cooling jacket, 5 ... Low melting point metal, 6 ... Heat transfer plate, 7 ... Module frame, 8 ... Solder bump, 9 ... I / O pin,
10 ... Brazing material for sealing, 11 ... Thermally conductive grease, 12 ... Intermediate thin metal plate, 13 ... Exhaust pipe, 14 ... O ring, 15 ... Bellows, 16 ... Diaphragm, 17 ... Solder for fixing chip back surface, 18 ... Support Ring, 19 ... Radiating fin, 20 ...
Comb teeth.

───────────────────────────────────────────────────── フロントページの続き (72)発明者 原田 正英 神奈川県横浜市戸塚区吉田町292番地 株 式会社日立製作所生産技術研究所内 (72)発明者 根津 利忠 神奈川県秦野市堀山下1番地 株式会社日 立製作所神奈川工場内 (72)発明者 白井 貢 神奈川県秦野市堀山下1番地 株式会社日 立製作所神奈川工場内 ─────────────────────────────────────────────────── ─── Continuation of the front page (72) Masahide Harada, 292 Yoshida-cho, Totsuka-ku, Yokohama-shi, Kanagawa, Ltd., Production Engineering Laboratory, Hitachi, Ltd. Hiritsu Manufacturing Kanagawa Factory (72) Inventor Mitsugu Shirai 1 Horiyamashita, Hadano City, Kanagawa Prefecture Hitate Manufacturing Kanagawa Factory

Claims (9)

【特許請求の範囲】[Claims] 【請求項1】基板と、前記基板上に配置された電子回路
部品と、前記基板と電子回路部品とを電気的に接続する
接続手段と、前記電子回路部品を冷却する冷却手段と、
前記冷却手段と前記電子回路部品との双方に接触して、
前記冷却手段と前記電子回路部品とを熱的に連結する連
結手段とを有する電子回路装置であって、 前記連結手段は、貫通孔を有する板状部材と、前記貫通
孔を充填する充填部材とを有し、 前記板状部材は、前記貫通孔の開口部を、前記電子回路
部品側と前記冷却手段側とに有し、前記充填部材は、少
なくとも一部が前記電子回路部品に接触し、かつ、前記
貫通孔の電子回路部品側の開口部を閉塞することを特徴
とする電子回路装置。
1. A substrate, an electronic circuit component arranged on the substrate, connecting means for electrically connecting the substrate and the electronic circuit component, and cooling means for cooling the electronic circuit component.
In contact with both the cooling means and the electronic circuit component,
It is an electronic circuit device which has a connecting means which thermally connects the cooling means and the electronic circuit component, wherein the connecting means includes a plate-shaped member having a through hole, and a filling member for filling the through hole. The plate-shaped member has an opening of the through hole on the electronic circuit component side and the cooling means side, the filling member, at least a portion is in contact with the electronic circuit component, Further, the electronic circuit device is characterized in that the opening of the through hole on the electronic circuit component side is closed.
【請求項2】請求項1において、前記充填部材は、前記
接続手段を構成する材料の融点より、低い融点を有する
材料によって構成されていることを特徴とする電子回路
装置。
2. The electronic circuit device according to claim 1, wherein the filling member is made of a material having a melting point lower than a melting point of a material forming the connecting means.
【請求項3】請求項1において、前記連結手段は、前記
冷却手段および前記充填部材と接触して熱を伝導する伝
熱板をさらに有し、前記伝熱板は、前記貫通孔内の冷却
手段側の開口部に配置されることを特徴とする電子回路
装置。
3. The connecting means according to claim 1, further comprising a heat transfer plate that contacts the cooling means and the filling member to conduct heat, and the heat transfer plate cools the inside of the through hole. An electronic circuit device, wherein the electronic circuit device is arranged in an opening portion on the means side.
【請求項4】請求項3において、前記伝熱板は、中央部
の厚さが周辺部より厚いことを特徴とする電子回路装
置。
4. The electronic circuit device according to claim 3, wherein the heat transfer plate has a central portion thicker than a peripheral portion.
【請求項5】請求項1において、前記連結手段は、前記
板状部材を、前記電子回路部品に非接触な状態で、前記
基板上に支持するための支持部材をさらに有することを
特徴とする電子回路装置。
5. The connecting means according to claim 1, further comprising a supporting member for supporting the plate-shaped member on the substrate in a state of not being in contact with the electronic circuit component. Electronic circuit device.
【請求項6】請求項5において、前記板状部材の貫通孔
の開口部は、前記電子部品より大きいものであり、 前記支持部材は、前記電子部品の一部が、前記貫通孔内
に入る高さに、前記板状部材を支持することを特徴とす
る電子回路装置。
6. The opening of the through hole of the plate-shaped member is larger than the electronic component according to claim 5, and in the support member, a part of the electronic component enters into the through hole. An electronic circuit device, wherein the plate-shaped member is supported at a height.
【請求項7】請求項6において、前記貫通孔は、内壁に
段部を有することを特徴とする電子回路装置。
7. The electronic circuit device according to claim 6, wherein the through hole has a step portion on an inner wall thereof.
【請求項8】請求項1において、前記電子回路部品は、
半導体チップまたはチップキャリアであることを特徴と
する電子回路装置。
8. The electronic circuit component according to claim 1, wherein:
An electronic circuit device, which is a semiconductor chip or a chip carrier.
【請求項9】請求項2において、前記充填部材は、はん
だであることを特徴とする電子回路装置。
9. The electronic circuit device according to claim 2, wherein the filling member is solder.
JP04201473A 1992-07-28 1992-07-28 Electronic circuit device Expired - Fee Related JP3113400B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP04201473A JP3113400B2 (en) 1992-07-28 1992-07-28 Electronic circuit device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP04201473A JP3113400B2 (en) 1992-07-28 1992-07-28 Electronic circuit device

Publications (2)

Publication Number Publication Date
JPH0653374A true JPH0653374A (en) 1994-02-25
JP3113400B2 JP3113400B2 (en) 2000-11-27

Family

ID=16441666

Family Applications (1)

Application Number Title Priority Date Filing Date
JP04201473A Expired - Fee Related JP3113400B2 (en) 1992-07-28 1992-07-28 Electronic circuit device

Country Status (1)

Country Link
JP (1) JP3113400B2 (en)

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2006073810A (en) * 2004-09-02 2006-03-16 Toyota Motor Corp Power semiconductor module and manufacturing method thereof
US7221571B2 (en) * 2003-08-28 2007-05-22 Fujitsu Limited Package unit, printed board having the same, and electronic apparatus having the printed board
JP2009218603A (en) * 2009-04-09 2009-09-24 Fujitsu Ltd Package structure, printed circuit board mounted with the same, and electronic apparatus including the printed circuit board

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7221571B2 (en) * 2003-08-28 2007-05-22 Fujitsu Limited Package unit, printed board having the same, and electronic apparatus having the printed board
JP2006073810A (en) * 2004-09-02 2006-03-16 Toyota Motor Corp Power semiconductor module and manufacturing method thereof
JP2009218603A (en) * 2009-04-09 2009-09-24 Fujitsu Ltd Package structure, printed circuit board mounted with the same, and electronic apparatus including the printed circuit board

Also Published As

Publication number Publication date
JP3113400B2 (en) 2000-11-27

Similar Documents

Publication Publication Date Title
US4561011A (en) Dimensionally stable semiconductor device
US4034468A (en) Method for making conduction-cooled circuit package
JP2533511B2 (en) Electronic component connection structure and manufacturing method thereof
US4034469A (en) Method of making conduction-cooled circuit package
US5097387A (en) Circuit chip package employing low melting point solder for heat transfer
JPH10308465A (en) Cast metal seal for semiconductor substrate
KR980013574A (en) Column Grid Array Substrate Attachment with Geat Sink Stress Rdlief
US5251100A (en) Semiconductor integrated circuit device with cooling system and manufacturing method therefor
JP3207150B2 (en) Semiconductor package
JP3207149B2 (en) Method of fixing low thermal conductivity cap to high thermal conductivity substrate
JP3113400B2 (en) Electronic circuit device
JP3161423B2 (en) LSI mounting structure
JP3033221B2 (en) Electronic circuit device
US5844311A (en) Multichip module with heat sink and attachment means
JPS6259888B2 (en)
JP2002093960A (en) Cooling structure of multichip module and its manufacturing method
JPH0316159A (en) Electronic device
JPH0582688A (en) Semiconductor integrated circuit device
JPH0677631A (en) Mounting method of chip component onto aluminum board
JPH0442926Y2 (en)
JPS6120146B2 (en)
JPH05102354A (en) Electronic circuit device
JPH021959A (en) Cooling device for integrated circuit
JPS63287038A (en) Package structure
JPH0677362A (en) Electronic circuit apparatus

Legal Events

Date Code Title Description
LAPS Cancellation because of no payment of annual fees