JPH0650335B2 - Leak current test circuit - Google Patents

Description

The present invention relates to a leak current test circuit for testing an input leak current of an input terminal.

[Prior art]

FIG. 1 shows an example of a sensor information reading circuit in a conventional contact image sensor used as a facsimile. The terminal I is an input terminal that is directly connected to the photosensor and receives information from each photosensor. Reference numeral 1 denotes an N-channel transistor, which functions to remove the electric charge accumulated in the parasitic capacitance of the terminal I by making the clear signal C high. Vss is the negative power supply line.
Although this figure shows the case where the input terminal I is precharged to low, it may be precharged to high by using only the P channel transistor. Reference numeral 2 is a clocked inverter, but an analog switch may be used instead. Reference numeral 3 is a shift register, and the shift clock CL and the shift register output Q operate in a time chart as shown in FIG.

The sensor has good humidity resistance and high reliability at high temperature, and it has a fast optical response.
Although a photodiode based on Si: H) is mainly used, an α-Si: H photodiode has an extremely small photocurrent, which is unusable. In order to increase the photovoltaic current, it is conceivable to increase the light from the light source or widen the light receiving area of the sensor.The former shortens the life of the light source, and the latter causes image blurring or mounting failure Make it possible. For the above reason, the light intensity entering the sensor through the self-ox lens is usually about 100 lux,
The light receiving area of the sensor is about 10 with a resolution of 8 dots / mm.
It is about 0 μm ^□ , about 60 μm ^□ at 16 dots / mm, and the photocurrent obtained from this is about 1 nA. Therefore, it is necessary to suppress the allowable leak of the input terminal that receives the sensor information to several tens of PA or less at room temperature. In order to certify and guarantee the presence or absence of such extremely weak leaks using an LSI tester, an extremely expensive dedicated high-precision tester is required, and even if a high-precision tester is prepared, noise and induction It is virtually impossible to perform PA level verification on a mass production scale. That is, although the IC itself can be manufactured, a defective IC having a minute input leakage current cannot be rejected as a defective product.

〔Purpose〕

The present invention is intended to solve the above-described problems, and the IC itself is provided with a function of checking for the presence or absence of PA-level input leakage, amplifying it, and outputting it.
It is intended to allow a defective IC having a PA-level input leakage current to be rejected.

〔Overview〕

The leak current test circuit of the present invention sets a plurality of input terminals to a predetermined level of a high level or a low level on a test basis, and sets the plurality of input terminals to a high impedance state after setting the predetermined level. And a means for sequentially outputting a plurality of signals based on the predetermined level output from the plurality of input terminals to a single output terminal through a plurality of impedance conversion means. Characterize.

〔Example〕

3 to 6 are examples of the present invention. In the following description, the high level is 1 and the low level is 0.
In FIG. 3, when C. = 1, 0, all the low levels are given to the input terminal I, and when C = 0 and 1, the high level is applied to the input terminal I by the P channel transistor 4. When given, and. = 1, the input terminal I becomes high impedance. The state of C · T = 1 is a prohibited state.

A method for testing the leak current of the input terminal I in the circuit of FIG. 3 will be described below. First, to check whether or not the terminal I is leaking high, after instantaneously precharging the terminal I to a low level by setting C · = 1, a predetermined time
If the level of the terminal I is not changed to high due to leakage after keeping the state of = 1, the shift register which is means for sequentially outputting the level of the terminal I is operated, and the serial signal output line Out terminal is sequentially operated. Check the information sent out. On the contrary, to check whether the terminal I is leaking low, instantaneously
= 1 and pre-charge the terminal I to high level,
The state of = 1 is maintained for a certain period of time, and then the shift register is operated to check the information sent from the Out terminal as to whether the level of the terminal I has not changed to low due to leakage. The parasitic capacitance of the terminal I is usually 1 to 2 PF and at most 5 PF. Therefore 10 PA
In order to check whether or not there is the above leakage, it is sufficient to obtain the dynamic hold time after precharging the terminal I for 1 second.

It is not necessary to probe the input terminal itself in order to give a level to the terminal I, and the level change due to the leakage current of the terminal I that is dynamically held is amplified by the clocked inverter 2 which is the impedance conversion means and Ou.
Since it is output to t, it is not necessary to directly probe the terminal I to observe the level change. That is, it is possible to test whether or not there is a leak current at the terminal I without probing the input terminal I itself. Since the terminal I is not directly probed, it is possible to avoid erroneous determination because the level of the terminal I is changed by noise or induction.

FIG. 4 is an example in which FIG. 3 is improved so that it can be verified whether or not there is a leak between adjacent terminals. Input terminal In and
I _{n + 1} is repeatedly arranged with one repeating unit. Here, if only T ₁ of the three signals T ₁ , T ₂ and C is set to high, low and high levels can be alternately applied to adjacent input terminals, and if only T ₂ is set to high, T 1 ₁
It is possible to give a level opposite in phase to when it was high. If all three control signals are set to low, high impedance, that is, dynamic hold can be performed, and reading of the level of the terminal I during dynamic hold is the same as the method described above.

FIG. 5 shows an example of a circuit in which the terminal I can be set to the same level as the contents of the shift register when the T signal is made high. If the shift register is set to a desired state in advance, each terminal I can be optionally set correspondingly.

〔effect〕

As described above, according to the present invention, an extremely weak leak of the PA order of each input terminal that receives information can be verified without directly probing those input terminals. It is possible to judge whether or not it is on a mass-production scale, and to provide highly reliable products. Moreover, it is not necessary to prepare an extremely expensive high-precision tester for the verification.

[Brief description of drawings]

FIG. 1 is an example of a sensor information reading circuit in a conventional contact image sensor, and FIG. 2 is a time chart showing the operation of a shift register used therein. 3 to 5 are views showing an embodiment of the present invention. 1,5 ...... N channel transistor 2 ...... Clocked inverter 3 ...... Shift register 4,6 ...... P Channel transistor 7 ...... OR gate 8 ...... Inverter 9 ...... NOR gate 10 ...... NAND gate 11 ...... AND gate C …… Clear signal T, T ₁ , T ₂ … Test signal CL …… Shift clock

Claims (1)

[Claims] 1. Means for setting a plurality of input terminals to a predetermined level of a high level or a low level on a trial basis, and setting the plurality of input terminals to a high impedance state after setting the predetermined level. And a means for sequentially outputting a plurality of signals based on the predetermined level output from the plurality of input terminals to a single output terminal through a plurality of impedance conversion means, respectively. Leak current test circuit.