JPH0650334B2 - Self-diagnosis device for controller for failure section detection device - Google Patents

Description

Description: TECHNICAL FIELD The present invention relates to a controller for a failure section detection device, which optionally, automatically and periodically checks whether or not its circuit function is normal. It is a thing.

[Prior art and its problems]

The controller for the faulty section detection device is installed for the purpose of minimizing damage in response to an abnormal condition that has occurred in the power line or electric power equipment in the distribution line and not affecting other healthy sections. To be done. Thus, the role of the controller for the faulty section detection device is important, and it must be able to operate reliably even in an abnormal state that rarely occurs. Therefore, it is necessary to regularly check whether the controller is functioning normally, but there are many installed units, and
Conventionally, there was a difficulty in inspection due to work problems caused by installation on a pillar. In addition, even if a periodic inspection is carried out, if the controller fails between one periodic inspection and the next, the discovery is delayed and an actual ground fault or short circuit accident occurs. However, there was a problem that it did not work and caused damage such as widespread blackouts and power transmission to the accident point.

[Object of the Invention]

The present invention solves the above-mentioned conventional problems and provides a self-diagnosis function of the circuit state of the controller itself so that an alarm is issued when a circuit abnormality occurs and quick repair and inspection can be performed. The purpose of this is to improve the reliability of the controller.

[Conventional Example]

FIG. 3 shows an integrated circuit diagram of the failure section detecting and disconnecting device,
(1) is a section switch, (2) is its main contact, (3) is a closing electromagnet coil, (4) and (5) are connected to the main contact (2) of the section switch (1). The operation transformers whose primary side is connected to the distribution lines (6) and (7) on the power supply side and the load side, respectively, supply the operation power to the controller (8). One of the secondary terminals of the operating transformers (4) and (5) is connected to terminals A and D, and the other is connected to the common terminal B.
One terminal of the coil (3) is connected to the terminal C and the other terminal is connected to the terminal B, respectively.

FIG. 4 is a block diagram showing a circuit example of a conventional controller for a failure section detection device. In the figure, A is the power source side (hereinafter referred to as A
Side), D is a load side (hereinafter referred to as D side), B is a common voltage input terminal, and C is an output terminal for driving a closing electromagnet. (11) is a power supply selection circuit that selects and outputs either the A side power supply or the D side power supply, and selects the side to which power was previously supplied in the double-sided power failure state.

The secondary side output terminals E and F of the power source selection circuit (11) are connected to the control power source circuit (12) through the CSb contact of the operation switch CS and the control transformer T _1, and the secondary side terminal G controls the control circuit. Supply control power to each part.

The operation switch CS has three notch control positions of "return ON", "ON", and "OFF", where "ON" is the position during steady operation,
“OFF” is a position where the control circuit is disconnected and operation is stopped, and “return ON” is a position which is temporarily taken to return the control circuit to the operating state when the lock operation is performed, and returns to the ON state after the operation. The switch CS has three contacts, the CSb contact is ON / OFF at the notch of return / on, OFF at the notch of OFF, and the other two contacts CSa ₁ and CSa ₂ are both ON / OFF at the notch of return / incoming. Turns off at the cut notch. Connect from terminal E to output terminal C via CSa ₂ contact.

Reference numeral (13) is a first memory circuit, which permanently stores the operation history of the controller circuit, selects whether or not the lock operation is possible according to the stored state, and controls the failure section detection operation of the distribution line.

When the control power is supplied in the normal state, the first memory circuit (13) immediately outputs. This output is applied to the X timer (15) via the X time settling circuit (14), the X timer (15) starts clocking, and after a predetermined X time has elapsed, X
The timer (15) outputs and gives a signal to the output circuit (16) via the inhibit circuit INH ₂ . Output circuit (16)
Immediately outputs and activates the output relay MC. Connect from the terminal E to the output terminal C via the contact MCa of the output relay MC, the contact MCa is closed by the energization of the output relay MC and output to the terminal C, the electromagnet (3) of the classification switch is excited, and the classification switching is performed. The vessel (1) is turned on.

The output of the output circuit (16) also gives a signal to the Y timer (17) of the output circuit (16), the Y timer (17) starts clocking, and after a predetermined Y time has elapsed, the Y timer (17) Output. The output of the Y timer (17) is the inhibit circuit INH.
_An inhibit signal is given to ₁ to stop the reset signal, and a set signal is given and set to the first memory circuit (13).

The first memory circuit (13) enters an output state, maintains this state, and enters a steady closing state. When power is retransmitted after a power failure from this state, the first storage circuit (13) immediately outputs an output and repeats the above operation.

The output signal of the output circuit (16) is also the Z ₁ timer (1
Are given in 8), Z in Z ₁ timer when momentary power failure
_The output signal is maintained for ₁ hour, and the output circuit is driven when the power is restored to continue the output. From the output terminal G of the control power supply circuit (12), CSa ₁ gives a signal to the input terminal of the output circuit (16) through a contact, and forcibly drives the output circuit (16) at the time of “return on / off”.

A signal is given from the input terminal of the X time settling circuit (14) to the X indicator lamp (19) via the inhibit circuit INH ₅ , and the circuit IN
The inhibit signal of H ₅ is given from the output terminal of the output circuit (16). The X indicator light (19) indicates that the X timer (15) is operating. A signal is given from the input terminal of the Y timer (17) to the Y indicator lamp (20) via the inhibit circuit INH _6, and the inhibit signal of the circuit INH ₆ is given from the output terminal of the Y timer. The Y indicator light (20) indicates that the Y timer (17) is operating.

The terminals A and B are connected to the A side voltage detection circuit (21) through the control transformer T ₂ and output to the secondary side output terminal H thereof. From the terminals D and B through the control transformer T ₃ to the D side voltage detection circuit (2
2) and output to the secondary output terminal J. Terminal H, and enter into the loop blocking circuit (23) from J, the circuit (23) outputs when the A side, D side both power is simultaneously applied, first memory circuit via the inhibit circuit INH ₁ (1
Apply a reset signal to 3) to lock the closing control circuit. The inhibit signal of the circuit INH ₁ is Y as described above.
It is given from the output terminal of the timer (17) and the reset operation is blocked when the Y timer is output.

An input signal from the output terminal J of the D side voltage detection circuit (22) to the circuit INH ₁ via the inhibit circuit INH ₃ and the circuit INH
Inhibit signal is given to ₂ . (24) is a second memory circuit, which is the power transmission state of the A side and D side power supplies (21, 22), and the controller.
The operation history of (8), in particular, the output state of the Y timer (17) is stored, and whether the lock signal is output or not is selected according to the stored state to control the reverse feed lock operation. The memory circuit (24) receives a set signal from the Y timer output terminal P _{2 and the} inhibit circuit IN from the output terminal H of the A side voltage detection circuit (21).
A reset signal is given to each via H ₄ . The output of the memory circuit (24) gives an inhibit signal to the inhibit circuit INH ₃ via the changeover switch SW. The inhibit signal of the inhibit circuit INH ₄ is given from the Y timer output terminal P _{2 and} the output terminal J of the D side voltage detection circuit (22).

The switch SW selects whether or not to make the reverse feed lock conditional. When the switch SW is closed, the switch SW operates according to the storage state of the storage circuit (24), that is, the storage circuit (24) is in the reset state. It is locked only when it is opened, and when it is opened, it is locked unconditionally if a backward signal is output. The Z ₂ timer is the Y timer (1
When a power failure occurs after 7) is output, the output is supplied to the inhibit circuit INH ₄ for a predetermined time to provide a dead time zone for reverse transmission lock, and the detection judgment is made after the state of the power distribution line has stabilized. It is a thing.

Next, the operation of the one configured as above will be described.

First, the state during normal power transmission is selected by the power source selection circuit (11) by the power source on the previously transmitted side, power is supplied to each part, and power is supplied from the power supply side and the load side, respectively. At this time, the output is provided in the A side voltage detection circuit (21), the D side voltage detection circuit (22), the control power supply circuit (12), the loop blocking circuit (23), and the first storage circuit (13). ), Second memory circuit (24), output circuit (16), Y timer (17), Z ₁ timer (18), Z ₂ timer (25)
Is.

(1) Progressive operation When power is transmitted from the A power supply side, power is supplied to the control power supply circuit (12) from the power supply selection circuit (11) and the transformer T ₁ and the control power supply circuit (12) outputs an output signal. Since (13) stores the output state, the storage circuit (13) also outputs an output. as a result The X timer maintains the output, but the output signal is INH
Keep the state cut by ₂ .

(2) Reverse feeding operation After power failure, when power is simply transmitted from the load side (D side), the memory circuit (13) stores the output state, so the rectifier circuit (1
When 2) outputs, the memory circuit (13) also outputs.

Then, the X timer receives an instantaneous input, but it is reset immediately and it locks and does not turn on.

In the case of SII type (SW closed) The memory circuit (24) stores the output state, and as soon as the control power supply circuit (12) outputs, the memory circuit (24) also outputs.

Thereafter, the same operation as the progressive operation is performed, and power is transmitted from the D side to the A side.

(3) Power failure closing constraint operation within the detection time During the progressive operation, if the output circuit (16) is ON and there is a power failure due to a line accident or the like during Y time, the following operations will stop. Therefore, the memory circuit (13) remains reset,
The storage circuit (13) does not output even when power is transmitted next, so the control circuit does not enter the operating state, that is, it is locked and the switch
(1) is not input. (4) Dual power supply restraint operation Memory circuit (13) → X timer (X time tick) (5) Short-time power transmission progressive operation When power is transmitted from the power supply side and a power failure occurs during X hours, (6) Restoration operation for reverse power failure during X hours (7) Power inactivity restraint insensitive operation during X hours When power is retransmitted from the power supply side within Z ₂ hours after power failure during normal power transmission, Therefore, the next time power is transmitted from the load side, the condition in (6) above is not satisfied and the lock does not occur → The same operation as the reverse operation (8) Release of closing constraint (9) Open delay operation When the controller (8) is closed, the output circuit outputs and Z ₁
Self-holding with a timer (18). When a power failure occurs in this state, the Z ₁ timer continues to output the output signal for Z ₁ hours,
If the power supply is restored within the Z ₁ time, the output circuit will be activated immediately by the Z ₁ timer output, and an output will be output to turn on the switch (1). When the power is restored after Z ₁ hour or more has passed, the output of the Z ₁ timer has disappeared and the forward or reverse operation is started. In this case, the output relay MC is once opened by the disappearance of the output of the control power supply circuit (12) due to a power failure.

(10) Manual operation ・ When the operation switch CS is set to the "on / return" side, the contact CS
a ₁ and CSa ₂ are closed. The contact CSa ₁ is an output circuit (1
6) It is driven by applying an input signal directly to release the closing constraint, the contact CSa ₂ bypasses the output contact Ca, and outputs the output to the terminal C even if the controller fails, and the switch (1) To put in.

When the operation switch CS is set to the "OFF" side, the power supply circuit is cut off at the contact CSb and the output of the control power supply circuit (12) is lost, so that the output of the controller circuit is lost and the switch (1) is opened.

· The operation switch CS when the "On" contact CSb closed, contacts CSa _1, CSa ₂ is opened, the operation to the above (1) to (9).

(11) Others (a) The voltage detection circuits (21, 22) have dual minimum power-on restraint minimum voltage (15V to 25V) and reverse feed restraint minimum voltage (15V to 2V, respectively).
5V) is detected and when a voltage exceeding the minimum voltage is applied, it is output to the secondary side.

(b) The loop blocking circuit (23) has a built-in timer for dual power supply restraint minimum time, and outputs power after a predetermined time when both power supplies are turned on.

Example of the present invention

FIG. 1 is an integrated circuit diagram of a faulty section detecting / separating device of the present invention,
FIG. 2 is a block diagram showing an embodiment of the present invention and has a configuration partially similar to that of FIGS. 3 and 4, and the same or corresponding portions are denoted by the same reference numerals and the description thereof will be omitted.

Explaining the difference between FIG. 1 and FIG. 3, a check relay group (81) and an operating state detecting means group (82) are added in the circuit of the failure section detection controller (8), and the A diagnostic operating device (9) and a self-diagnostic operating device (10) are provided. A central processing unit (hereinafter referred to as a CPU) (91), an interface (92) between the CPU (91) and a controller (8), a CPU (91) and a self-diagnosis device ( Built-in interface (93) with other circuits in 9), output relay group (94), and circuit error display device (95). The operating device (10) includes a circuit abnormality output device (101) and an optional diagnosis input device (102).

The controller (8) includes an input terminal Mi (i) for the relay group (81).
= 1,2, ... 9), an output terminal Pj (j = 1,2,3) for the operating state detecting means group (82) is provided, and the self-diagnosis device (9) is provided with the above M.
i, Pj are connected to each other by providing terminals of the same sign corresponding to i and Pj, and CP is further connected through the interface (92) in the device (9).
Connect to U (91). The CPU (91) is connected to the output relay group (94) through the internal terminal Mk '(k = 10, 11, ... 14) via the interface (93), and further through the output relay group, the output terminal Mk (k = 10). , 11, 14). Further, a terminal having the same sign is provided and connected to the circuit abnormality display device (95) corresponding to the terminal Mk '. In this case, 14 'is excluded. An input terminal S is provided from the microcomputer (91) through the interface (93). Terminals of the same sign corresponding to the terminals Mk and S are provided and connected to the operating device (10), and the terminals Mk (k = 10, 11, ... 14) are connected to the circuit abnormality output device (10) in the operating device (10).
In 1), the terminal S is connected to the optional diagnostic input device (102).

The inspection relay group (81) constitutes inspection circuit conditions when inspecting the internal control circuit of the controller (8), and includes auxiliary relays mi (i = 1, 2, ... 9) and each mi. Corresponds to the terminal Mi, and the relay mi operates by the input to the terminal Mi.
The operating state detecting means group (82) has a built-in means for deriving the operating state of each element circuit requiring inspection in the internal control circuit of the controller (8) as a signal, and these derived signals are connected to the terminal P.
It is input to the CPU (91) via j (j = 1, 2, 3). For example, in this case, “X time end”, “Y time end”, “lock operation” and the like are targeted.

The CPU (91) uses a predetermined program to inspect relay groups (8
1) is operated, the controller circuit is driven in a simulated manner, and the signal of the operating state of each element circuit is received to judge whether the operation is normally performed. When driving this simulated circuit, measures are taken so as not to affect the actual operation of the circuit. The determination of the circuit abnormality by the CPU (91) is output via the interface (93) and is displayed on the circuit abnormality display device (95), and at the time of arbitrary diagnosis input, the self-diagnosis operating device (via the output relay group (94). It is output to 10).
The self-diagnosis operating device (10) can perform remote automatic control and the like by exchanging signals with an external control device (not shown) from the circuit abnormality output device (101).

The arbitrary diagnosis input device (102) inputs a command to the microcomputer (91) when the inspection operation is forcibly re-executed during remote control. When the inspection operation is re-executed, it is executed after erasing the previous defect diagnosis result.

The circuit abnormality display device (95) is provided with, for example, "X time circuit abnormality display", "Y time circuit abnormality display", "lock circuit abnormality display", and "Z time circuit abnormality display".

The circuit abnormality output device (101) is provided with, for example, "X time circuit abnormality output", "Y time circuit abnormality output", "lock circuit abnormality output", "Z time circuit abnormality output" and "normal output". "Normal output" is output when all the inspections have been completed and no abnormality has occurred at the time of arbitrary diagnosis input.

The display on the circuit abnormality display device (95), the output signal of the circuit abnormality output device (101), or the external display by the signal is convenient because the fault content can be seen at a glance if the abnormality content is individually displayed as described above. However, if there is no need for individual display, it is sufficient to collectively perform "abnormal display". A display lamp may be used as the display means, but more reliable display is possible if a mechanical or magnetic display mechanism is used so that the display can be performed without trouble even during a power failure.

Next, the difference between FIG. 2 and FIG. 4 will be described. Hereinafter, the a-contact, b-contact, and c-contact of each relay mi (i = 1, 2, ... 9) are referred to as contacts mia, mib, and mic, respectively, and when there are two or more contacts, they are sequentially numbered. In FIG. 2, the control power source of each element unit is supplied from the output terminal G of the control power source circuit (12) through G ′ through the contact point m ₁ b and directly from a part of the terminal G. The contact m ₁ a gives a timed circuit reset signal to the X timer. A drive signal is directly applied from the terminal G to the output relay MC via the contact m ₂ a. From terminals G and Z ₁ timer input terminals through terminals a and b of contact m ₃ C ₁ , respectively,
Connect to the accumulator power supply (18a) of the Z ₁ timer (18) from terminal c. From terminals G and Y timer output terminals, through terminals a and b of contact m ₃ c ₂ respectively, and from terminal c to Y timer Z
_A signal is given to the Y timer (17) via the energy storage power source (17b) of the ₁ timer (hereinafter referred to as Y / Z ₁ timer) (17a) and the Y / Z ₁ timer (17a).

The Z ₁ timer (18) stores the output signal for a predetermined time (Z ₁ hour) when the output circuit (16) is in an output state and an instantaneous power failure occurs, and outputs the signal immediately if the power failure is restored within that time.
Is applied to the power supply to restore the output state.
a) is normally charged by the output of the output circuit (16),
Since there is a case where the diagnostic output circuit (16) is turned off, the primary control power supply terminal G is charged through the m ₃ c ₁ contact in order to secure the Z ₁ hour energy storage power supply. The Y / Z ₁ timer (17a), like the Z ₁ timer (18), outputs the output signal for a predetermined time (Y / Z
_It will be stored for ₁ hour, and if a power failure is restored within that time, a signal will be immediately given to reset the Y timer (17) to the output state. Actually, the output circuit (16) maintains the output state as described above. If possible, since the first memory circuit (13) is already set by the output of the Y timer (17) before the power failure, there is no problem even if the Y timer (17) is timed again. By providing this Y / Z ₁ timer (17a), the output of the Y timer can be restored in the event of an instantaneous power failure, and unnecessary Y time keeping operation is omitted. The energy storage power supply (17b) of the Y · Z ₁ timer (17a) is charged by the output of the Y timer (17) in the steady state, but the Y timer output may be turned off during diagnosis, and at that time as well. To secure a Y / Z ₁ hour energy storage power source, charge from the primary control power source terminal G via the m ₃ c ₂ contact.

The contact point m ₄ a uses the storage power source (26), which is always supplied with power from the primary control power source terminal G, as a power source, and the memory circuit (13).
And a set signal is given to (24). Contact m ₅ from terminal G
A signal is given to the output terminal of the output circuit (16) via a. This is to omit the waiting time (X time) of the X timer at the time of diagnosis.

With the Z ₂ timer, residual voltage remains for a while after the accident power failure, and it becomes the same phenomenon as when the A side accident was detected when the power was restored.
Since there is a risk of locking operation during power transmission on the side,
The input to the second memory circuit is cut off for a predetermined time (Z ₂ hours) for the residual voltage to disappear, that is, an inhibit signal is supplied to the inhibit circuit INH _4, and the lock circuit is clocked after Z ₂ hours. Is to restore. This Z ₂
The time is the reverse lock insensitive time.

Connect from terminal G through contact point m ₆ a to the Z ₂ timer (25) clocking power source (25 a). This energy storage power supply (25a) is charged by the output of the Y timer (17), and when the output of the Y timer (17) disappears at the time of power failure, the energy storage power supply (25a) causes the Z ₂ timer (25) to operate for Z ₂ hours. However, since the Y timer (17) may be turned off during diagnosis, at that time, charging is secured from the primary control power supply terminal G through the contact m ₆ a, and it is possible to shift to steady operation at any time. ing. Insert the contact m ₇ b into the inhibit signal circuit to the inhibit circuit INH ₄ provided from the output terminal P ₂ of the Y timer (17) and the output terminal of the Z ₂ timer, and open the contact m ₇ b during diagnosis to open the A side. Second by the output signal of the voltage detection circuit (21)
The reset signal circuit to the memory circuit (24) is turned on so that it can be reset. As a result, it is possible to display the status of Z ₂ timer completion of Z ₂ time and check the operation of the reverse feed lock and the _dual power supply lock.

Insert the contacts m ₈ b and m ₉ b into the power supply input circuits of the A side and D side voltage detection circuits (21, 22) respectively, and open and close these contacts m ₈ b and m ₉ b at the time of diagnosis. Shows the presence / absence of power on the D side.

Next, the operation of the one configured as above will be described.

The normal operation of the controller (8) of the original failure section detection device of this circuit is exactly the same as the operation in the circuit of FIG. 4, and the different parts, especially the diagnostic operation will be described here.

The diagnosis unit is composed of a self-diagnosis device (9), a self-diagnosis operating device (10), an inspection relay group (81) built in the controller (8), and an operation state detection means group (82).
The operation is totally controlled by the CPU (91) in (9). The diagnostic operation starts when the distribution line feeder to which the failure detection device belongs is in the stable operation state and in the normal power transmission state. For example, the controller of the failure detection device is started.
It is set to start the inspection 5 minutes after the completion of the X time of (8), the diagnosis of each item is executed in a fixed order according to the program preset in the CPU (91), and the process is cyclically repeated.

The content of the diagnosis shows typical operation in the same pattern as the actual operation state, inspects whether the function of each element circuit is within the specified range, and judges whether it is good or bad. The display device (9
Displayed in 5) and output to the operating device (10). The display (95) will allow you to spot abnormalities during patrol inspection and take corrective action.

The operating device (10) cooperates with the remote control central device (master station) to enable remote monitoring control. When it is determined to be abnormal by the diagnosis, the diagnosis is stopped by the command of the CPU (91), and the control circuit returns to the steady operation state. Further, the diagnosis operation is immediately interrupted when a change in the circuit such as a power failure or an accident occurs, the operation is shifted to a steady operation, and then the diagnosis is restarted when the feeder becomes in a stable state.

Generally, it is desirable that the order of the diagnostic items follows the order of the steady operation, but since there are some cases that are sudden, the order of the operations is stored in advance as a program and the operation is performed according to the program. As a specific example, for example, the diagnostic items and the diagnostic order are as follows.

X-time function Y-time function Y-time power failure turn-on lock function X-time power failure reverse-feed lock function X-time both power-on lock function Relay group mi (i = 1,2, ... 9) operation and functions are as follows Is.

m ₁ ... contact m ₁ b by forcibly closing than the primary control power secondary control power circuit, to emerge whether the state of the control power by transmission power failure of the power distribution line. At the same time, m ₁ a substitutes the X timer reset function when the power is lost.

m ₂ … During diagnosis (m _{1 is} operating) Contact relay m ₂ a Output relay MC
Is forcibly turned on, and the main circuit is in a steady operation state (power transmission state)
Therefore, the actual main circuit will not be affected by any operation of the control circuit.

m ₃ ... Y · Z ₁ timer, Z ₁ timer Switch to store energy by supplying power to the energy storage power supplies (18a) and (17b) for operation after power is lost both during steady state and during diagnosis The output circuit (16) at steady state due to the contacts m ₃ c ₁ and m ₃ c _2.
, And the output of the Y timer (17), and when the diagnosis is made, it is switched to the primary control power supply terminal G and charged. This makes Y
The operation power supply for the timer and Z ₁ timer is always secured after the power supply disappears.

m ₄ ... at diagnosis, the first and second storage circuit by the contacts m ₄ a (13), thereby revealing forcibly set, the power return state during and after normal power transmission power failure (24). This is to forcibly return to a normal state such as when the control circuit is locked by the diagnosis.

m ₅ ... time of diagnosis, the output circuit provides a signal to the output circuit by contact m ₅ a (16), forcibly generated output signal to generate a state where the output circuit by X timer signal has issued the output.

m ₆ … During diagnosis, the power is stored from the terminal G by the contact m ₆ a (25a)
Is charged and the loss of Y timer output due to the diagnostic operation is compensated.

m ₇ … By opening the contact m ₇ b, the inhibit signal sent from the energy storage power supply (25a) for reverse feed lock insensitive time (Z ₂ hours) is cut, and the second memory circuit (24) is reset. to enable. That is, it is possible to display the status of Z ₂ timer completion of Z ₂ time and check the operation of the reverse feed lock. In this state, when the second memory circuit (24) is reset by the output of the voltage detection circuit (21) by the A side power supply application, the inhibit signal of the inhibit circuit INH ₃ is cut,
When the output of the voltage detection circuit (22) is output by applying the D side power, the output and the output from the loop blocking circuit (23) cause the first
The memory circuit of is reset and the open state of the switch (1) appears. (In this case, the output of the Y timer is off due to the power failure immediately before.

disconnecting the input circuit of the A-side voltage detecting circuit (21) by m ₈ ... contact m ₈ b, thereby revealing the power failure condition of the A-side power supply.

disconnecting the input circuit of the D-side voltage detecting circuit (22) by m ₉ ... contact m ₉ b, thereby revealing the power failure condition of the D-side power supply.

Next, the sequential diagnosis operation will be described.

(21) First, in the state of normal power transmission, the power source on the side to which power is transmitted first is selected by the power source selection circuit (11), power is being supplied to each part, and voltage detection from the power source side and load side respectively. Signal is being supplied. At this time, the first memory circuit (1
3) stores the output state and outputs it at the same time as the power is supplied. In addition, the voltage output circuit (21), D side voltage detection circuit (22), control power supply circuit (1)
2), loop blocking circuit (23), first and second storage circuit (1
3), (24), output circuit (16), Y timer (17), Z ₁
Timer (18), a Y · Z ₁ timer (17a), Z ₂ timer (25).

To make the simulated power failure state appear from this state, m ₁ , m ₂
The output relay MC is forcibly held and the control circuit is disconnected at the contact m ₁ b. As a result, all circuits after the m ₁ b contact are opened, and a power failure occurs.

(22) Progressive operation (,) m _{1 When the} relay is opened and the contact m ₁ b is closed, the memory circuit (13)
Outputs the output immediately because it stores the output state.
(P _3: ON) (. In this case the relay m ₃ is a biasing and contact m ₉ b Open) As a result, The X timer maintains the output but its output signal is INH ₂
Continue to be cut by. If a predetermined time has passed in this state, it is determined that the normal power transmission state has been entered, and the function of is determined to be normal.

(23) Power failure closing lock operation within Y time () During the sequential operation, the output circuit (16) is ON and the relay m _{1 is} energized during the Y time interval and the contact m ₁ b is opened to show the power failure condition. The operation stops. In this state, P ₃ : remains OFF, relay M _{1 is} deenergized, contact m ₁ b is closed, and X timer is inoperative, that is, if P ₁ : OFF is maintained after X time has elapsed, lock operation is performed. Judge normal.

(24) Power failure reverse feed lock operation during X time () Contact m ₁ b open and contact m ₈ b open (contact
m ₉ b is left open from the beginning) and a power failure occurs,
Power transmission from the power supply side (A side) → blackout during X hours → memory circuit (24) is reset.

Next, when the contact m ₁ b is closed and the contact m ₉ b is closed to set the reverse feed state, the D side voltage detection circuit (22) → INH ₃ → INH ₁ → memory circuit (13) reset → lock (P ₃ : OFF) P ₃ : Detects that the lock is turned off and judges that the lock operation is normal.

(25) Dual power-on lock operation during X hours () Progressive operation X time interval (m ₁ b closed at this time, contact m ₈ b closed)
Then, the contact m ₃ b is closed.

P _3: detecting that it has been locked by OFF, the determination and locking operation properly.

(26) Z time operation When the forward feed operation is completed and normal power transmission is in progress, the contacts m ₁ b, m ₈ b, m ₉ b are opened respectively, and after Z hours, each contact is returned to the closed state. Signal P
If the states of ₁ , P ₂ , and P ₃ do not change, it is determined that the Z time operation is normal.

After the diagnosis of (21) to (26) is completed, the diagnosis is repeated cyclically every predetermined time.

If any of the above diagnostic items is judged to be out of order from the predetermined result, it is output from the microcomputer (91) and displayed on the display device (95), and the relay mi (i = 10, 11, ... 13). To the operating device (10).

In order to reconfirm the diagnosis result, by operating the arbitrary diagnosis input device (102) of the operation device (10), the abnormal output and the abnormal display are returned to a blank sheet and the diagnosis is repeated. If there is an abnormal condition, it is again displayed and output. Also outputs this case via the relay m ₁₄ determines that normal if no abnormal end the diagnosis of (21) to (26) in the "normal output".

In the above description, what is represented by a relay or a relay contact may be a non-contact type such as a semiconductor, a magnetic amplifier, a magnetic storage device or the like, and one generally used as a circuit opening / closing means can be used.

〔The invention's effect〕

In the fault zone detection controller installed on the distribution line, a means for automatically diagnosing the self-function at regular time intervals, a means for automatically diagnosing the self-function by an external diagnostic input, and a function for determining whether the function is normal or abnormal according to the result of the diagnosis. Since there is a means to output and display externally and a means to function instead of the circuit in case of abnormality, an alarm will be issued when an abnormality occurs in the circuit and it can be easily found during patrol, and prompt repair and inspection. It is possible to improve the reliability of the controller, minimize damage caused by an abnormal state occurring in the power line or power equipment in the distribution line, and prevent other healthy sections from being adversely affected.

[Brief description of drawings]

FIG. 1 is an integrated circuit diagram of the faulty section detecting device of the present invention, and FIG.
FIG. 3 is a block diagram showing an embodiment of the present invention, FIG. 3 is an integrated circuit diagram of a conventional fault zone detection device, and FIG. 4 is a block diagram showing a circuit example of a conventional fault zone detection device controller (8). , FIG. 5 is an explanatory diagram of a partial element circuit. (1): Sectional switch, (2): Main contact, (3): Electromagnetic coil for making, (4), (5): Operation transformer, (6): Power distribution line, (7): Load side power distribution line, (8): controller, (81): relay group, (82): operating state detecting means group, (9): self-diagnostic device, (91): central processing unit (CPU), ( 92),
(93): Interface, (10): Self-diagnosis operating device, (101): Circuit abnormality output device, (102): Optional diagnostic input device, CS: Operation switch, SW: Changeover switch, I
NH ₁ ~INH _5: inhibit circuit, CSa _1, CS
a ₂ , CSb: Operation switch contact, m ₁ b, m ₂ a, m ₃ c ₁ , m ₃ c
₂ , m ₄ a, m ₅ a, m ₆ a, m ₇ b, m ₈ b, m ₉ b: switching means (relay contact, MC: output relay, L: indicator light, T ₁ , T ₂ ,
T _3: the control transformer, A: Power-side operation terminal, D: load side operation terminal, B: common operation terminal, C: Output operation terminal, E, F: operating power supply terminal, G: 1 primary control power supply terminal, G ': 2 primary control power terminal, H: A side voltage detection circuit output terminal J: D-side voltage detection circuit output terminal P _1: X timer output terminal, P _2: Y timer output terminal,
P ₃ : First memory circuit output terminal.

Claims (7)

[Claims] 1. A faulty section having a power source selection circuit for selecting either the power source side or the load side of a distribution line section switch, and being driven by a control power source supplied from this power source selection circuit to drive and control the section switch. The detection device controller stores its own output state and outputs when the power is restored in the event of a power failure in the output state, the first storage circuit (13), which operates with the output of this storage circuit (13) to apply power. X timer (1
5), Output circuit (16) that operates with the X timer output to drive the division switch, Y which outputs a predetermined time Y for detecting the presence or absence of a load side accident after the division switch is turned ON, and Y which is output upon completion of the time. Each element circuit such as a first Z time circuit, that is, a Z ₁ timer circuit (18) that temporarily stores the output of the timer (17) and the output circuit (16) and restores the output in the event of a momentary power failure,
The first storage circuit (13) is reset by the output of the output circuit (16) and set by the output of the Y timer (17) so that the output is performed in the set state. A second memory circuit (24) that is set by the output of each voltage detection circuit (21, 22) of the electric wire (7) and the Y timer (17) and reset by the output of the power supply side voltage detection circuit (21) ), An inhibit circuit INH ₄ which is inserted into the reset signal circuit of the second memory circuit (24) and receives an inhibit signal from the output of the load side voltage detection circuit (22) and the Y timer output, and the inhibit signal output from the Y timer Second Z for temporarily storing and supplying the output to the inhibit circuit INH ₄ for a predetermined time after the power failure.
A time circuit, that is, a Z ₂ time circuit (25) and a load side voltage detection circuit (22) are inserted into a reset signal circuit to the first storage circuit (13), and an inhibit signal is output by the output of the second storage circuit. Given inhibit circuit IN
A fault section including a loop blocking circuit (23) which outputs a signal for resetting the first memory circuit when it receives inputs of both H ₃ and each of the power supply side and load side voltage detection circuits (21, 22) In the controller for the detection device, an opening / closing means (m) which is inserted between the above-mentioned control power supply, that is, the primary control power supply and the secondary control power supply for supplying power to each element circuit, and which expresses a simulated power failure state (m
₁ b), switching means (m ₂ a) for connecting the output relay MC for switching on / off the switch directly to the primary control power supply to forcibly maintain the closed state,
Opening / closing means (m ₃ c ₁ ) forming a charging circuit for diagnosis in the energy storage power supply circuit (18a) of the Z ₁ time circuit (18), and opening / closing forcibly setting the memory circuit (13) using the energy storage power supply as a power source Means (m
₄ a) Switching means (m ₅ a) for forcibly applying a signal from the primary control power supply to the output terminal of the output circuit (16), Z ₂ time circuit (2
Steady 5) The energy-storing power circuit (25a) which is charged by the Y output of the timer, switching means at diagnosis of forming a charging circuit from the primary control power (m ₆ a), Y timer output, Z ₂ opening and closing the inhibit signal to the inhibit circuit INH ₄ by the timer output, to cut off the inhibit signal at diagnosis supply side voltage of the output generating instantaneous detection circuit short inhibit circuit INH _4, the reset of the second memory circuit (24) switching means for enabling (m ₇ b), it is inserted in the voltage detection circuit of the power supply side and load side (21, 22), forcibly opening the output of the circuit (21, 22), the power source side load Switching means (m ₈ b, m) that simulates the presence / absence of power on the side distribution line (6,7)
₉ b), these opening / closing means (m ₁ b, m ₂ a, m ₃ c ₁ , m ₃ c ₂ , m ₄ a, m ₅ a, m ₆
A self-diagnosis device for a controller for a fault section detection device, comprising a central processing control device (91) for program-controlling a, m ₇ b, m ₈ b, m ₉ b). 2. A Z time circuit (17a) which is attached to a Y timer (17) and restores its output in the event of a momentary power failure, and the energy storage power supply circuit (17b) of this Z time circuit (17a) is primary for diagnosis. A self-diagnosis device for a controller for a faulty section detection device according to claim 1 or claim _2, further comprising opening / closing means (m ₃ c ₂ ) for forming a charging circuit from the control power supply. 3. An X timer output signal P ₁ , a Y timer output signal P ₂ and an output signal P ₃ of a first memory circuit (13) are sent to a central processing unit (91) as data indicating the state of a faulty section detecting device. Claim 1 characterized by inputting
A self-diagnosis device for a controller for a faulty section detection device according to the item. 4. The control for a fault section detecting device according to claim 1, further comprising a circuit abnormality display device (101) for displaying a diagnosis result by an output of the central processing and control device (91). Self-diagnosis device. 5. The fault section detection device according to claim 1, further comprising a circuit abnormality output device (101) for outputting a diagnosis result to the outside by the output of the central processing control device (91). Controller self-diagnosis device. 6. The fault section according to claim 1, characterized in that the self-diagnosis device (9) is provided with an arbitrary diagnostic input device (102) for arbitrarily giving an input for a diagnostic operation from the outside. Self-diagnostic device for controller for detector. 7. Self-diagnosis of a controller for a faulty section detecting device according to claim 1, further comprising opening / closing means SW for opening / closing and selecting an output of the second memory circuit (24). apparatus.