JPH0648767Y2 - The jumper chip - Google Patents

The jumper chip

Info

Publication number
JPH0648767Y2
JPH0648767Y2 JP3423789U JP3423789U JPH0648767Y2 JP H0648767 Y2 JPH0648767 Y2 JP H0648767Y2 JP 3423789 U JP3423789 U JP 3423789U JP 3423789 U JP3423789 U JP 3423789U JP H0648767 Y2 JPH0648767 Y2 JP H0648767Y2
Authority
JP
Japan
Prior art keywords
plate
jumper chip
pattern
vertical
leg
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
JP3423789U
Other languages
Japanese (ja)
Other versions
JPH02126374U (en
Inventor
敏郎 尾形
昭人 三浦
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Koa Corp
Original Assignee
Koa Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Koa Corp filed Critical Koa Corp
Priority to JP3423789U priority Critical patent/JPH0648767Y2/en
Publication of JPH02126374U publication Critical patent/JPH02126374U/ja
Application granted granted Critical
Publication of JPH0648767Y2 publication Critical patent/JPH0648767Y2/en
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

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  • Coupling Device And Connection With Printed Circuit (AREA)
  • Multi-Conductor Connections (AREA)

Description

【考案の詳細な説明】 〔産業上の利用分野〕 本考案は、プリント基板上にギヤツプを設けて対向する
一対のパターン間を短絡するジヤンパーチツプに関す
る。
DETAILED DESCRIPTION OF THE INVENTION [Industrial field of application] The present invention relates to a jumper chip which is provided with a gear chip on a printed circuit board and short-circuits between a pair of opposing patterns.

〔従来の技術〕[Conventional technology]

第4図及び第5図は従来のジヤンパーチツプの説明図
で、第4図はジヤンパーチツプの斜視図、第5図はこの
ジヤンパーチツプをプリント基板上のパターンに半田付
けした状態の断面図である。
4 and 5 are explanatory views of a conventional jumper chip, FIG. 4 is a perspective view of the jumper chip, and FIG. 5 is a sectional view of the jumper chip soldered to a pattern on a printed circuit board.

図面において1は厚みを有する四角形の耐熱性樹脂より
成る絶縁基台、2は絶縁基台1の上面、側面、下面を覆
う上面板3、垂直脚4、水平脚5より成る電極板で、ジ
ヤンパーチツプ本体6は絶縁基台1と電極板2とで構成
されており、電極板2の表面には全面に渉つて半田メツ
キ層7が形成されている。8はプリント基板、9は該基
板8にギヤツプ10を設けて対向配置されたパターンで、
上記のジヤンパーチツプ本体6は水平脚5をパターン9
上に載置した後、垂直脚4及び水平脚5とパターン9を
半田11にて固定している。12は、前記パターン9に直交
して設けられた他のパターンで、絶縁基台1の下面を通
過している。
In the drawing, 1 is an insulating base made of a heat-resistant rectangular resin having a thickness, 2 is an electrode plate composed of a top plate 3, a vertical leg 4 and a horizontal leg 5 for covering the upper, side and lower surfaces of the insulating base 1, and a jumper chip. The main body 6 is composed of an insulating base 1 and an electrode plate 2, and a solder plating layer 7 is formed over the entire surface of the electrode plate 2. Reference numeral 8 is a printed circuit board, 9 is a pattern in which a gap 10 is provided on the circuit board 8 and arranged to face each other.
The jumper chip body 6 has the horizontal legs 5 in a pattern 9
After mounting on top, the vertical leg 4 and the horizontal leg 5 and the pattern 9 are fixed with solder 11. Reference numeral 12 is another pattern provided orthogonal to the pattern 9 and passes through the lower surface of the insulating base 1.

〔考案が解決しようとする課題〕[Problems to be solved by the device]

ところで、上記のジヤンパーチツプ本体6は電極板2の
表面の全面に半田メツキ層7が形成されているため、半
田付けの際、半田11が垂直脚4を昇り、更に上面板3の
中央部まで昇り、この半田11は上面板3よりプリント基
板8上に滴下して、パターン12が不所望にシヨートする
という課題があり、また、電極板2の上面板3と垂直脚
4が交差する角部は金属板で覆われておらず、この部分
での半田付けはないので、半田付け強度が小で、ジヤン
パーチツプ6が位置ずれを起した場合は、パターン12と
垂平脚5が接近し、パターン12の不所望のシヨートの可
能性は更に増大する可能性がある。
By the way, since the solder plating layer 7 is formed on the entire surface of the electrode plate 2 in the jumper chip body 6, the solder 11 rises up the vertical leg 4 and further rises to the central portion of the top plate 3 during soldering. However, there is a problem that this solder 11 drops from the upper surface plate 3 onto the printed circuit board 8 and the pattern 12 undesirably shorts, and the corner portion where the upper surface plate 3 of the electrode plate 2 and the vertical leg 4 intersect is Since it is not covered with a metal plate and there is no soldering at this part, the soldering strength is low and if the jumper chip 6 is displaced, the pattern 12 and the vertical leg 5 come close to each other and the pattern 12 The potential for unwanted shorts of the can be further increased.

本考案は、上記のような課題を解決すめためのもので、
本考案の目的は、半田付け強度が大であり、且つ不所望
のパターンのシヨートを未然に防止することの出来るジ
ヤンパーチツプを提供しようとするものである。
The present invention is intended to solve the above problems,
An object of the present invention is to provide a jumper chip having a high soldering strength and capable of preventing an undesirable pattern of shortage.

〔課題を解決するための手段〕[Means for Solving the Problems]

本考案は、上記の課題を解決するために、1枚の金属板
より絶縁基台の上面、側面、底面を覆う上面板、垂直
脚、水平脚より成る電極板を形成し、絶縁基台と電極板
とでジヤンパーチツプ本体を構成し、プリント基板上に
ギヤツプを設けて形成した一対のパターン上に前記水平
脚を載置し、前記垂直脚と水平脚を前記パターンに半田
付けして成るジヤンパーチツプにおいて、前記電極板の
上面板と垂直脚が交差する角部に上面板と垂直脚を連結
するサイド電極を設け、垂直脚、水平脚、サイド電極の
各表面、及び上面板の端部に半田メツキ層を設けてい
る。
SUMMARY OF THE INVENTION In order to solve the above-mentioned problems, the present invention forms an electrode plate composed of a metal plate to cover an upper surface, a side surface and a bottom surface of an insulating base, a vertical leg, and a horizontal leg to form an insulating base. In a jumper chip formed by forming a jumper chip main body with an electrode plate, placing the horizontal leg on a pair of patterns formed by providing a gear chip on a printed circuit board, and soldering the vertical leg and the horizontal leg to the pattern. A side electrode connecting the upper plate and the vertical leg is provided at a corner where the upper plate and the vertical leg of the electrode plate intersect, and soldering solder is provided on each surface of the vertical leg, the horizontal leg, the side electrode, and the end of the upper plate. Layers are provided.

〔作用〕[Action]

本考案は、上記した如く、電極板の上面板は端部にのみ
半田メツキ層が形成されているので、半田付けの際、半
田は上面板の中央部まで昇ついていかない。従つて上面
板の中央部分からの半田の滴下はないので、半田付けの
際のパターンの不所望のシヨートは避けられる。
In the present invention, as described above, since the solder plating layer is formed only on the end portions of the upper surface plate of the electrode plate, the solder does not rise to the central portion of the upper surface plate during soldering. Therefore, since solder does not drip from the central portion of the top plate, undesired shorts of the pattern during soldering can be avoided.

また、半田付けは、垂直脚、水平脚以外にサイド電極で
も行われるので、半田付け強度は従来に比し補強され
る。
Further, since soldering is performed not only on the vertical legs and the horizontal legs but also on the side electrodes, the soldering strength is reinforced as compared with the conventional one.

従つてジヤンパーチツプの位置ずれに起因するパターン
の不所望のシヨートもない。
Therefore, there is no undesired short of the pattern due to the displacement of the jumper chip.

〔実施例〕〔Example〕

以下に本考案の実施例を添付の図面に基づき説明する。 Embodiments of the present invention will be described below with reference to the accompanying drawings.

第1図〜第3図は本考案の実施例の説明図で、第1図は
ジヤンパーチツプの斜視図、第2図(イ)、(ロ)、
(ハ)はジヤンパーチツプの製造工程の一例を示した説
明図、第3図はジヤンパーチツプをプリント基板に半田
付けした状態を示す断面図である。
1 to 3 are explanatory views of an embodiment of the present invention. FIG. 1 is a perspective view of a jumper chip, and FIGS. 2 (a), (b),
(C) is an explanatory view showing an example of a manufacturing process of a jumper chip, and FIG. 3 is a sectional view showing a state in which the jumper chip is soldered to a printed board.

なお、第4図、第5図に示した従来例と同一部分には同
一符号を付して重複する説明は省略する。
The same parts as those of the conventional example shown in FIGS. 4 and 5 are designated by the same reference numerals, and the duplicated description will be omitted.

本考案と従来例との相違点は、電極板2の上面板3と垂
直脚4が交差する角部に上面板3と垂直脚4を連結する
サイド電極13を設けたこと、及び電極板2の垂直脚4、
水平脚5、サイド電極13の各々の表面及び上面板3の両
端部にメツキ層7を設けた点である。
The difference between the present invention and the conventional example is that a side electrode 13 for connecting the upper plate 3 and the vertical leg 4 is provided at a corner where the upper plate 3 and the vertical leg 4 of the electrode plate 2 intersect. Vertical leg 4,
The plating layer 7 is provided on each surface of the horizontal leg 5 and the side electrode 13 and on both ends of the top plate 3.

以下に、ジヤンパーチツプ本体の製造工程の一例を第2
図を用いて説明する。
Below is a second example of the manufacturing process of the jumper chip body.
It will be described with reference to the drawings.

先づ、(イ)図に示すように、帯状のステンレス板14の
上側及び下側に突部15を設け、左右の点々部分に半田メ
ツキ層7を形成する。次に点線16で直角に折り曲げると
共に、点線17で折り曲げと絞り加工を行い。(ロ)図に
示す如く、垂直脚4と上面板3が交差する角部に上面板
3と垂直脚4を連結するサイド電極13を形成する。次に
(ロ)図に示すように、この電極板2を絶縁基台1にか
ぶせた後、(ハ)図に示すように垂直脚4の先端を絶縁
基台1の底面17に沿つて内方に折り曲げる。而る時は、
上面板3の両端部、垂直脚4、水平脚5、サイド電極13
の各々の表面には半田メツキ層7が露出する。
First, as shown in (a), the protrusions 15 are provided on the upper and lower sides of the strip-shaped stainless steel plate 14, and the solder plating layer 7 is formed on the left and right points. Next, it is bent at a right angle along the dotted line 16 and bent and drawn at the dotted line 17. (B) As shown in the figure, side electrodes 13 for connecting the upper plate 3 and the vertical legs 4 are formed at the corners where the vertical legs 4 and the upper plate 3 intersect. Next, as shown in (b), after covering this electrode plate 2 on the insulating base 1, the tip of the vertical leg 4 is placed inside along the bottom surface 17 of the insulating base 1 as shown in (c). Bend in one direction. At that time,
Both ends of the top plate 3, vertical legs 4, horizontal legs 5, side electrodes 13
The solder plating layer 7 is exposed on each surface of the.

このようにして組立てられたジヤンパーチツプ本体6を
プリント基板8のパターン9に半田付けするには、水平
脚5をパターン9上に載置し、パターン9と水平脚5、
垂直脚4、サイド電極13をパターン9に半田11にて固定
する。
In order to solder the jumper chip body 6 assembled in this way to the pattern 9 of the printed circuit board 8, the horizontal leg 5 is placed on the pattern 9, and the pattern 9 and the horizontal leg 5 are
The vertical leg 4 and the side electrode 13 are fixed to the pattern 9 with solder 11.

本考案の上記の実施例によれば、半田付けの際、半田11
の一部は垂直脚4を登つて上面板3の端部まで昇るが、
上面板3の中央部には半田メツキ層7が形成されておら
ず、ステンレス板14が露出しているので、半田11は中央
部分までは昇らず、従つて、中央部の両側から半田11が
プリント基板8上に滴下することはない。従つてパター
ン9と交差する他のパターン12の不所望のシヨートはな
い。
According to the above embodiment of the present invention, when soldering, the solder 11
Part of the climbs the vertical leg 4 to the end of the top plate 3,
Since the solder plating layer 7 is not formed in the central portion of the upper surface plate 3 and the stainless steel plate 14 is exposed, the solder 11 does not rise to the central portion, so that the solder 11 is applied from both sides of the central portion. It is not dropped on the printed circuit board 8. Therefore, there are no other undesired shorts of pattern 12 that intersect pattern 9.

また、電極板2は、従来の垂直脚4、水平脚5に加えて
サイド電極13でもパターン9と半田付けが行われるの
で、従来に比し半田付け強度は大となり、ジヤンパーチ
ツプ本体6の位置ずれを起すことがなく、この点でも、
パターン12の不所望のシヨートはない。
In addition to the conventional vertical leg 4 and horizontal leg 5, the electrode plate 2 is soldered to the pattern 9 on the side electrode 13 as well, so that the soldering strength is greater than in the conventional case, and the position of the jumper chip body 6 is displaced. In this respect, without causing
There are no unwanted shorts of pattern 12.

また、電極板2の上面板3には回路チエツク機能をもた
せており、上面板3にテストピンを立てることがある
が、上面板3の表面を梨地にしたり、斜線状に刻印を施
したりして粗面を形成すれば、テストピンのすべりを防
止出来回路チエツクを容易に行える。
The upper plate 3 of the electrode plate 2 has a circuit check function, and a test pin may be set on the upper plate 3, but the surface of the upper plate 3 may be satin-finished or may be marked in a diagonal line. If a rough surface is formed by using this method, slippage of the test pin can be prevented and circuit check can be performed easily.

〔考案の効果〕[Effect of device]

上述したように、電極板の上面板まで半田が付着するこ
とがないので、この部分から半田の適下はなく、パター
ンの不所望のシヨートは回避出来る。また、プリント基
板上のパターンとの半田付けは、垂直脚、水平脚、サイ
ド電極の3ヶ所で行われるので、半田付け強度は大であ
り、ジヤンパーチツプの位置ずれはなく、この点でもパ
ターンの不所望のショートを回避出来る。
As described above, since the solder does not adhere to the upper surface plate of the electrode plate, the solder is not properly applied from this portion, and an undesired short of the pattern can be avoided. Further, since the soldering with the pattern on the printed circuit board is carried out at three places of the vertical leg, the horizontal leg, and the side electrode, the soldering strength is large, and there is no displacement of the jumper chip. The desired short circuit can be avoided.

【図面の簡単な説明】[Brief description of drawings]

第1図〜第3図は本考案の実施例の説明図で、第1図は
ジヤンパーチツプの斜視図、第2図(イ)、(ロ)、
(ハ)はジヤンパーチツプの製造工程の一例を示した説
明図、第3図はジヤンパーチツプをプリント基板上のパ
ターンに半田付けした状態の断面図、第4図及び第5図
は従来例の説明図で、第4図はジヤンパーチツプの斜視
図、第5図はこのジヤンパーチツプをプリント基板上の
パターンに半田付けした状態の断面図である。 1……絶縁基台、2……電極板、3……上面板、4……
垂直脚、5……水平脚、6……ジヤンパーチツプ本体、
7……半田メツキ層、8……プリント基板、9,12……パ
ターン、10……ギヤツプ、13……サイド電極、14……ス
テンレス板(金属板)。
1 to 3 are explanatory views of an embodiment of the present invention. FIG. 1 is a perspective view of a jumper chip, and FIGS. 2 (a), (b),
(C) is an explanatory view showing an example of a manufacturing process of a jumper chip, FIG. 3 is a sectional view of a condition in which the jumper chip is soldered to a pattern on a printed circuit board, and FIGS. 4 and 5 are explanatory views of a conventional example. FIG. 4 is a perspective view of the jumper chip, and FIG. 5 is a cross-sectional view of the jumper chip soldered to a pattern on a printed circuit board. 1 ... Insulating base, 2 ... Electrode plate, 3 ... Top plate, 4 ...
Vertical leg, 5 ... Horizontal leg, 6 ... Jeanper chip body,
7 ... Solder plating layer, 8 ... Printed circuit board, 9, 12 ... Pattern, 10 ... Gear cup, 13 ... Side electrode, 14 ... Stainless plate (metal plate).

Claims (1)

【実用新案登録請求の範囲】[Scope of utility model registration request] 【請求項1】1枚の金属板より、絶縁基台の上面、側
面、底面を覆う上面板、垂直脚、水平脚より成る電極板
を形成し、絶縁基台と電極板とでジヤンパーチツプ本体
を構成し、プリント基板上にギヤツプを設けて形成した
一対のパターン上に前記水平脚を載置し、前記垂直脚と
水平脚を前記パターンに半田付けして成るジヤンパーチ
ツプにおいて、前記電極板の上面板と垂直脚が交差する
角部に上面板と垂直板を連結するサイド電極を設け、垂
直脚、水平脚、サイド電極の表面及び上面板の端部に半
田メツキ層を設けたことを特徴とするジヤンパーチツ
プ。
1. An electrode plate comprising a top plate, a side plate and a bottom plate for covering an insulating base, a vertical leg and a horizontal leg is formed from a single metal plate, and a jumper chip body is formed by the insulating base and the electrode plate. In the jumper chip, which is configured by placing the horizontal leg on a pair of patterns formed by providing gears on a printed circuit board and soldering the vertical leg and the horizontal leg to the pattern, a top plate of the electrode plate Side electrodes that connect the upper plate and the vertical plate are provided at the corners where the vertical legs intersect with the vertical legs, and solder plating layers are provided on the surfaces of the vertical legs, the horizontal legs, the side electrodes, and the end portions of the upper plate. The jumper chip.
JP3423789U 1989-03-28 1989-03-28 The jumper chip Expired - Lifetime JPH0648767Y2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP3423789U JPH0648767Y2 (en) 1989-03-28 1989-03-28 The jumper chip

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP3423789U JPH0648767Y2 (en) 1989-03-28 1989-03-28 The jumper chip

Publications (2)

Publication Number Publication Date
JPH02126374U JPH02126374U (en) 1990-10-18
JPH0648767Y2 true JPH0648767Y2 (en) 1994-12-12

Family

ID=31538532

Family Applications (1)

Application Number Title Priority Date Filing Date
JP3423789U Expired - Lifetime JPH0648767Y2 (en) 1989-03-28 1989-03-28 The jumper chip

Country Status (1)

Country Link
JP (1) JPH0648767Y2 (en)

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN112010398A (en) * 2019-05-31 2020-12-01 夏普株式会社 Container with a lid

Also Published As

Publication number Publication date
JPH02126374U (en) 1990-10-18

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