JPH0645734A - Printed-wiring board and manufacturing method thereof - Google Patents

Printed-wiring board and manufacturing method thereof

Info

Publication number
JPH0645734A
JPH0645734A JP29533491A JP29533491A JPH0645734A JP H0645734 A JPH0645734 A JP H0645734A JP 29533491 A JP29533491 A JP 29533491A JP 29533491 A JP29533491 A JP 29533491A JP H0645734 A JPH0645734 A JP H0645734A
Authority
JP
Japan
Prior art keywords
hole
insulating resin
via hole
wiring board
solder resist
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP29533491A
Other languages
Japanese (ja)
Inventor
Hirobumi Nakamura
博文 中村
Osamu Hirai
修 平井
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp filed Critical NEC Corp
Priority to JP29533491A priority Critical patent/JPH0645734A/en
Publication of JPH0645734A publication Critical patent/JPH0645734A/en
Pending legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/0094Filling or covering plated through-holes or blind plated vias, e.g. for masking or for mechanical reinforcement
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/30Assembling printed circuits with electric components, e.g. with resistor
    • H05K3/32Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits
    • H05K3/34Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits by soldering
    • H05K3/3452Solder masks

Landscapes

  • Non-Metallic Protective Coatings For Printed Circuits (AREA)
  • Printing Elements For Providing Electric Connections Between Printed Circuits (AREA)

Abstract

PURPOSE:To enable a resin to be filled up without fail by a method wherein a printed-wiring board having a via hole and a through hole is immersed in a sensitive insulating resin solution and after filling up these holes with the insulating resin, the insulating resin inside the through hole is removed during the exposure/development steps but leaving the insulating resin inside the via hole only. CONSTITUTION:An insulating substrate 1 whereon a through hole 4, a via hole 3 and a circuit pattern 2 are formed is immersed in a sensitive insulating solution so as to fill up the through hole 4 and the via hole 3 with an insulating resin 6. Next, the whole surface is coated with a solder resist for exposure and development step. At this time, if the through hole 4 side is masked to be shielded from ultraviolet rays but the via hole 3 side is not masked to be exposed to the ultraviolet rays, the solder resist inside and on the periphery of the through hole 4 is removed together with the insulating resin 6 on the through hole 4 sidewall during the development step. On the other hand, a solder resist pattern 5 is formed on the via hole 3 while the inside thereof is filled up with the insulating resin 6.

Description

【発明の詳細な説明】Detailed Description of the Invention

【0001】[0001]

【産業上の利用分野】本発明は印刷配線板およびその製
造方法に関し、特にビアホール内に感光性絶縁樹脂が充
填された印刷配線板およびその製造方法に関する。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a printed wiring board and a method for manufacturing the same, and more particularly to a printed wiring board having via holes filled with a photosensitive insulating resin and a method for manufacturing the same.

【0002】[0002]

【従来の技術】印刷配線板は基本的には、図4(a)に
示すように絶縁基板1と、この絶縁基板1の表裏の面上
に形成された回路パターン2と、この表裏の面上の回路
パターン2を接続するための導電性の貫通孔とからな
る。貫通孔としては二種類ある。一つは、表裏の回路パ
ターン2を電気的に接続するためだけのものであり、ビ
アホール3と呼ばれる。他の一つは、二つの面上の回路
パターン2を接続するとともに電子部品などを実装する
場合にこの部品のリード端子を挿入しはんだ付けするた
めのものであり、スルーホール4と呼ばれるものであ
る。スルーホールとビアホールに関してその孔径に着目
すると、上記のような用途の違いから、スルーホールの
孔径の方がビアホールの孔径よりも大きいのが一般的で
ある。本発明で対象とするのは上記のビアホール3であ
る。ここで、表面実装部品が搭載されるパッドとビアホ
ールとの位置関係に関していえば、ビアホールは通常、
パッドから配線を引き出してパッドを避けた位置に設け
られるが、近年、電子装置の実装密度が高くなってきて
いるのにつれて印刷配線板の配線パターンが高密度化さ
れてきており、これに伴なってビアホールがパッドの位
置に直接配置されるものも増えてきている状況である。
2. Description of the Related Art A printed wiring board basically has an insulating substrate 1, a circuit pattern 2 formed on the front and back surfaces of the insulating substrate 1, and a front and back surface as shown in FIG. It is composed of a conductive through hole for connecting the upper circuit pattern 2. There are two types of through holes. One is only for electrically connecting the front and back circuit patterns 2, and is called a via hole 3. The other is to connect the circuit patterns 2 on the two surfaces and to insert and solder the lead terminals of this component when mounting an electronic component or the like, which is called a through hole 4. is there. Focusing on the hole diameters of the through hole and the via hole, the hole diameter of the through hole is generally larger than the hole diameter of the via hole due to the above-mentioned difference in application. The target of the present invention is the via hole 3 described above. Here, regarding the positional relationship between the pad on which the surface mount component is mounted and the via hole, the via hole is usually
The wiring is pulled out from the pad and provided at a position avoiding the pad. In recent years, as the mounting density of electronic devices has increased, the wiring pattern of the printed wiring board has been densified. As a result, the number of via holes placed directly on the pad is increasing.

【0003】このような印刷配線板のビアホールは、以
下に述べるような理由により、部品実装の時などには開
口部が塞がれていることが望ましい。 (a)部品が搭載された印刷配線板を真空吸着により搬
送する場合に、ビアホール3が塞がれていないとビアホ
ール3から空気がもれて真空吸着が確実に行われない。 (b)印刷配線板に部品をアッセンブリする工程でフロ
ーソルダリングによるはんだ付けを行う場合、フラック
スがビアホール3を通して印刷配線板の裏面(はんだ
面)より表面(部品面)へ噴き出して来てしまう。 (c)表面実装部品をクリームはんだで印刷配線板には
んだ付けする実装方法の場合、表面実装部品接続用パッ
ドにビアホールが設けられていると、リフローはんだ付
け時に、溶融したクリームはんだがビアホールに吸い込
まれ表面実装部品と印刷配線板とのはんだ接合が不十分
になる。
It is desirable that the via hole of such a printed wiring board is closed at the time of mounting components, for the reasons described below. (A) When a printed wiring board on which a component is mounted is conveyed by vacuum suction, if the via hole 3 is not closed, air leaks from the via hole 3 and vacuum suction is not reliably performed. (B) When soldering by flow soldering is performed in the step of assembling components on the printed wiring board, flux is spouted from the back surface (solder surface) of the printed wiring board to the front surface (component surface) through the via hole 3. (C) In the case of the mounting method of soldering the surface mount component to the printed wiring board with cream solder, if the surface mount component connecting pad has a via hole, the melted cream solder is sucked into the via hole during reflow soldering. The solder joint between the surface mount component and the printed wiring board becomes insufficient.

【0004】以下に従来の印刷配線板におけるビアホー
ルの塞ぎ方について説明する。図4(a)は、ドライフ
ィルム状の感光性ソルダレジストを用いて露光・現像処
理を行ないソルダレジストパターン5を形成したもので
ある。この場合、ビアホール3の中には樹脂が封入され
ておらず、膜厚が50〜150μm程度のフィルム状の
ソルダレジストパターン5により、ビアホール3の表裏
面をテンティングさせた形状になっている。
A method of closing a via hole in a conventional printed wiring board will be described below. FIG. 4A shows a solder resist pattern 5 formed by exposing and developing using a dry film-like photosensitive solder resist. In this case, the via hole 3 is not filled with resin, and the via hole 3 has a shape in which the front and back surfaces of the via hole 3 are tented by the film-shaped solder resist pattern 5 having a film thickness of about 50 to 150 μm.

【0005】図4(b)は、液状のソルダレジストをス
クリーンコート法によりコーティングし、露光および現
像処理を行ないソルダレジストパターン5を形成したも
のである。この場合、ビアホール3をソルダレジストパ
ターン5で確実にテンティングさせることは困難であ
り、図4(b)に示す様なビアホール3の開口部の一部
が途切れた形状となることが多い。
FIG. 4B shows a solder resist pattern 5 which is formed by coating a liquid solder resist by a screen coating method and exposing and developing it. In this case, it is difficult to reliably tent the via hole 3 with the solder resist pattern 5, and a part of the opening of the via hole 3 as shown in FIG. 4B is often discontinuous.

【0006】更に図4(c)は、液状のソルダレジスト
をスプレーコート法によりコーティングし、露光および
現像処理を行ないソルダレジストパターン5を形成した
ものである。この場合、ビアホール3内には、ソルダレ
ジスト層はほとんど形成されない。
Further, FIG. 4C shows a solder resist pattern 5 which is formed by coating a liquid solder resist by a spray coating method and exposing and developing it. In this case, the solder resist layer is hardly formed in the via hole 3.

【0007】この他にも、液状のソルダレジストをカー
テンのように上から下に流し、このカーテン状のソルダ
レジストを横切るようにして印刷配線板をくぐらせて、
ソルダレジストを塗布するというカーテンコート法など
もあるが、いずれの方法でも液状のソルダレジストを用
いる方法では、粘度の関係などでビアホール3を確実に
塞ぐことは難しい以上述べた様に、従来のビアホールの
塞ぎ方は主にビアホール3の開口部を塞ぐ方法であっ
て、ビアホール3の内部に確実に樹脂を詰め込んだ形状
の印刷配線板はなかった。
In addition to this, a liquid solder resist is flown downward from above like a curtain, and the printed wiring board is passed across the curtain-shaped solder resist,
Although there is a curtain coating method of applying a solder resist, it is difficult to surely close the via hole 3 due to the viscosity or the like by the method using the liquid solder resist in any of the methods, as described above. The method of closing the via hole was mainly a method of closing the opening of the via hole 3, and there was no printed wiring board in which the inside of the via hole 3 was reliably filled with resin.

【0008】[0008]

【発明が解決しようとする課題】上述した従来の印刷配
線板には次のような欠点がある。 図4(a)に示したようなドライフィルム状のソルダ
レジストを用いたもので は、ビアホール3はソルダレ
ジストパターン5により表裏面の開口部を塞がれ てい
る。しかしビアホール3の内部は空洞となっている。こ
のためテンティン グが破損する可能性をもっている。
一方、テンィングの破損を防止するために は、ドライ
フィルム状のソルダレジストの膜厚を約100μm前後
に厚くして テンティング強度を出す必要がある。この
場合には膜厚の厚いソルダレジスト を露光,現像処理
することとなるためソルダレジストパターンの解像性が
悪く なる。 図4(b)および(c)に示す方法やカーテンコート
法などによるものでは、 液状のソルダレジストを使用
しているため、ビアホール3内に樹脂(ソルダレ ジス
ト)を確実に詰め込むことが出来ない。
The above-mentioned conventional printed wiring board has the following drawbacks. In the case where the dry film solder resist as shown in FIG. 4A is used, the via holes 3 are covered with the solder resist pattern 5 to close the openings on the front and back surfaces. However, the inside of the via hole 3 is hollow. This can damage the tenting.
On the other hand, in order to prevent breakage of the tenting, it is necessary to increase the thickness of the dry film solder resist to about 100 μm to obtain tenting strength. In this case, the resolution of the solder resist pattern deteriorates because the thick solder resist is exposed and developed. In the method shown in FIGS. 4B and 4C, the curtain coating method, or the like, since the liquid solder resist is used, the resin (solder resist) cannot be reliably filled in the via hole 3.

【0009】本発明は、以上のような従来の欠点を解決
し、ビアホールの開口部を塞ぐだけでなく、内部にまで
確実に絶縁樹脂を詰め込んだ印刷配線板を提供すること
を目的とする。
An object of the present invention is to solve the above-mentioned conventional drawbacks and to provide a printed wiring board in which not only the opening of the via hole is closed but also the insulating resin is surely filled inside.

【0010】[0010]

【課題を解決するための手段】本発明の印刷配線板は、
絶縁基板の一方の面に形成された回路パターンとこの縁
基板の他方の面に形成された回路パターンとを導通する
ビアホールを含む印刷配線板において、ビアホール内に
感光性絶縁樹脂が充填されていることを特徴とする。
The printed wiring board of the present invention comprises:
In a printed wiring board including a via hole that conducts a circuit pattern formed on one surface of an insulating substrate and a circuit pattern formed on the other surface of the edge substrate, the via hole is filled with a photosensitive insulating resin. It is characterized by

【0011】そして、このような印刷配線板は、スルー
ホール及びビアホールを含む印刷配線板のビアホール内
及びスルーホール内に感光性絶縁樹脂を浸漬孔詰めする
工程と、印刷配線板の表面に付着している余剰な感光性
絶縁樹脂を除去する工程と、この印刷配線板の表面に感
光性ソルダレジストの層を形成する工程と、このソルダ
レジスト層の所定部分を感光させ現像してソルダレジス
トパターンを形成すると同時に、前述のスルーホール内
の感光性絶縁樹脂をこの時の現像処理で除去する工程と
を含むことを特徴とする印刷配線板の製造方法によって
製造される。
In such a printed wiring board, a step of dipping the photosensitive insulating resin in the via hole and the through hole of the printed wiring board including the through hole and the via hole by dipping and filling the surface of the printed wiring board. Removing the excess photosensitive insulating resin, forming a layer of photosensitive solder resist on the surface of this printed wiring board, and exposing a predetermined portion of this solder resist layer to development to form a solder resist pattern. At the same time as the formation, the step of removing the photosensitive insulating resin in the through hole described above is removed by the developing process at this time, and the method is manufactured by a method for manufacturing a printed wiring board.

【0012】[0012]

【実施例】次に、本発明の最適な実施例について図面を
参照して説明する。図1(a)から(e)は、本発明の
第1の実施例を工程順に説明するための断面図である。
DESCRIPTION OF THE PREFERRED EMBODIMENTS Next, an optimum embodiment of the present invention will be described with reference to the drawings. 1A to 1E are cross-sectional views for explaining a first embodiment of the present invention in process order.

【0013】先ず、図1(a)に示すように、スルーホ
ール4,ビアホール3および回路パターン2が形成され
ている絶縁基板1を約1ポイズ程度に調整した感光性絶
縁液中に浸漬し、図1(b)に示すように、スルーホー
ル4およびビアホール3内に絶縁樹脂6を詰め込む。こ
の場合、前述したように、スルーホール4の孔径の方が
ビアホール3の孔径よりも大きいので、ビアホール3に
おいてはその内部に絶縁樹脂6が詰め込まれるのに対し
て、スルーホール4においてはその内壁に絶縁樹脂の層
が形成される。
First, as shown in FIG. 1A, the insulating substrate 1 having the through holes 4, the via holes 3 and the circuit pattern 2 is dipped in a photosensitive insulating liquid adjusted to about 1 poise, As shown in FIG. 1B, the through hole 4 and the via hole 3 are filled with the insulating resin 6. In this case, since the hole diameter of the through hole 4 is larger than the hole diameter of the via hole 3 as described above, the insulating resin 6 is packed in the via hole 3 while the inner wall of the through hole 4 is filled. An insulating resin layer is formed on.

【0014】次に、絶縁基板1を対向した2本のゴムロ
ーラの間を通して、図1(c)に示すように、絶縁基板
1の表裏の面に付着している余剰な絶縁樹脂6を除去す
る。その後、図1(d)に示すように、約3ポイズ前後
に調整されたソルダレジストをスプレーコート法により
塗布し、更に紫外線を用いて露光を行う。そして約1%
の濃度の炭酸ナトリウム溶液を用いて現像を行う。この
時、スルーホール4の方には紫外線が当らないようにマ
スキングしておき、ビアホール3の方に紫外線が当るよ
うにしておくと、現像した時に、スルーホール4の内部
や周辺のソルダレジストがスルーホール4側璧の絶縁樹
脂とともに除去される。一方、ビアホール3の上にはソ
ルダレジストパターン5が形成され、内部には絶縁樹脂
6が詰め込まれたままになって、図1(e)に示すよう
な、ビアホール3内に絶縁樹脂が詰め込まれた印刷配線
板を得る。
Next, as shown in FIG. 1C, the excess insulating resin 6 attached to the front and back surfaces of the insulating substrate 1 is removed by passing the insulating substrate 1 between two rubber rollers facing each other. . After that, as shown in FIG. 1D, a solder resist adjusted to about 3 poise is applied by a spray coating method, and further exposed to ultraviolet rays. And about 1%
Development is carried out using a sodium carbonate solution having a concentration of. At this time, if the through holes 4 are masked so that they are not exposed to the ultraviolet rays and the via holes 3 are exposed to the ultraviolet rays, the solder resist inside or around the through holes 4 may be developed at the time of development. It is removed together with the insulating resin on the side wall of the through hole 4. On the other hand, the solder resist pattern 5 is formed on the via hole 3, and the insulating resin 6 remains filled inside, so that the via hole 3 is filled with the insulating resin as shown in FIG. Get the printed wiring board.

【0015】次に、本発明の第2の実施例について説明
する。図2(a)から(e)は、本発明の第2の実施例
を工程順に説明するための断面図である。先ず、図2
(a)に示すように、スルーホール4,ビアホール3お
よび回路パターン2が形成されている絶縁基板1を約1
ポイズ程度に調整された感光性絶縁樹脂の液の中に浸漬
し、図2(b)に示すように、スルーホール4およびビ
アホール3内に絶縁樹脂6を詰め込む。次に、絶縁基板
1を対向した2本のゴムローラの間を通して、図2
(c)に示すように、絶縁基板1の表裏の面に付着して
いる余剰な絶縁樹脂6を除去し、さらに約80℃で約1
0分間程度乾燥して絶縁樹脂6のべたつきをなくす。そ
の後、図2(d)に示すように、約200ポイズ前後に
調整されたソルダレジストをスクリーンコート法により
塗布し、紫外線を用いて露光を行う。そして約1%の濃
度の炭酸ナトリウム溶液を用いて現像を行なって、図2
(e)に示すような、ビアホール3内に絶縁樹脂が詰め
込まれた印刷配線板を得る。
Next, a second embodiment of the present invention will be described. 2A to 2E are sectional views for explaining the second embodiment of the present invention in the order of steps. First, FIG.
As shown in (a), the insulating substrate 1 on which the through holes 4, the via holes 3 and the circuit pattern 2 are formed is approximately 1
The insulating resin 6 is filled in the through hole 4 and the via hole 3 as shown in FIG. Next, the insulating substrate 1 is passed between two rubber rollers facing each other, and
As shown in (c), the excess insulating resin 6 adhering to the front and back surfaces of the insulating substrate 1 is removed, and further at about 80 ° C. for about 1
Dry for about 0 minutes to eliminate the stickiness of the insulating resin 6. After that, as shown in FIG. 2D, a solder resist adjusted to about 200 poise is applied by a screen coating method, and exposure is performed using ultraviolet rays. Then, development is performed using a sodium carbonate solution having a concentration of about 1%, and
As shown in (e), a printed wiring board having insulating resin filled in the via holes 3 is obtained.

【0016】本実施例によれば、ソルダレジストを塗布
する前に絶縁樹脂6を乾燥しているので、ビアホール内
に詰め込まれた絶縁樹脂が製造工程の途中で流れ出して
しまうことを防ぎ、より確実にビアホールを塞ぐことが
できる。このことは、印刷配線板が多層化されて厚くな
ったりビアホールの孔径が大きくなったりして、内部に
詰め込まれる絶縁樹脂の量が多量になったような時に特
に顕著な効果を示す。
According to this embodiment, since the insulating resin 6 is dried before applying the solder resist, it is possible to prevent the insulating resin filled in the via hole from flowing out during the manufacturing process, which is more reliable. The beer hole can be closed. This has a particularly remarkable effect when the printed wiring board is multi-layered and becomes thicker or the diameter of the via hole is increased, so that the amount of the insulating resin packed in the inside is increased.

【0017】次に、本発明の第3の実施例について述べ
る。本実施例が、第1の実施例および第2の実施例と異
なるのは、余剰の絶縁樹脂を取り除く方法である。本実
施例では、スキージーを用いて余分な絶縁樹脂を取り除
く。以下に本実施例の製造方法を、図1および図3を用
いて説明する。図3(a)から(c)は、本実施例にお
ける絶縁樹脂浸漬孔詰め工程および絶縁樹脂除去工程を
説明するための、装置の構成の概略を示す図である。
Next, a third embodiment of the present invention will be described. The present embodiment differs from the first and second embodiments in the method of removing excess insulating resin. In this embodiment, a squeegee is used to remove excess insulating resin. The manufacturing method of this embodiment will be described below with reference to FIGS. 3A to 3C are schematic views of the configuration of the apparatus for explaining the insulating resin immersion hole filling step and the insulating resin removing step in the present embodiment.

【0018】本実施例では、これからビアホールに絶縁
樹脂を孔詰めしようとする絶縁基板1(図1(a)に示
す)の表裏の面上の対向する2辺上にマスキングテープ
を貼り付ける。これは、図3(a)に示すように、送り
出し側のテープリール7と巻き取り側のテープリール8
との間に張り渡された上側のマスキングテープ9と、同
様にしてこのマスキングテープ9に対向して張り渡され
た下側のマスキングテープ10との間を、絶縁基板1を
図中に矢印で示す方向に搬送することによって行なわれ
る。このマスキングテープは、後の工程で絶縁基板を取
り扱やすくし、また絶縁基板の周辺部を保護するための
ものである。
In this embodiment, masking tape is attached to the two opposite sides of the front and back surfaces of the insulating substrate 1 (shown in FIG. 1A) whose via hole is to be filled with the insulating resin. As shown in FIG. 3A, this is the tape reel 7 on the sending side and the tape reel 8 on the winding side.
An insulating substrate 1 is indicated by an arrow in the drawing between an upper masking tape 9 stretched between the upper and the lower masking tape and a lower masking tape 10 similarly stretched across the masking tape 9. It is performed by transporting in the direction shown. This masking tape is for facilitating handling of the insulating substrate in a later step and for protecting the peripheral portion of the insulating substrate.

【0019】次に、この状態で、図3(b)に示すよう
に、絶縁基板1を浸漬装置11に搬送して絶縁樹脂の液
中に浸漬し、図1(b)に示すように、ビアホール3内
に絶縁樹脂6を詰め込む。
Next, in this state, as shown in FIG. 3 (b), the insulating substrate 1 is conveyed to the dipping device 11 and dipped in the liquid of the insulating resin, as shown in FIG. 1 (b). The via hole 3 is filled with the insulating resin 6.

【0020】更にこの後、図3(c)に示すように、絶
縁基板1を巻き取りリール8側に搬送し上下のスキージ
ー12の間を通すことによって、図1(c)に示すよう
に、絶縁基板1の表裏の面上の余分な絶縁樹脂を取り除
く。
After that, as shown in FIG. 3C, the insulating substrate 1 is conveyed to the take-up reel 8 side and passed between the upper and lower squeegees 12, so that as shown in FIG. Excess insulating resin on the front and back surfaces of the insulating substrate 1 is removed.

【0021】以後、第1の実施例または第2の実施例と
同様の工程を経て、図1(e)に示すようなビアホール
3内に絶縁樹脂6が詰め込まれた印刷配線板を得る。
After that, through the same steps as those of the first or second embodiment, a printed wiring board having the insulating resin 6 filled in the via hole 3 as shown in FIG. 1E is obtained.

【0022】このように、絶縁基板上の余分な絶縁樹脂
を取り除く方法としては、適当なものを選ぶことができ
る。
As described above, an appropriate method can be selected as a method for removing the excess insulating resin on the insulating substrate.

【0023】[0023]

【発明の効果】以上説明したように、本発明では、ビア
ホールとスルーホールとを有する印刷配線板を感光性の
絶縁樹脂の液中に浸漬してこれらの孔の中に絶縁樹脂を
詰め込んだ後、スルーホール内部の絶縁樹脂を、その上
の感光性ソルダーレジストを露光・現像する際に、この
ソルダーレジスととともに除去している。一方、ビアホ
ール内の絶縁樹脂は露光により硬化させることによって
現像後でもビアホール内に残るようにしている。これに
より、本発明によればビアホールの内部に確実に樹脂を
詰め込むことができる。
As described above, according to the present invention, after the printed wiring board having the via holes and the through holes is dipped in the liquid of the photosensitive insulating resin and the insulating resin is filled in these holes. The insulating resin inside the through hole is removed together with the solder resist when the photosensitive solder resist on the through hole is exposed and developed. On the other hand, the insulating resin in the via hole is cured by exposure so that it remains in the via hole even after development. As a result, according to the present invention, the resin can be reliably filled in the via hole.

【0024】従って、印刷配線板を真空吸着により搬送
する際に真空吸着が出来ず搬送できなくなるということ
がなくなる。又、アッセンブリ時のビアホールからのフ
ラックスの吹き出しやクリームはんだの吸込み等の問題
がなくなる。
Therefore, when the printed wiring board is transported by vacuum suction, the vacuum suction cannot be performed and the printed wiring board cannot be transported. Further, there are no problems such as flux blown out from the via hole and suction of cream solder during assembly.

【0025】更に、従来のドライフィルムを用いた製造
方法では、ソルダレジストパターンの膜厚が100μm
前後と厚くなるが、本発明によれば液状ソルダレジスト
を用いるため30〜40μmの膜厚で形成できる。従っ
てソルダレジストパターンの解像度を犠牲にすることな
く良好なパターン状態を保ったままで、ビアホールの孔
詰めが可能となる。
Further, in the conventional manufacturing method using a dry film, the thickness of the solder resist pattern is 100 μm.
According to the present invention, a liquid solder resist is used, but the film thickness can be 30 to 40 μm. Therefore, the via holes can be filled while maintaining a good pattern state without sacrificing the resolution of the solder resist pattern.

【図面の簡単な説明】[Brief description of drawings]

【図1】本発明の第1の実施例を工程順に説明するため
の図である。
FIG. 1 is a diagram for explaining a first embodiment of the present invention in process order.

【図2】本発明の第2の実施例を工程順に説明するため
の図である。
FIG. 2 is a diagram for explaining a second embodiment of the present invention in process order.

【図3】本発明の第3の実施例における絶縁樹脂浸漬孔
詰め工程および絶縁樹脂除去工程を説明するための、装
置の構成の概略を示す図である。
FIG. 3 is a diagram showing a schematic configuration of an apparatus for explaining an insulating resin immersion hole filling step and an insulating resin removing step in a third example of the present invention.

【図4】従来の印刷配線板においてビアホールを塞ぐ方
法を説明するための図である。
FIG. 4 is a diagram for explaining a method of closing a via hole in a conventional printed wiring board.

【符号の説明】[Explanation of symbols]

1 絶縁基板 2 回路パターン 3 ビアホール 4 スルーホール 5 ソルダレジストパターン 6 絶縁樹脂 7,8 テープリール 9,10 マスキングテープ 11 浸漬装置 12 スキージー 1 Insulating Substrate 2 Circuit Pattern 3 Via Hole 4 Through Hole 5 Solder Resist Pattern 6 Insulating Resin 7,8 Tape Reel 9,10 Masking Tape 11 Immersion Device 12 Squeegee

─────────────────────────────────────────────────────
─────────────────────────────────────────────────── ───

【手続補正書】[Procedure amendment]

【提出日】平成4年3月23日[Submission date] March 23, 1992

【手続補正1】[Procedure Amendment 1]

【補正対象書類名】明細書[Document name to be amended] Statement

【補正対象項目名】0014[Correction target item name] 0014

【補正方法】変更[Correction method] Change

【補正内容】[Correction content]

【0014】次に、絶縁基板1を対向した2本のゴムロ
ーラの間を通して、図1(c)に示すように、絶縁基板
1の表裏の面に付着している余剰な絶縁樹脂6を除去す
る。その後、図1(d)に示すように、約3ポイズ前後
に調整されたソルダレジストをスプレーコート法により
塗布し80〜90℃で10〜30分間乾燥したあと、更
に紫外線を用いて露光を行う。そして約1%の濃度の炭
酸ナトリウム溶液を用いて現像を行う。この時、スルー
ホール4の方には紫外線が当らないようにマスキングし
ておき、ビアホール3の方に紫外線が当るようにしてお
くと、現像した時に、スルーホール4の内部や周辺のソ
ルダレジストがスルーホール4側璧の絶縁樹脂とともに
除去される。一方、ビアホール3の上にはソルダレジス
トパターン5が形成され、内部には絶縁樹脂6が詰め込
まれたままになって、図1(e)に示すような、ビアホ
ール3内に絶縁樹脂が詰め込まれた印刷配線板を得る。
Next, as shown in FIG. 1C, the excess insulating resin 6 attached to the front and back surfaces of the insulating substrate 1 is removed by passing the insulating substrate 1 between two rubber rollers facing each other. . Thereafter, as shown in FIG. 1D, a solder resist adjusted to about 3 poise is applied by a spray coating method, dried at 80 to 90 ° C. for 10 to 30 minutes, and then exposed to ultraviolet rays. . Then, development is performed using a sodium carbonate solution having a concentration of about 1%. At this time, if the through holes 4 are masked so that they are not exposed to the ultraviolet rays and the via holes 3 are exposed to the ultraviolet rays, the solder resist inside or around the through holes 4 may be developed at the time of development. It is removed together with the insulating resin on the side wall of the through hole 4. On the other hand, the solder resist pattern 5 is formed on the via hole 3, and the insulating resin 6 remains filled inside, so that the via hole 3 is filled with the insulating resin as shown in FIG. Get the printed wiring board.

【手続補正2】[Procedure Amendment 2]

【補正対象書類名】明細書[Document name to be amended] Statement

【補正対象項目名】0015[Name of item to be corrected] 0015

【補正方法】変更[Correction method] Change

【補正内容】[Correction content]

【0015】次に、本発明の第2の実施例について説明
する。図2(a)から(e)は、本発明の第2の実施例
を工程順に説明するための断面図である。先ず、図2
(a)に示すように、スルーホール4,ビアホール3お
よび回路パターン2が形成されている絶縁基板1を約1
ポイズ程度に調整された感光性絶縁樹脂の液の中に浸漬
し、図2(b)に示すように、スルーホール4およびビ
アホール3内に絶縁樹脂6を詰め込む。次に、絶縁基板
1を対向した2本のゴムローラの間を通して、図2
(c)に示すように、絶縁基板1の表裏の面に付着して
いる余剰な絶縁樹脂6を除去し、さらに約80℃で約1
0分間程度乾燥して絶縁樹脂6のべたつきをなくす。そ
の後、図2(d)に示すように、約200ポイズ前後に
調整されたソルダレジストをスクリーンコート法で、ま
たは1〜6ポイズ程度のソルダーレジストをスプレーコ
ート法、カーテンコート法により塗布し、紫外線を用い
て露光を行う。そして約1%の濃度の炭酸ナトリウム溶
液を用いて現像を行なって、図2(e)に示すような、
ビアホール3内に絶縁樹脂が詰め込まれた印刷配線板を
得る。
Next, a second embodiment of the present invention will be described. 2A to 2E are sectional views for explaining the second embodiment of the present invention in the order of steps. First, FIG.
As shown in (a), the insulating substrate 1 on which the through holes 4, the via holes 3 and the circuit pattern 2 are formed is approximately 1
The insulating resin 6 is filled in the through hole 4 and the via hole 3 as shown in FIG. Next, the insulating substrate 1 is passed between two rubber rollers facing each other, and
As shown in (c), the excess insulating resin 6 adhering to the front and back surfaces of the insulating substrate 1 is removed, and further at about 80 ° C. for about 1
Dry for about 0 minutes to eliminate the stickiness of the insulating resin 6. Then, as shown in FIG. 2D, a solder resist adjusted to about 200 poises is applied by a screen coating method, or a solder resist of about 1 to 6 poises is applied by a spray coating method or a curtain coating method, and ultraviolet rays are applied. Is used to perform exposure. Then, development is performed using a sodium carbonate solution having a concentration of about 1%, and as shown in FIG.
A printed wiring board having insulating resin filled in the via holes 3 is obtained.

【手続補正3】[Procedure 3]

【補正対象書類名】明細書[Document name to be amended] Statement

【補正対象項目名】0023[Name of item to be corrected] 0023

【補正方法】変更[Correction method] Change

【補正内容】[Correction content]

【0023】[0023]

【発明の効果】以上説明したように、本発明では、ビア
ホールとスルーホールとを有する印刷配線板を感光性の
絶縁樹脂の液中に浸漬してこれらの孔の中に絶縁樹脂を
詰め込んだ後、スルーホール内部の絶縁樹脂を、その上
の感光性ソルダレジストを露光・現像する際に、このソ
ルダーレジストとともに除去している。一方、ビアホー
ル内の絶縁樹脂は露光により硬化させることによって現
像後でもビアホール内に残るようにしている。これによ
り、本発明によればビアホールの内部に確実に樹脂を詰
め込むことができる。
As described above, according to the present invention, after the printed wiring board having the via holes and the through holes is dipped in the liquid of the photosensitive insulating resin and the insulating resin is filled in these holes. The insulating resin inside the through hole is removed together with the solder resist when the photosensitive solder resist on the through hole is exposed and developed. On the other hand, the insulating resin in the via hole is cured by exposure so that it remains in the via hole even after development. As a result, according to the present invention, the resin can be reliably filled in the via hole.

Claims (2)

【特許請求の範囲】[Claims] 【請求項1】 絶縁基板の一方の面に形成された回路パ
ターンと前記絶縁基板の他方の面に形成された回路パタ
ーンとを導通するビアホールを含む印刷配線板におい
て、前記ビアホール内に感光性絶縁樹脂が充填されてい
ることを特徴とする印刷配線板。
1. A printed wiring board including a via hole for electrically connecting a circuit pattern formed on one surface of an insulating substrate to a circuit pattern formed on the other surface of the insulating substrate, wherein a photosensitive insulation is provided in the via hole. A printed wiring board characterized by being filled with resin.
【請求項2】 スルーホール及びビアホールを含む印刷
配線板の前記ビアホール内及び前記スルーホール内に感
光性絶縁樹脂を浸漬孔詰めする工程と、 前記印刷配線板の表面に付着している余剰な前記感光性
絶縁樹脂を除去する工程と、 前記印刷配線板の表面に感光性ソルダレジストの層を形
成する工程と、 前記ソルダレジスト層の所定部分を感光させ現像してソ
ルダレジストパターンを形成すると同時に前記スルーホ
ール内の前記感光性絶縁樹脂を前記現像処理で除去する
工程とを含むことを特徴とする印刷配線板の製造方法。
2. A step of filling a photosensitive insulating resin in the via hole and in the through hole of a printed wiring board including a through hole and a via hole by immersing a hole in the printed wiring board, and an excess of the excess adhesive adhering to the surface of the printed wiring board. Removing the photosensitive insulating resin; forming a layer of a photosensitive solder resist on the surface of the printed wiring board; exposing a predetermined portion of the solder resist layer to development to form a solder resist pattern; And a step of removing the photosensitive insulating resin in the through holes by the developing process.
JP29533491A 1991-03-27 1991-11-12 Printed-wiring board and manufacturing method thereof Pending JPH0645734A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP29533491A JPH0645734A (en) 1991-03-27 1991-11-12 Printed-wiring board and manufacturing method thereof

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
JP6224891 1991-03-27
JP3-62248 1991-03-27
JP29533491A JPH0645734A (en) 1991-03-27 1991-11-12 Printed-wiring board and manufacturing method thereof

Publications (1)

Publication Number Publication Date
JPH0645734A true JPH0645734A (en) 1994-02-18

Family

ID=26403312

Family Applications (1)

Application Number Title Priority Date Filing Date
JP29533491A Pending JPH0645734A (en) 1991-03-27 1991-11-12 Printed-wiring board and manufacturing method thereof

Country Status (1)

Country Link
JP (1) JPH0645734A (en)

Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH05283834A (en) * 1992-03-10 1993-10-29 Nec Toyama Ltd Printed-circuit board and manufacture thereof
WO2002056652A3 (en) * 2001-01-13 2002-10-24 Conti Temic Microelectronic Method for the production of an electronic component
US6629367B2 (en) * 2000-12-06 2003-10-07 Motorola, Inc. Electrically isolated via in a multilayer ceramic package
CN105517370A (en) * 2015-11-27 2016-04-20 广州兴森快捷电路科技有限公司 Circuit board pad machining method
CN115802623A (en) * 2022-12-15 2023-03-14 皆利士多层线路版(中山)有限公司 Circuit board and hole plugging process thereof

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH02121386A (en) * 1988-10-29 1990-05-09 Canon Inc Printed resistor board
JPH03175691A (en) * 1989-12-04 1991-07-30 Nec Corp Manufacture of printed wiring board

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH02121386A (en) * 1988-10-29 1990-05-09 Canon Inc Printed resistor board
JPH03175691A (en) * 1989-12-04 1991-07-30 Nec Corp Manufacture of printed wiring board

Cited By (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH05283834A (en) * 1992-03-10 1993-10-29 Nec Toyama Ltd Printed-circuit board and manufacture thereof
US6629367B2 (en) * 2000-12-06 2003-10-07 Motorola, Inc. Electrically isolated via in a multilayer ceramic package
WO2002056652A3 (en) * 2001-01-13 2002-10-24 Conti Temic Microelectronic Method for the production of an electronic component
US6929975B2 (en) 2001-01-13 2005-08-16 Conti Temic Microelectronic Gmbh Method for the production of an electronic component
CN105517370A (en) * 2015-11-27 2016-04-20 广州兴森快捷电路科技有限公司 Circuit board pad machining method
CN115802623A (en) * 2022-12-15 2023-03-14 皆利士多层线路版(中山)有限公司 Circuit board and hole plugging process thereof

Similar Documents

Publication Publication Date Title
JPH0645734A (en) Printed-wiring board and manufacturing method thereof
JPH04186792A (en) Printed wiring board and manufacture thereof
GB2120017A (en) Making printed circuit boards having plated through-holes
JPH04267397A (en) Manufacture of printed wiring board
JPH05283834A (en) Printed-circuit board and manufacture thereof
JP3879132B2 (en) Printed wiring board manufacturing method and printed wiring board
JP3711569B2 (en) Printed wiring board and manufacturing method thereof
JP2003198078A (en) Printed wiring board and method of manufacturing the same
JPH04186894A (en) Manufacture of printed wiring board
JP2712997B2 (en) Solder resist processing method in manufacturing printed wiring board
JP3686717B2 (en) Mask for solder paste printing
KR100204612B1 (en) Printing method of printed circuit board
JPH01231397A (en) Preparation of printed wiring board
JPH0242794A (en) Method of soldering parts
JPH09298219A (en) Manufacture of tab tape carrier
JPH0430494A (en) Printed wiring board and manufacture thereof
JPH01321683A (en) Manufacture of printed wiring board
JPH0794854A (en) Printed wiring board with viahole
JPH0548249A (en) Surface treating method for printed circuit board
JPH08186357A (en) Printed wiring board and manufacture thereof
JP2002171065A (en) Manufacturing method for multi-layered printed wiring board
GB2026918A (en) Component-carrying printed circuit board
JP2003142812A (en) Mounting method for chip component
JPH05129764A (en) Manufacture of printed wiring board
JPH0494588A (en) Manufacture of printed circuit board

Legal Events

Date Code Title Description
A02 Decision of refusal

Free format text: JAPANESE INTERMEDIATE CODE: A02

Effective date: 19970701