JPH04186792A - Printed wiring board and manufacture thereof - Google Patents
Printed wiring board and manufacture thereofInfo
- Publication number
- JPH04186792A JPH04186792A JP31536290A JP31536290A JPH04186792A JP H04186792 A JPH04186792 A JP H04186792A JP 31536290 A JP31536290 A JP 31536290A JP 31536290 A JP31536290 A JP 31536290A JP H04186792 A JPH04186792 A JP H04186792A
- Authority
- JP
- Japan
- Prior art keywords
- hole
- ink
- printed wiring
- wiring board
- insulating substrate
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 238000004519 manufacturing process Methods 0.000 title claims description 9
- 239000000758 substrate Substances 0.000 claims abstract description 17
- 238000005530 etching Methods 0.000 claims abstract description 15
- 239000004020 conductor Substances 0.000 claims abstract description 10
- 229920001187 thermosetting polymer Polymers 0.000 claims abstract description 9
- 238000000034 method Methods 0.000 claims description 18
- 229910000679 solder Inorganic materials 0.000 claims description 13
- 239000010410 layer Substances 0.000 claims description 5
- 238000007747 plating Methods 0.000 claims description 5
- 238000005553 drilling Methods 0.000 claims description 3
- 238000007639 printing Methods 0.000 claims description 3
- 239000002344 surface layer Substances 0.000 claims description 2
- 238000005476 soldering Methods 0.000 abstract description 11
- HEMHJVSKTPXQMS-UHFFFAOYSA-M Sodium hydroxide Chemical compound [OH-].[Na+] HEMHJVSKTPXQMS-UHFFFAOYSA-M 0.000 abstract description 6
- ORTQZVOHEJQUHG-UHFFFAOYSA-L copper(II) chloride Chemical compound Cl[Cu]Cl ORTQZVOHEJQUHG-UHFFFAOYSA-L 0.000 abstract description 4
- 238000000576 coating method Methods 0.000 abstract description 3
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical compound [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 abstract description 2
- 239000010949 copper Substances 0.000 abstract description 2
- 229910052802 copper Inorganic materials 0.000 abstract description 2
- 229960003280 cupric chloride Drugs 0.000 abstract description 2
- 239000003960 organic solvent Substances 0.000 abstract description 2
- 239000000463 material Substances 0.000 description 4
- 230000007547 defect Effects 0.000 description 2
- 230000000694 effects Effects 0.000 description 2
- 239000000945 filler Substances 0.000 description 2
- UOCLXMDMGBRAIB-UHFFFAOYSA-N 1,1,1-trichloroethane Chemical compound CC(Cl)(Cl)Cl UOCLXMDMGBRAIB-UHFFFAOYSA-N 0.000 description 1
- 238000005516 engineering process Methods 0.000 description 1
- 238000003475 lamination Methods 0.000 description 1
- 239000007788 liquid Substances 0.000 description 1
- 210000003739 neck Anatomy 0.000 description 1
- 238000007761 roller coating Methods 0.000 description 1
- 238000005507 spraying Methods 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/0094—Filling or covering plated through-holes or blind plated vias, e.g. for masking or for mechanical reinforcement
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/02—Apparatus or processes for manufacturing printed circuits in which the conductive material is applied to the surface of the insulating support and is thereafter removed from such areas of the surface which are not intended for current conducting or shielding
- H05K3/06—Apparatus or processes for manufacturing printed circuits in which the conductive material is applied to the surface of the insulating support and is thereafter removed from such areas of the surface which are not intended for current conducting or shielding the conductive material being removed chemically or electrolytically, e.g. by photo-etch process
- H05K3/061—Etching masks
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/40—Forming printed elements for providing electric connections to or between printed circuits
- H05K3/42—Plated through-holes or plated via connections
- H05K3/425—Plated through-holes or plated via connections characterised by the sequence of steps for plating the through-holes or via connections in relation to the conductive pattern
- H05K3/427—Plated through-holes or plated via connections characterised by the sequence of steps for plating the through-holes or via connections in relation to the conductive pattern initial plating of through-holes in metal-clad substrates
Abstract
Description
【発明の詳細な説明】
〔産業上の利用分野〕
本発明はプリント配線板およびその製造方法に関し、特
に導通専用スルーホールを有するプリント配線板および
その製造方法に関する。DETAILED DESCRIPTION OF THE INVENTION [Industrial Field of Application] The present invention relates to a printed wiring board and a method of manufacturing the same, and more particularly to a printed wiring board having through holes dedicated to conduction and a method of manufacturing the same.
近年、電子機器の軽薄短小化、並びに、高機能化に伴い
、プリント配線板(以下PWBと記す)の配線回路は高
密度化の一途をたどっており、このため、PWBの設計
、製造技術面からは配線回路幅の狭小化や導通専用スル
ーホール(以下導通専用T/’Hと記す)で対応してい
る。In recent years, as electronic devices have become lighter, thinner, shorter, and more sophisticated, the wiring circuits of printed wiring boards (hereinafter referred to as PWBs) are becoming more densely packed. This has been addressed by narrowing the width of the wiring circuit and through holes for conduction only (hereinafter referred to as T/'H for conduction only).
このうち導通専用T/Hは、高密度配線に於けるチャネ
ルネックを解消し配線収容力を飛躍的に増大させるため
の有効な手段であり、さまざまなPWBに採用されてい
る。Among these, the conduction-only T/H is an effective means for eliminating channel necks in high-density wiring and dramatically increasing wiring capacity, and has been adopted in various PWBs.
一般に、導通専用T/Hは、配線エリア確保の関係から
密集して配設されることが多く、フローソルダ法などで
実装部品をはんだ付けする際に、はんだが、第2図(a
)、(b)のように隣接する導通専用T / H2a同
志をショートさせてしまうトラブルが多い。In general, conduction-only T/Hs are often arranged closely together in order to secure wiring area, and when soldering mounted components using flow soldering method, etc., the solder is
), (b), there are many troubles where adjacent conduction-only T/H2a comrades are short-circuited.
第2図(a)は、はんだ付は面ではんだが過剰に付着し
たケースであり、第2図(b)は導通専用T / H2
aをフローアップしたはんだがショートを引き起こした
ケースである。Figure 2 (a) shows a case where excessive solder adheres to the soldering surface, and Figure 2 (b) shows a case in which T/H2 is used only for conduction.
This is a case where the solder that flowed up a caused a short circuit.
従って、導通専用T/Hへのはんだ付着を制御し、はん
だに依るショート不良を防止するために導通専用T/H
のソルダレジスト(以下、SRと記す)で閉塞される必
要があるが、従来は感光性ドライフィルムにより導通専
用T/Hに対したテンティング状のSR膜を形成する方
法が多く用いられていた。Therefore, in order to control solder adhesion to the conduction-only T/H and prevent short-circuit defects caused by solder, the conduction-only T/H
It is necessary to block the solder resist (hereinafter referred to as SR), but conventionally, a method of forming a tenting-like SR film on the conductive T/H using a photosensitive dry film was often used. .
すなわち、銅張り絶縁基板への穴あけ並びに銅めっきか
ら成る公知のパネルめっき工法により銅張り絶縁基板に
第3図(a)の如くスルーホールを形成する。更に、熱
硬化性穴埋めインク3を第3図(b)の如く、スルーホ
ール内部に充填し硬化させ、絶縁基板1の表裏両面に第
3図(c)の如く、エツチングレジスト4で所定の回路
パターンを印刷した後、エツチグ処理で第3図(d)の
如く導体回路2bを形成する。That is, through-holes are formed in the copper-clad insulating substrate as shown in FIG. 3(a) by a known panel plating method consisting of drilling holes in the copper-clad insulating substrate and copper plating. Furthermore, as shown in FIG. 3(b), thermosetting hole-filling ink 3 is filled into the inside of the through hole and cured, and a predetermined circuit is formed on both the front and back surfaces of the insulating substrate 1 with etching resist 4 as shown in FIG. 3(c). After printing the pattern, a conductor circuit 2b is formed by etching as shown in FIG. 3(d).
この後、第3図(e)の如く、エツチングレジスト4及
び熱硬化性穴埋めインク3を同時に剥離除去する。Thereafter, as shown in FIG. 3(e), the etching resist 4 and the thermosetting hole-filling ink 3 are simultaneously peeled off and removed.
更に、第3図(f)の如く、感光性ドライフィルム8を
絶縁基板の全面に貼付けたのち、所定のパターンを有す
るマスクフィルムを用いて露光焼付けし、更に、現像処
理で未露光部分の感光性ドライフィルム8を溶解除去し
て第3図(g)のテンティング状のSRを有する印刷配
線板を得るものである。Furthermore, as shown in FIG. 3(f), a photosensitive dry film 8 is pasted on the entire surface of the insulating substrate, exposed and baked using a mask film having a predetermined pattern, and then the unexposed areas are exposed to light through a development process. The dry film 8 is dissolved and removed to obtain a printed wiring board having a tenting-like SR as shown in FIG. 3(g).
しかし、感光性ドライフィルムを用いた上述の方法では
、次に述べる問題点があった。However, the above method using a photosensitive dry film has the following problems.
すなわち、感光性ドライフィルムを絶縁基板表面に貼付
ける際に導体回路による絶縁基板表面の凹凸形状を埋め
込むことが困難でエアートラップし易く、真空下でのラ
ミネート等の特殊な処理による対策が必要である。In other words, when attaching a photosensitive dry film to the surface of an insulating substrate, it is difficult to fill in the irregularities on the surface of the insulating substrate due to the conductor circuit, and air traps are likely to occur, which requires countermeasures such as special processing such as lamination under vacuum. be.
また、導体回路を完全に被覆するにはドライフィルム材
料の膜厚を導体厚みよりも大きくしなければならず、一
般に、膜厚70〜100μmの材料が必要となり、材料
コストが非常に高価となる上、表面実装用パッドの付近
ではパッドよりもSRの方が著しく厚いためフローソル
ダリングの際パッド表面にガスをトラップしてはんだ付
は性を阻害してしまう。Additionally, in order to completely cover the conductor circuit, the thickness of the dry film material must be greater than the thickness of the conductor, and generally a material with a thickness of 70 to 100 μm is required, making the material cost extremely high. Moreover, since the SR is significantly thicker than the pad in the vicinity of the surface mounting pad, gas is trapped on the pad surface during flow soldering, impairing soldering performance.
本発明の目的は、材料コストが安価で、はんだ付は性が
良く、信頼性の高いプリント配線板とその製造方法を提
供することにある。An object of the present invention is to provide a printed wiring board that is inexpensive in material cost, has good soldering properties, and is highly reliable, and a method for manufacturing the same.
本発明は、表面配線回路と裏面配線回路の接続及び前記
表面配線回路と前記裏面配線回路とのうちの少くともい
ずれか一方と内層配線回路との接続に用いられる導通専
用スルーホールを有するプリント配線板に於いて、所定
の前記導通専用スルーホール内部に穴埋めインクを充填
し、更に、前記導通専用スルーホール内部の前記穴埋め
インクを含む表面層と裏面層の所定の部分にソルダレジ
ストが被覆されている。The present invention provides a printed wiring having a conduction-only through hole used for connecting a front wiring circuit and a back wiring circuit and connecting at least one of the front wiring circuit and the back wiring circuit to an inner layer wiring circuit. In the board, a filler ink is filled in a predetermined through hole exclusively for conduction, and a predetermined portion of a surface layer and a back layer containing the filler ink inside the through hole exclusively for conduction is coated with a solder resist. There is.
本発明の印刷配線板の製造方法は、銅張り絶縁基板に穴
あけする工程と、前記穴内壁及び前記絶縁基板表面に銅
めっきを行いスルーホールを形成する工程と、熱硬化性
穴埋めインクで前記スルーホール内を充填し硬化させる
工程と、前記絶縁基板に表裏両面にエツチングレジスト
で所定の回路パターンを印刷する工程と、エツチング処
理で導体回路を得たのち前記エツチングレジストのみを
剥離除去する工程と、感光性ソルダレジストインクを前
記絶縁基板の全面に塗布する工程と、所定のパターンを
有するマスクフィルムを用いて露光焼付けする工程と、
未露光部分の前記感光性ソルダレジストインク及び未露
光部分の前記熱硬化性穴埋めインクを現像処理で選択的
に除去する工程とを含んで構成されている。The method for manufacturing a printed wiring board of the present invention includes the steps of: drilling a hole in a copper-clad insulating substrate; forming a through hole by plating the inner wall of the hole and the surface of the insulating substrate; and applying thermosetting hole-filling ink to the through hole. a step of filling the inside of the hole and curing it; a step of printing a predetermined circuit pattern on both the front and back sides of the insulating substrate with an etching resist; and a step of peeling off only the etching resist after obtaining a conductive circuit by etching treatment; a step of applying photosensitive solder resist ink to the entire surface of the insulating substrate; a step of exposing and baking using a mask film having a predetermined pattern;
The method includes a step of selectively removing the photosensitive solder resist ink in unexposed areas and the thermosetting hole-filling ink in unexposed areas by a development process.
以下に、本発明の実施例について図面を参照して説明す
る。Embodiments of the present invention will be described below with reference to the drawings.
第1図(a)〜(g)は本発明の一実施例の製造方法を
説明する工程順に示した断面図である。FIGS. 1(a) to 1(g) are cross-sectional views showing the steps of a manufacturing method according to an embodiment of the present invention.
まず、第1図(a)の如く、公知のパネルめっき工法に
より銅張り絶縁基板1に導体2をめっきしスルーホール
を形成した後、第1図(b)のように200〜500ボ
イズの粘度の熱硬化性穴埋めインク3でスルーホールを
充填し80〜150℃で20〜50分間硬化させる。First, as shown in Fig. 1(a), a conductor 2 is plated on a copper-clad insulating substrate 1 by a known panel plating method to form a through hole, and then a viscosity of 200 to 500 voids is formed as shown in Fig. 1(b). The through holes are filled with thermosetting hole-filling ink 3 and cured at 80 to 150°C for 20 to 50 minutes.
次にエツチングレジスト4で第1図(c)の如く、所定
の回路パターンを印刷した後、塩化第二銅溶液などによ
るエツチング処理を行い第1図(d)の如く、導体回路
2bを得る。Next, a predetermined circuit pattern is printed using the etching resist 4 as shown in FIG. 1(c), and then etching is performed using a cupric chloride solution or the like to obtain a conductive circuit 2b as shown in FIG. 1(d).
更に、第1図(e)のように、45〜65℃の1〜3%
水酸化ナトリウム水溶液で前記エツチングレジスト4の
みを選択的に剥離除去した後、第1図(f)のように絶
縁基板1の表裏両面に感光性SRインク5をスクリーン
コート法により塗布乾燥する。Furthermore, as shown in Figure 1(e), 1 to 3% at 45 to 65°C.
After selectively removing only the etching resist 4 with an aqueous sodium hydroxide solution, photosensitive SR ink 5 is coated and dried on both the front and back surfaces of the insulating substrate 1 by a screen coating method, as shown in FIG. 1(f).
この後、所定のパターンを有するマスクフィルムを用い
て1平方センチメートル当り200〜1000ミリジユ
ールの紫外線を導通専用T/H2a部分などに選択的に
照射し、更に1・1・1トリクロロエタンなどの有機溶
剤で未露光部分の感光性SRインク5及び熱硬化性穴埋
めインク3を溶解除去し第1図(g)の印刷配線板を得
る。After that, using a mask film with a predetermined pattern, ultraviolet rays of 200 to 1,000 millijoules per square centimeter are selectively irradiated to the T/H2a part dedicated for conduction, and then the non-conductive layer is treated with an organic solvent such as 1.1.1 trichloroethane. The photosensitive SR ink 5 and thermosetting hole-filling ink 3 in the exposed area are dissolved and removed to obtain the printed wiring board shown in FIG. 1(g).
第1図(g)の印刷配線板は、導通専用T/H2a及び
はんだ付は不要な導体回路2bの部分が5R5aで被覆
され、部品実装用T/H2−c及びはんだ付けに必要な
導体回路2bの部分を露出させた状態を示す。In the printed wiring board shown in FIG. 1(g), the T/H2a for continuity and the conductor circuit 2b that does not require soldering are covered with 5R5a, and the T/H2-c for component mounting and the conductor circuit necessary for soldering are covered with 5R5a. A state where part 2b is exposed is shown.
尚、第1図(f)では、感光性SRインクの塗布方法と
してスクリーンコート法の他、スプレィコート法、カー
テンコータ法やローラーコート法を用いることができる
。In FIG. 1(f), as a method for applying the photosensitive SR ink, in addition to the screen coating method, a spray coating method, a curtain coater method, and a roller coating method can be used.
以上から明らかなように本発明によれば、導通専用T/
H内部に選択的に穴埋めインクを残存させるため、高価
な感光性ドライフィルムによるテンティングを必要とせ
ず容易にT/Hを閉塞させることができ、はんだ付は時
の過剰付着やフローアップによるブリッヂ不良を防止す
ることができる効果がある。As is clear from the above, according to the present invention, the conduction-only T/
Since the hole-filling ink selectively remains inside the H, the T/H can be easily closed without the need for tenting with expensive photosensitive dry film, and bridges due to excessive adhesion or flow-up during soldering can be avoided. This has the effect of preventing defects.
又、感光性SRとして液状インクを用いることができる
ため、表面実装用パッド付近のSR膜厚が過大とならず
、パッドに対しても高信頼度のはんだ付けが得られる効
果がある。Furthermore, since a liquid ink can be used as the photosensitive SR, the SR film thickness near the surface mounting pads does not become excessively thick, and highly reliable soldering can be achieved for the pads as well.
第1図(a)〜(g)は本発明の一実施例の製造方法説
明する工程順に示した断面図、第2図(a)、(b)は
導通専用T/Hがはんだ付は時にはんだブリッジとなる
例を示す断面図、第3図(a)〜(g)は従来工法によ
る製造方法を説明する工程順に示した断面図である。Figures 1 (a) to (g) are cross-sectional views showing the manufacturing method according to an embodiment of the present invention in the order of steps, and Figures 2 (a) and (b) show that the conduction-only T/H is sometimes soldered. A sectional view showing an example of a solder bridge, and FIGS. 3(a) to 3(g) are sectional views shown in order of steps to explain a conventional manufacturing method.
Claims (2)
線回路と前記裏面配線回路とのうちの少くともいずれか
一方と内層配線回路との接続に用いられる導通専用スル
ーホールを有するプリント配線板に於いて、所定の前記
導通専用スルーホール内部に穴埋めインクを充填し、更
に、前記導通専用スルーホール内部の前記穴埋めインク
を含む表面層と裏面層の所定の部分にソルダレジストを
被覆したことを特徴とするプリント配線板。1. In a printed wiring board having through-holes exclusively for conduction used for connecting a front wiring circuit and a back wiring circuit and connecting at least one of the front wiring circuit and the back wiring circuit to an inner layer wiring circuit. Filling ink is filled into the inside of a predetermined conduction-only through hole, and further, predetermined portions of the surface layer and the back layer containing the hole-filling ink inside the conduction-only through hole are coated with a solder resist. printed wiring board.
び前記絶縁基板表面に銅めっきを行いスルーホールを形
成する工程と、熱硬化性穴埋めインクで前記スルーホー
ル内を充填し硬化させる工程と、前記絶縁基板の表裏両
面にエッチングレジストで所定の回路パターンを印刷す
る工程と、エッチング処理で導体回路を得たのち前記エ
ッチングレジストのみを剥離除去する工程と、感光性ソ
ルダレジストインクを前記絶縁基板の全面に塗布する工
程と、所定のパターンを有するマスクフィルムを用いて
露光焼付けする工程と、未露光部分の前記感光性ソルダ
レジストインク及び未露光部分の前記熱硬化性穴埋めイ
ンクを現像処理で選択的に除去する工程とを含むことを
特徴とするプリント配線板の製造方法。2. a step of drilling a hole in a copper-clad insulating substrate; a step of forming a through hole by plating the inner wall of the hole and a surface of the insulating substrate; a step of filling and curing the inside of the through hole with a thermosetting hole-filling ink; A process of printing a predetermined circuit pattern with etching resist on both the front and back surfaces of the insulating substrate, a process of peeling off only the etching resist after obtaining a conductor circuit by etching, and a process of applying photosensitive solder resist ink to the entire surface of the insulating substrate. a step of exposing and baking using a mask film having a predetermined pattern; and a step of selectively applying the photosensitive solder resist ink in unexposed areas and the thermosetting hole-filling ink in unexposed areas through a development process. A method for producing a printed wiring board, the method comprising: removing the printed wiring board.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP31536290A JPH04186792A (en) | 1990-11-20 | 1990-11-20 | Printed wiring board and manufacture thereof |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP31536290A JPH04186792A (en) | 1990-11-20 | 1990-11-20 | Printed wiring board and manufacture thereof |
Publications (1)
Publication Number | Publication Date |
---|---|
JPH04186792A true JPH04186792A (en) | 1992-07-03 |
Family
ID=18064502
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP31536290A Pending JPH04186792A (en) | 1990-11-20 | 1990-11-20 | Printed wiring board and manufacture thereof |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPH04186792A (en) |
Cited By (10)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US6454154B1 (en) | 2000-05-31 | 2002-09-24 | Honeywell Advanced Circuits, Inc. | Filling device |
US6506332B2 (en) | 2000-05-31 | 2003-01-14 | Honeywell International Inc. | Filling method |
US6793852B2 (en) | 2000-05-31 | 2004-09-21 | Ttm Advanced Circuits, Inc. | Scavenging method |
US6800232B2 (en) | 2000-05-31 | 2004-10-05 | Ttm Advanced Circuits, Inc. | PCB support plate method for PCB via fill |
US6832714B2 (en) | 2000-05-31 | 2004-12-21 | Ttm Advanced Circuits, Inc. | Heated filling device |
US6855385B2 (en) | 2000-05-31 | 2005-02-15 | Ttm Advanced Circuits, Inc. | PCB support plate for PCB via fill |
JP2009182284A (en) * | 2008-02-01 | 2009-08-13 | Hitachi Ltd | Hole filling method of printed circuit board |
CN109275277A (en) * | 2018-10-17 | 2019-01-25 | 江门崇达电路技术有限公司 | A kind of solder-resisting manufacturing methods for preventing PCB aperture from entering ink |
CN110740583A (en) * | 2019-10-08 | 2020-01-31 | 深南电路股份有限公司 | Pattern transfer method for printed circuit board |
CN114501833A (en) * | 2020-10-23 | 2022-05-13 | 深南电路股份有限公司 | Method for processing solder mask on circuit board |
-
1990
- 1990-11-20 JP JP31536290A patent/JPH04186792A/en active Pending
Cited By (16)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US6454154B1 (en) | 2000-05-31 | 2002-09-24 | Honeywell Advanced Circuits, Inc. | Filling device |
US6506332B2 (en) | 2000-05-31 | 2003-01-14 | Honeywell International Inc. | Filling method |
US6793852B2 (en) | 2000-05-31 | 2004-09-21 | Ttm Advanced Circuits, Inc. | Scavenging method |
US6797224B2 (en) | 2000-05-31 | 2004-09-28 | Ttm Advanced Technologies, Inc. | Heated filling method |
US6800232B2 (en) | 2000-05-31 | 2004-10-05 | Ttm Advanced Circuits, Inc. | PCB support plate method for PCB via fill |
US6832714B2 (en) | 2000-05-31 | 2004-12-21 | Ttm Advanced Circuits, Inc. | Heated filling device |
US6840425B2 (en) | 2000-05-31 | 2005-01-11 | Ttm Advanced Circuits, Inc. | Scavenging system |
US6855385B2 (en) | 2000-05-31 | 2005-02-15 | Ttm Advanced Circuits, Inc. | PCB support plate for PCB via fill |
US6921505B2 (en) | 2000-05-31 | 2005-07-26 | Ttm Advanced Circuits, Inc. | Hole filling using an etched hole-fill stand-off |
US6995321B2 (en) | 2000-05-31 | 2006-02-07 | Honeywell Advanced Circuits | Etched hole-fill stand-off |
US7066378B2 (en) | 2000-05-31 | 2006-06-27 | Ttm Advanced Circuits, Inc. | Filling device |
JP2009182284A (en) * | 2008-02-01 | 2009-08-13 | Hitachi Ltd | Hole filling method of printed circuit board |
CN109275277A (en) * | 2018-10-17 | 2019-01-25 | 江门崇达电路技术有限公司 | A kind of solder-resisting manufacturing methods for preventing PCB aperture from entering ink |
CN110740583A (en) * | 2019-10-08 | 2020-01-31 | 深南电路股份有限公司 | Pattern transfer method for printed circuit board |
CN110740583B (en) * | 2019-10-08 | 2021-06-25 | 深南电路股份有限公司 | Pattern transfer method for printed circuit board |
CN114501833A (en) * | 2020-10-23 | 2022-05-13 | 深南电路股份有限公司 | Method for processing solder mask on circuit board |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
JPH04186792A (en) | Printed wiring board and manufacture thereof | |
JPS61176194A (en) | Manufacture of printed circuit board | |
JPH0480991A (en) | Manufacture of printed wiring board | |
EP0784914B1 (en) | Method of manufacturing a printed circuit board | |
US4487828A (en) | Method of manufacturing printed circuit boards | |
JP2586745B2 (en) | Manufacturing method of printed wiring board | |
KR100997803B1 (en) | Manufacturing method of PCB | |
JPH08107263A (en) | Manufacturing method of printed-wiring board | |
JPH0786727A (en) | Printed-wiring board and manufacture thereof | |
JP3711569B2 (en) | Printed wiring board and manufacturing method thereof | |
US5716760A (en) | Method for plating a substrate to eliminate the use of a solder mask | |
JPS6012791A (en) | Method of producing printed circuit board | |
JPH04318993A (en) | Printed wiring board and its manufacture | |
JPH0430494A (en) | Printed wiring board and manufacture thereof | |
JP2891938B2 (en) | How to connect electrical components | |
JPH01295489A (en) | Manufacture of printed wiring board and wiring board obtained by this manufacturing method | |
JPH04133492A (en) | Printed wiring board | |
JPH0567871A (en) | Printed-wiring board and manufacture thereof | |
JPH04282887A (en) | Manufacture of printed wiring board | |
JPH08186357A (en) | Printed wiring board and manufacture thereof | |
JPH05327189A (en) | Manufacture of printed circuit board | |
JPH04277695A (en) | Printed wiring board | |
JP2000277892A (en) | Printed circuit board and electronic component mounting board | |
JPS624398A (en) | Manufacture of double-side through hole circuit board | |
JPH104255A (en) | Printed wiring board and manufacturing thereof |