JPH0645519A - Multiple module - Google Patents

Abstract

PURPOSE:To reduce the size of a multichip module, by dividing an insulating substrate for mounting semiconductor chips, and forming a first insulating substrate and a second insulating substrate which is fixed almost vertically to the first insulating substrate. CONSTITUTION:An insulating substrate is divided into an insulating substrate 1 and a leadless chip carrier type insulating substrate 2. A semiconductor chip 5 composed of logic circuit elements of a CPU, an FPU, etc., whose heating value is large is mounted on the substrate 1. The insulating substrate 2 is fixed vertically to the insulating substrate 1, and mounts semiconductor chips of volume heating value like a storage device. Thereby the size of a multichip module can be reduced. Hence the wiring length, i.e., the propagation delay time can be shortened by the effect of wire length reduction, and high speed operation is enabled.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a multi-chip module, and more particularly to a multi-chip module suitable for high-density mounting of arithmetic circuits for high speed operation.

[0002]

2. Description of the Related Art A conventional multi-chip module is shown in FIG.
As shown in FIG. 2, an insulating substrate 7 made of alumina ceramic in which a plurality of semiconductor chips 5 have wiring patterns (not shown)
The insulating substrate 7 and the semiconductor chip 5 are connected to each other by the thin metal wire 6, and the wiring pattern of the insulating substrate 7 is connected to the external lead 3. Further, the insulating substrate 7 was provided with the cap 4 sealed with a brazing material such as gold brazing. Further, in order to effectively dissipate the heat generated from the semiconductor chip 5, the heat sink 16 is adhered to the surface of the insulating substrate 7 opposite to the surface on which the semiconductor chip is mounted by the adhesive 15 having a high thermal conductivity or the brazing material. It was

In the structure of this conventional multi-chip module, for example, a central processing unit (CPU), a floating point processing unit (FPU), a bus interface unit (BIU) are each provided in a unit of 1 and a total of 6 memories. In the case of a multi-chip module which is composed of 9 semiconductor chips and has a total calorific value of 16 W, the size of the insulating substrate 7 is 8
It is 5 mm x 85 mm. The multi-chip module having the above-described configuration is used, for example, in the arithmetic processing of a workstation, and is the part that requires the highest speed operation.

[0004]

In the above-mentioned conventional multi-chip module, the semiconductor chip is mounted only on one surface of the insulating substrate. Therefore, when the number of the semiconductor chips increases, the area of the insulating substrate increases, and wiring is increased. Due to the increase in stray capacitance due to the increase in length, the signal delay time increases, which makes it difficult to operate at high speed.

Further, if even one semiconductor chip mounted on the insulating substrate is defective, the entire multi-chip module will be defective, so that a large number of semiconductor chips will be mounted, resulting in an extremely low yield. It was

[0006]

A multi-chip module of the present invention is mounted on a first insulating substrate on which at least one first semiconductor chip is mounted on one surface, and is mounted substantially vertically on the first insulating substrate. And at least one second insulating substrate having at least one second semiconductor chip mounted on one surface.

[0007]

Embodiments of the present invention will now be described with reference to the drawings.

FIG. 1 shows a first embodiment of a multi-chip module of the present invention, (A) is a plan view and (B) is a sectional view taken along the line AA of (A).

As shown in FIGS. 1 (A) and 1 (B), the multi-chip module of this embodiment has an insulating substrate 1 on which a semiconductor chip 5 composed of a logic circuit element such as a CPU or an FPU which generates a large amount of heat is mounted. , A leadless chip carrier type insulating substrate 2 mounted vertically on the insulating substrate 1 and having a semiconductor chip 8 of low heat generation such as a memory, for electrical connection between the semiconductor chips 5 and 8 and the insulating substrates 1 and 2. The thin metal wire 6 and the caps 4 for sealing the insulating substrates 1 and 2 are provided.

FIG. 2 is a perspective view showing the appearance of the insulating substrate 2. As shown in FIG. 2, the electrode pad 12 of the insulating substrate 2 is arranged only on one side of the lower surface of the four sides and is connected to the electrode pad (not shown) on the insulating substrate 1 by soldering. Further, in order to secure the mechanical strength of the attachment, it is adhered to the insulating substrate 1 by soldering in the soldering area 9 at the substantially central portion of the attachment surface.

With the configuration as described above, the size of the multichip module of this embodiment can be greatly reduced. For example, the heat generation amount of three semiconductor chips 5 composed of logic circuit elements such as CPU and FPU mounted on the insulating substrate 1 in the same configuration as the conventional example is 10 W in total, and one is mounted on each of the six insulating substrates 2. When the total amount of heat generated by the memory is 6 W, it can be about 35 mm × 35 mm. Therefore, the wiring length, that is, the propagation delay time can be shortened by that amount, and a higher speed operation becomes possible.

Further, with the structure as described above, the insulating substrate 2 functions as a heat sink, and the heat generated from the logic circuit elements such as CPU and FPU mounted on the insulating substrate 1 can be effectively radiated. Therefore, the heat sink conventionally required becomes unnecessary.

Further, since a semiconductor chip is mounted on each of the insulating substrates 1 and 2, only non-defective products can be selected by an electrical test to form a multi-chip module, so that the yield can be improved and the cost can be reduced.

In the present embodiment, the electrical connection and the mechanical attachment between the insulating substrates 1 and 2 are performed by soldering, but the invention is not limited to soldering, and for example, brazing using gold solder may be used. Further, although alumina is used as the material of the insulating substrates 1 and 2, it is preferable to use aluminum nitride, which has better thermal conductivity, when the amount of heat generated by the semiconductor chip is large.

Next, a second embodiment of the present invention will be described.

3A and 3B show a second embodiment of the multichip module of the present invention. FIG. 3A is a plan view and FIG. 3B is a sectional view taken along line AA of FIG.

The difference between this embodiment and the first embodiment is that the insulating substrates 1 and 2 are made of epoxy resin,
A plastic leaded chip carrier (PLCC) 10 storing a semiconductor chip 8 such as a memory is used as an insulating substrate 2.
It is mounted by soldering. The attachment to the insulating substrate 1 is performed by inserting the insulating substrate 2 having a connector terminal at one end into the connector 11 provided on the insulating substrate 1. Further, the heat sink 16 can be used to enhance the heat radiation effect. Further, the semiconductor chip 5 mounted on the insulating substrate 1 is surrounded by the frame 13 and sealed with the resin 12, and in order to improve heat conduction between the semiconductor chip 5 and the heat sink 16, the heat conducting plate 14 is provided inside the insulating substrate 1. Is provided and is adhered to the heat sink with the adhesive 15 having high thermal conductivity.

Further, instead of PLCC, the semiconductor chip 8 is directly mounted on the insulating substrate 2, and the insulating substrate 2 and the heat sink 1 are mounted.
It is also possible to further improve heat dissipation by adhering 6 and 6 with a high thermal conductive adhesive.

Next, a third embodiment of the present invention will be described.

FIG. 4 is a sectional view showing a third embodiment of the multichip module of the present invention.

The difference between this embodiment and the first and second embodiments described above is that the insulating substrates 1 and 2 are made of aluminum nitride and the high heat generating semiconductor chip 5 mounted on the surface of the insulating substrate 1 is used. The generated heat is conducted to the insulating substrate 2 mounted on the surface via the insulating substrate 1 to radiate the heat.

[0022]

As described above, in the multi-chip module of the present invention, the insulating substrate on which the semiconductor chip is mounted is divided, and the first insulating substrate and the first insulating substrate are mounted substantially vertically. Since the size of the multichip module is reduced by providing the second insulating substrate, there is an effect that the propagation delay time is shortened and therefore the circuit operation can be speeded up.

Further, by individually selecting the first and second insulating substrates on which the semiconductor chips are mounted by an electrical test, a multi-chip module can be constructed with only non-defective products, so that the manufacturing yield can be improved. is there.

[Brief description of drawings]

FIG. 1 is a plan view showing a first embodiment of a multi-chip module of the present invention and a sectional view taken along the line AA.

FIG. 2 is a perspective view showing an example of an insulating substrate of the multi-chip module of this embodiment.

FIG. 3 is a plan view showing a second embodiment of the multi-chip module of the present invention and a sectional view taken along the line AA.

FIG. 4 is a sectional view showing a third embodiment of the multi-chip module of the present invention.

FIG. 5 is a block diagram showing an example of a conventional multi-chip module.

[Explanation of symbols]

 1,2,7 Insulation board 3 External lead 4 Cap 5,8 Semiconductor chip 6 Metal thin wire 9 Solder bonding area 10 PLCC 11 Connector 12 Resin 13 Frame 14 Heat conduction plate 15 Adhesive 16 Heat sink 17 Electrode pad

Claims (4)

[Claims] 1. A first insulating substrate on which at least one first semiconductor chip is mounted on one surface, and at least one second semiconductor chip mounted on the first insulating substrate substantially vertically and on one surface. And at least one second insulating substrate for mounting the multi-chip module. 2. The multi-chip module according to claim 1, wherein the first semiconductor chip is a logic circuit element and the second semiconductor chip is a memory element. 3. The first insulating substrate is provided with a connector for wiring connection, and the second insulating substrate is attached to the first insulating substrate via the connector. Multi-chip module. 4. The multi-chip module according to claim 1, further comprising a heat sink attached to the first insulating substrate, wherein the second insulating substrate is bonded to the heat sink.