JPH0645362A - Field effect transistor - Google Patents

Abstract

PURPOSE:To increase saturation drain current without deteriorating gate withstand voltage by forming a ground electrode which shortcircuits with a source electrode and forms a Schottky junction with a semiconductor substrate on the semiconductor substrate which constitutes an active layer between a gate electrode and a drain electrode. CONSTITUTION:A voltage applied between a gate electrode 4 and a drain electrode 6 is dispersed to the side of the gate electrode 4 and the side of the drain electrode 6 in pinch-off state using a ground electrode 8 provided therebetween as a border, and a voltage by an amount of pinch-off voltage Vp is applied between the gate electrode 4 and the ground electrode 8. Therefore, a gate withstand voltage Vgdo can be improved by an amount of the pinch-off voltage Vp. Thereby, a saturation drain current can be increased without deteriorating a gate withstand voltage.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a field effect transistor (hereinafter referred to as FET), and more particularly to high output of FET.

[0002]

2. Description of the Related Art FIG. 3 is a cross-sectional side view showing the structure of a conventional FET, in which 1 is a GaAs substrate and 2 is a G substrate.
An active layer formed in the aAs substrate 1, 3 is a high-concentration doping layer formed on both sides of the active layer 2 in the GaAs substrate 1, and 4 is formed on a portion of the surface of the active layer 2 where a gate is to be formed. The gate electrode 5 is formed on the one high-concentration doping layer 3 and is grounded, the source electrode 6 is a drain electrode formed on the other high-concentration doping layer 3, and the gate electrode 4 is below the gate electrode 4. Electric field concentration area, VGS is -3V
Is a gate bias voltage of VDS, and VDS is a drain bias voltage of 10V.

Next, the operation will be described. Normally, FIG.
In the conventional FET shown in, the source electrode 5 is grounded, the drain bias voltage VDS is applied between the drain electrode 6 and the source electrode 5, and the gate bias voltage VGS is applied to the gate electrode 4.
Is applied and the value of these bias voltages is changed, the size of the depletion layer in the active layer 2 is changed, and the operation of the transistor is ON / OFF controlled.

Generally, when the FET is off, the electric field is concentrated in the drain side region under the gate electrode 4 shown by reference numeral 7 in FIG. For example, in an FET having a pinch-off voltage Vp of -3V, which is pinched off in the operation state shown in FIG.
A bias voltage VDS of about 10 is applied between the gate electrode and the source electrode.
When operating in the range of V, the voltage applied between the gate electrode 4 and the drain electrode 6 reaches a maximum of 13 V in the OFF state (that is, the pinch-off state). Therefore, in such an FET, the gate breakdown voltage Vgdo must be at least 13 V in order to prevent the gate breakdown.

[0005]

By the way, in order to increase the output of the FET, it is necessary to increase the saturation drain current Idss and the gate breakdown voltage Vgdo. Therefore, conventionally, the saturation drain current Idss
In order to increase the thickness, the impurity concentration and the thickness of the channel (that is, the active layer 2) are increased. However, the pinch-off voltage Vp is Vp = ∫z ρ (z) dz
(Where z is the depth from the Schottky junction interface of the substrate,
ρ (z) is a function defining the charge density distribution in the z direction (depth direction)), and the surface of the channel (active layer 2), that is, the Schottky of the semiconductor substrate 1 and the gate electrode 4. Since the depth increases from the junction interface and the charge density distribution of the active layer, increasing the impurity concentration and the thickness of the channel (that is, the active layer 2) in order to increase the saturation drain current Idss, The pinch-off voltage Vp also increases, and as a result, the gate breakdown voltage Vgdo deteriorates, and the desired high output characteristics cannot be obtained.

The present invention has been made in order to solve the above problems, and has a novel electrode structure capable of increasing the saturation drain current Idss without degrading the gate breakdown voltage Vgdo. The purpose is to obtain a field effect transistor.

[0007]

A field effect transistor according to the present invention has a structure in which a source electrode is short-circuited on a semiconductor substrate forming an active layer between a gate electrode and a drain electrode,
In addition, a ground electrode that forms a Schottky junction with the semiconductor substrate is formed.

[0008]

According to the present invention, the ground electrode short-circuited to the source electrode and forming a Schottky junction with the semiconductor substrate is formed on the semiconductor substrate forming the active layer between the gate electrode and the drain electrode. The voltage applied between the drain electrode and the drain electrode is dispersed between the gate electrode side and the drain electrode side with the ground electrode as a boundary, and the electric field concentration at the end portion of the gate electrode on the drain electrode side is reduced compared to the conventional case. As a result, even if the pinch-off voltage increases as the saturation drain current Idss increases, the electric field applied to the drain electrode side end of the gate electrode does not increase, and the gate breakdown voltage Vgdo can be prevented from deteriorating.

[0009]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS An embodiment of the present invention will be described below with reference to the drawings. 1 is a cross-sectional side view showing the structure of an FET according to an embodiment of the present invention, and FIG. 2 is a top view thereof. In these figures, the same reference numerals as those in FIG. 3 indicate the same or corresponding portions, 8 is a ground electrode forming a Schottky junction with the GaAs substrate 1, and 71 and 72 are electric field concentration under the gate electrode 4 and under the ground electrode 8. Area. Here, the gate electrode 4
And the ground electrode 8 are made of WSi2.
Is short-circuited with the source electrode 5.

The operation will be described below. As in the conventional case, for example, when a FET having a pinch-off voltage Vp of -3V and being operated by controlling the drain bias voltage VDS in the range of about 10V, this FET uses a GaAs substrate between the gate electrode 4 and the drain electrode 6. W on the active layer 2 in 1
As shown in the drawing, the electric field concentration regions 71 and 72 are formed by the ground electrode 8 made of Si2 in a distributed manner at the drain side gate electrode end 71 of the gate electrode 4 and the drain side electrode end 72 of the ground electrode 8. Reverse biases of 3 V and 10 V are applied, respectively.

In the FET of this embodiment, in the pinch-off state, the voltage applied between the gate electrode 4 and the drain electrode 6 is the ground electrode 8 provided between them.
With the boundary as the boundary, the voltage is distributed between the gate electrode 4 side and the drain electrode 6 side, and a voltage corresponding to the pinch-off voltage Vp is applied between the gate electrode 4 and the ground electrode 8. Therefore, while keeping the concentration and thickness of the active layer 2 the same as that of the conventional FET shown in FIG. 3, the pinch-off voltage V is higher than that of the conventional FET.
The gate breakdown voltage Vgdo can be improved by p.
When the saturation drain current Idss is increased by increasing the concentration and thickness of the active layer 2, even if the pinch-off voltage Vp increases accordingly, the gate breakdown voltage does not deteriorate and the desired high voltage is obtained. An FET having output characteristics can be obtained.

Although tungsten silicide (WSi2) is used as the material of the ground electrode 8 in the above embodiment, the material of the ground electrode is not limited to this. For example, the GaAs substrate 1 and the shot are used. Other refractory metal silicides that form a key junction, nitrides, or the like may be used, and the same effects as described above can be obtained.

[0013]

As described above, according to the present invention, a short circuit with the source electrode and a Schottky junction with the semiconductor substrate are formed on the semiconductor substrate forming the active layer between the gate electrode and the drain electrode. Since the ground electrode is provided, the voltage applied between the gate electrode and the drain electrode is
It can be dispersed on the side of the gate electrode and on the side of the drain electrode with the ground electrode as a boundary. Therefore, the concentration and thickness of the active layer are increased to increase the saturation drain current Idss, thereby increasing the pinch-off voltage. An increase in the voltage applied to the electric field concentration region of the gate electrode is suppressed when it increases, and as a result, an FET that can increase the saturated drain current can be obtained without degrading the gate breakdown voltage.

[Brief description of drawings]

FIG. 1 is a sectional side view showing a structure of a field effect transistor according to an embodiment of the present invention.

FIG. 2 is a top view showing the structure of an electric field AC transistor according to an embodiment of the present invention.

FIG. 3 is a sectional side view showing a structure of a conventional field effect transistor.

[Explanation of symbols]

 1 GaAs substrate 2 active layer 3 high-concentration doping layer 4 gate electrode 5 source electrode 6 drain electrode 7, 71, 72 electric field concentration region 8 ground electrode

Claims (1)

[Claims] 1. An active layer is formed in a compound semiconductor substrate,
In a field effect transistor, wherein a gate electrode is formed on the surface of the active layer, and a source and a train electrode are formed on the surfaces of high-concentration impurity regions on both sides of the active layer, the active layer between the gate electrode and the drain electrode is formed. A field-effect transistor, characterized in that a ground electrode that is in Schottky contact with the compound semiconductor substrate and that is short-circuited with the source electrode is provided on the surface of the compound semiconductor substrate.