JPH0645341A - Manufacture of semiconductor device - Google Patents

Abstract

PURPOSE:To form an element isolation area, base lead-out region, base and emitter regions in a self alignment manner, and reducing the area of the element, and integrating this device, and reduce base-emitter junction capacity, and increase the operation speed of a transistor. CONSTITUTION:An n-type buried layer 2 is formed on a p-type semiconductor substrate 1, and an n-type epitaxial layer 3 is grown all over the surface, and leaving an oxide film 5 only on the emitter formation part, a nitride film 6 is formed on the sidewall of the oxide film 5, and an oxide film 7 for element isolation is formed, and the nitride film 6 is removed. Next, a polycrystalline silicon 8 for base leadout is formed, and an insulating film is formed, and the insulating film on the oxide film 5 is removed, and an exposed oxide film 5 is removed, and the polycrystalline silicon on the sidewall is oxidized, and a base region 15 is formed by ion implantation, and a nitride film 19 is formed on the sidewall, and after removal of the oxide film on the base region 15, a polycrystalline silicon 16 is grown selectively, ions of arsenic are implanted and by the diffusion from the polycrystalline silicon 16, an emitter region 17 is formed.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method for manufacturing a semiconductor device, and more particularly to a method for manufacturing a bipolar transistor having high speed performance.

[0002]

2. Description of the Related Art A conventional semiconductor device manufacturing process will be described with reference to FIG.

In FIG. 4, an N type buried layer 2 is formed on a P type semiconductor substrate 1, an N type epitaxial layer 3 is grown on the entire surface, an element isolation region 20 is formed, and then a silicon oxide film 21 is formed. (FIG. 4 (a)). Next, the silicon oxide film 21 on the base portion is removed by photolithography and etching to form polycrystalline silicon 22, a P-type impurity such as boron is introduced into the polycrystalline silicon 22, and a silicon nitride film 23 is formed thereon. Are formed (FIG. 4B). next,
After removing the silicon nitride film 23 and the polycrystalline silicon 22 on the emitter and base forming portions by photolithography and etching and performing a heat treatment to introduce boron from the polycrystalline silicon 22 to form the base lead-out region 12, the boron and the like are removed. P-type impurities are ion-implanted to form the base region 15 (FIG. 4C). Next, a silicon nitride film 24 is grown on the entire surface, and the silicon nitride film 24 is left only on the sidewalls by anisotropic etching.
Is selectively grown on the base region 15, and polycrystalline silicon 1
An N-type impurity such as arsenic was introduced into 6 and the impurity was diffused by heat treatment to form the emitter region 17 (FIG. 4).
(D)).

[0004]

In this conventional semiconductor device, since the element isolation region, the base lead-out region and the base are formed in different photolithography processes, the positional deviation between the photolithography processes is taken into consideration. Since it is necessary to design the device with a margin, the device area and the junction capacitance between the collector and the base become large, which hinders high integration and high speed operation.

[0005]

A method of manufacturing a semiconductor device according to the present invention comprises a step of forming a buried layer of opposite conductivity type in an element region of one main surface of a semiconductor substrate of one conductivity type, and a step of forming the semiconductor substrate of the semiconductor substrate. Forming an epitaxial layer of opposite conductivity type on the entire surface, forming an oxidation resistant first insulating film on the epitaxial layer, and forming a second insulating film on the first insulating film Step, patterning the second insulating film into a predetermined shape, forming a third insulating film on the entire surface, and anisotropically etching the third insulating film on the side wall portion of the second insulating film. Leaving the film, leaving the first insulating film below the second insulating film and the third insulating film, forming an element isolation region by oxidation, the third insulating film, and A step of removing the first insulating film underneath, and a single conductivity type impurity on the entire surface. Forming a first polycrystalline silicon containing silicon, diffusing one conductivity type impurity in the first polycrystalline silicon into the epitaxial layer by heat treatment, and forming a fourth insulating film on the entire surface. Forming step, and the fourth insulating film and the first insulating film on the second insulating film.
The step of sequentially removing the polycrystalline silicon, the step of removing the exposed second insulating film to form a recess, the step of removing the first insulating film exposed on the bottom surface of the recess, and the step of Forming a first silicon oxide film on the exposed surface of the first polycrystalline silicon and the surface of the epitaxial layer; forming a base region by introducing one conductivity type impurity into the epitaxial layer; Forming a fifth insulating film, removing the fifth insulating film other than the side wall of the recess by anisotropic etching, and removing the first silicon oxide film on the bottom surface of the recess; A step of forming second polycrystalline silicon containing impurities of opposite conductivity type in the first and a heat treatment to diffuse impurities of opposite conductivity type in the second polycrystalline silicon into the epitaxial layer to form an emitter region. It has the step of.

[0006]

DESCRIPTION OF THE PREFERRED EMBODIMENTS Next, the present invention will be described with reference to the drawings.

FIG. 1 and FIG. 2 are sectional views showing the manufacturing method of the first embodiment of the present invention in the order of steps. Here, the collector take-out section is not shown.

An N type semiconductor buried layer 2 is formed on a P type semiconductor substrate 1, an N type epitaxial layer 3 is grown on the entire surface, and a silicon nitride film 4 is grown (FIG. 1A).

Next, after the silicon oxide film 5 is grown on the entire surface, the silicon oxide film 5 is only formed on a portion which will be an emitter in the future by photolithography and anisotropic etching.
Is left to grow a silicon nitride film 6 having a film thickness of 0.5 μm (FIG. 1B).

Next, by anisotropic etching, the silicon nitride film 6 having a width of 0.5 μm remains on the side wall of the silicon oxide film 5, and the silicon oxide film 5 and the lower part of the silicon nitride film left on the side wall of the silicon oxide film 5. Etching is performed so that the silicon nitride film 4 remains (FIG. 1C).

Then, the silicon oxide film 7 to be a field insulating film having a film thickness of 0.6 μm is formed by oxidizing for 70 minutes in a steam atmosphere of 950 ° C. and 5 atmospheres. At this time, the silicon oxide film 7 digs into the silicon nitride film 4 by 0.2 μm (FIG. 1D).

Next, the silicon nitride film 6 and the silicon nitride film 4 thereunder are removed so that the silicon nitride film 4 remains only under the silicon oxide film 5.
The type epitaxial layer 3 is exposed. Next, the film thickness is 0.1μ
Polycrystalline silicon 8 for extracting the base of m is grown, P-type impurities such as boron are ion-implanted, and silicon nitride film 9 is formed.
Spin-on-glass (SOG) for growing and flattening
A film is applied and heat treatment is performed to harden the SOG film 10, and at the same time, boron is diffused from the polycrystalline silicon 8 to form a base extraction region 12, and a silicon nitride film 11 is grown (FIG. 2A).

Next, the silicon nitride film 1 on the silicon oxide film 5 is formed by photolithography and anisotropic etching.
1, the SOG film 10, the silicon nitride film 9 and the polycrystalline silicon 8 are sequentially removed, the silicon oxide film 5 is exposed, and the silicon nitride film 13 is grown on the entire surface. Leave 13 (Fig. 2
(B)).

Next, the silicon oxide film 5 and the silicon nitride film 4 are sequentially removed, and the exposed polycrystalline silicon film 8 on the side wall portion is removed.
Of the exposed polycrystalline silicon 8 and the N type epitaxial layer 3 at 5 atm for 950
Oxidation in steam atmosphere at ℃ for 15 minutes, silicon oxide film 1
4 is formed, and a P-type impurity such as boron is ion-implanted to form a base region 15 (FIG. 2C).

Next, a silicon nitride film 19 is grown on the entire surface, the silicon nitride film 19 is left only on the sidewalls by anisotropic etching, the exposed silicon oxide film 14 is removed, and the base region 15 is exposed to form a polycrystal. The silicon 16 is selectively grown on the exposed base region 15, and polycrystalline silicon 1
An N-type impurity such as arsenic is ion-implanted in 6 and arsenic is diffused from the polycrystalline silicon 16 by heat treatment to form an emitter region 17 (FIG. 2 (d)).

FIG. 3 is a sectional view of a semiconductor device manufacturing process according to the second embodiment of the present invention.

1A to 1D and 2A to 2D.
After the steps of the first embodiment up to (b), in this second embodiment, the silicon oxide film 5 and the silicon nitride film 4 are sequentially removed, and the exposed polycrystalline silicon 8 on the side wall is entirely the silicon oxide film. The exposed polycrystalline silicon 8 and the N-type epitaxial layer 3 are oxidized so that the silicon oxide film 1
4 is formed, the silicon oxide film 14 is removed, and a BSG film 18 having a boron concentration of 4 mol% is grown (FIG. 3A).

Next, heat treatment is performed for 20 seconds in a nitrogen atmosphere at 1000 ° C., boron is diffused from the BSG film into the N type epitaxial region 3 to form a base region 15, and a silicon nitride film 19 is grown on the entire surface. BSG exposed by leaving the silicon nitride film 19 only on the sidewalls by anisotropic etching
The film 18 is removed, the base region 15 is exposed, and the polycrystalline silicon 16 is selectively grown on the exposed base region 15. 1 × 10 ¹⁶ arsenic / cm ² is added to the polycrystalline silicon 16.
Ions are implanted and heat treatment is performed for 20 seconds in a nitrogen atmosphere at 1000 ° C. to diffuse arsenic from the polycrystalline silicon 16 to form an emitter region 17 (FIG. 3B).

In this embodiment, a shallow base region is obtained,
Since a transistor that operates at a higher speed can be formed, the effect of reducing the junction capacitance according to the present invention becomes more prominent.

[0020]

As described above, according to the present invention, since the element isolation region, the base lead-out region, the base and the emitter region can be formed by self-alignment by one photolithography process, the device design can be aligned. Margin can be zero. Therefore, the device area can be reduced and high integration can be achieved. In addition, the operating speed is increased because the junction capacitance between the collector and the base can be reduced.

[Brief description of drawings]

FIG. 1 is a process cross-sectional view illustrating the first half of a manufacturing process according to a first embodiment of the present invention.

FIG. 2 is a process sectional view explaining the latter half of the manufacturing process of the first embodiment of the invention.

FIG. 3 is a process sectional view explaining a manufacturing process of the second embodiment of the present invention.

FIG. 4 is a process sectional view of a semiconductor device according to a conventional technique.

[Explanation of symbols]

 1 P-type semiconductor substrate 2 N-type semiconductor burying layer 3 N-type epitaxial layer 4 Silicon nitride film 5 Silicon oxide film 6 Silicon nitride film 7 Silicon oxide film 8 Polycrystalline silicon 9 Silicon nitride film 10 SOG film 11 Silicon nitride film 12 Base Lead-out region 13 Silicon nitride film 14 Silicon oxide film 15 Base region 16 Polycrystalline silicon 17 Emitter region 18 BSG film 19 Silicon nitride film 20 Silicon oxide film 21 Silicon oxide film 22 Polycrystalline silicon 23 Silicon nitride film 24 Silicon nitride film

Claims (3)

[Claims] 1. A step of forming a buried layer of opposite conductivity type in an element region of one main surface of a semiconductor substrate of one conductivity type, and a step of forming an epitaxial layer of opposite conductivity type on the entire surface of the semiconductor substrate. Forming an oxidation resistant first insulating film on the epitaxial layer; forming a second insulating film on the first insulating film; and patterning the second insulating film into a predetermined shape. And a third insulating film is formed on the entire surface, and the third insulating film is left on the side wall portion of the second insulating film by anisotropic etching, and the second insulating film and the third insulating film are formed. Leaving the first insulating film below the insulating film, forming an element isolation region by oxidation, removing the third insulating film and the first insulating film below the third insulating film, A step of forming a first polycrystalline silicon containing an impurity of one conductivity type on the entire surface; A step of diffusing one conductivity type impurity in the first polycrystalline silicon into the epitaxial layer by heat treatment, a step of forming a fourth insulating film on the entire surface, and a step of forming a fourth insulating film on the second insulating film. A step of sequentially removing a fourth insulating film and the first polycrystalline silicon; a step of removing the exposed second insulating film to form a concave portion; and a first insulating film exposed on the bottom surface of the concave portion. A step of forming a first silicon oxide film on the surface of the first polycrystalline silicon and the surface of the epitaxial layer exposed in the recess, and introducing an impurity of one conductivity type into the epitaxial layer. A step of forming a region, a fifth insulating film is formed on the entire surface, the fifth insulating film other than the sidewall of the recess is removed by anisotropic etching, and the first silicon oxide on the bottom surface of the recess is formed. Film removal process , A step of forming second polycrystalline silicon containing impurities of opposite conductivity type in the recess and heat treatment to diffuse impurities of opposite conductivity type in the second polycrystalline silicon into an epitaxial layer to form an emitter region. A method of manufacturing a semiconductor device, comprising the step of forming. 2. The method of manufacturing a semiconductor according to claim 1, wherein the base region is formed by ion-implanting impurities of one conductivity type through the first silicon oxide film. 3. In the base region, the first silicon oxide film is removed, an insulating film containing an impurity of one conductivity type is formed, and then heat treatment is performed to make an impurity of one conductivity type epitaxial layer from the insulating film. 2. The method for manufacturing a semiconductor device according to claim 1, wherein the semiconductor device is formed by diffusing into.