JPH0643412A - Production of optical control device - Google Patents

Production of optical control device

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Publication number
JPH0643412A
JPH0643412A JP5038701A JP3870193A JPH0643412A JP H0643412 A JPH0643412 A JP H0643412A JP 5038701 A JP5038701 A JP 5038701A JP 3870193 A JP3870193 A JP 3870193A JP H0643412 A JPH0643412 A JP H0643412A
Authority
JP
Japan
Prior art keywords
buffer layer
layer
substrate
control device
control electrode
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP5038701A
Other languages
Japanese (ja)
Inventor
Yuji Kishida
裕司 岸田
Hirohiko Katsuta
洋彦 勝田
Koji Takemura
浩二 竹村
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Kyocera Corp
Original Assignee
Kyocera Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Kyocera Corp filed Critical Kyocera Corp
Priority to JP5038701A priority Critical patent/JPH0643412A/en
Publication of JPH0643412A publication Critical patent/JPH0643412A/en
Pending legal-status Critical Current

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Abstract

PURPOSE:To provide the process for production of the novel and revolutionary optical control device which can be improved in pattern accuracy and can be drastically decreased in DC drift by buffer layers with simple stages. CONSTITUTION:This process for production of the optical control device by forming control electrode layers 5 via the buffer layers 4 on optical waveguides 2 provided in the surface layer part or on the surface of a substrate 1 having an electrooptical effect consists in laminating a resist layer 3 on the substrate 1 exclusive of at least a part of the regions made to remain on the optical waveguides 2 and successively laminating the buffer layers 4 and the control electrode layers 5 on at least a part of the regions on the optical waveguides 2, then removing the resist layer 3. The buffer layers 4 are formed by executing sputtering in a gaseous atmosphere contg. gaseous oxygen.

Description

【発明の詳細な説明】Detailed Description of the Invention

【0001】[0001]

【産業上の利用分野】本発明は、光通信,光センサ,光
情報処理等に用いられる導波路型の光変調器や光スイッ
チなどの光制御デバイスの製造方法に関する。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method of manufacturing an optical control device such as a waveguide type optical modulator or optical switch used for optical communication, optical sensors, optical information processing and the like.

【0002】[0002]

【従来の技術】現在、次世代大容量光通信システムの実
用化に伴い、システムの構成要素のひとつである光制御
デバイスの高速化が切望されている。そこで、この高速
性に特徴のある電気光学効果を有する基板を用いた導波
路型光制御デバイスが研究されており、例えばニオブ酸
リチウム(LiNbO3 ;以下、LNと略記する。)単
結晶基板に、チタン(Ti)を拡散させて形成したチャ
ンネル光導波路では、0.1 〜0.2 dB/cm程度といったき
わめて低損失なものが得られることから、特にこのよう
な構成に制御電極を付加した種々の光制御デバイスが盛
んに研究されている。
2. Description of the Related Art Nowadays, with the practical application of a next-generation large-capacity optical communication system, there is a strong demand for speeding up of an optical control device which is one of the constituent elements of the system. Therefore, a waveguide type optical control device using a substrate having an electro-optic effect characterized by high speed has been studied, and for example, a lithium niobate (LiNbO3; hereinafter abbreviated as LN) single crystal substrate is used. Since a channel optical waveguide formed by diffusing titanium (Ti) can obtain a very low loss of about 0.1 to 0.2 dB / cm, various optical control devices in which a control electrode is added to such a structure are provided. Is being actively researched.

【0003】通常、このような電気光学効果を用いた光
制御デバイスでは、光導波路と制御電極との間に、TM
モード光の金属膜への漏洩による減衰を低減する目的
で、バッファ層と呼ばれる低屈折率誘電体膜、例えばシ
リカ(SiO2 )やアルミナ(Al2 O3 )などの酸化
膜が用いられている。しかし、このバッファ層上の制御
電極に直流電圧を印加すると、バッファ層中で荷電イオ
ンの移動が起こり、イオンが電極に吸収されるため外部
からの印加電界が打ち消されてしまい、出力光の強度が
経時変化するといった、いわゆるバッファ層によるDC
ドリフトと呼ばれる現象が起こり、実用上問題があっ
た。
Usually, in an optical control device using such an electro-optic effect, a TM is provided between the optical waveguide and the control electrode.
A low-refractive-index dielectric film called a buffer layer, for example, an oxide film such as silica (SiO2) or alumina (Al2 O3) is used for the purpose of reducing attenuation of mode light due to leakage to the metal film. However, when a DC voltage is applied to the control electrode on this buffer layer, the charged ions move in the buffer layer, and the ions are absorbed by the electrode, canceling the externally applied electric field, and the intensity of the output light. DC due to so-called buffer layer
A phenomenon called drift occurred, which was a practical problem.

【0004】そこで、上述の問題を解消する手段とし
て、二つの電極間でバッファ層を切断する方法が有効で
あり、例えば図2に示すように、電気光学効果を有する
結晶基板11の表層部に光導波路12を形成し(図2
(a))、その後、バッファ層13のパターン形成を行
い(図2(b))、さらに、これと同様な製造技術を用
いて制御電極層14のパターン形成を行う方法(図2
(c);方法1)が知られている(例えば、特開昭56-1
65122 号公報参照)。
Therefore, a method of cutting the buffer layer between two electrodes is effective as a means for solving the above-mentioned problem. For example, as shown in FIG. 2, a surface layer portion of the crystal substrate 11 having an electro-optical effect is formed. The optical waveguide 12 is formed (see FIG.
(A)), after that, the patterning of the buffer layer 13 is performed (FIG. 2B), and further, the patterning of the control electrode layer 14 is performed using a manufacturing technique similar to this (FIG. 2B).
(C); Method 1) is known (for example, JP-A-56-1).
(See Japanese Patent No. 65122).

【0005】また、例えば図3に示すように、電気光学
効果を有する結晶基板21の表層部に光導波路22を形
成し(図3(a))、その後、薄膜形成技術を用いてバ
ッファ層23および制御電極層24を順次形成し(図3
(b)参照)、さらに、レジスト層25をフォトリソグ
ラフィ技術を用いて制御電極形状にパターン形成し(図
3(c))、次いで、バッファ層23および制御電極層
24を各々の適したエッチング液を用いてパターニング
する方法(図3(d);方法2)が知られている。
Further, as shown in FIG. 3, for example, an optical waveguide 22 is formed on the surface layer portion of a crystal substrate 21 having an electro-optical effect (FIG. 3A), and then a buffer layer 23 is formed by using a thin film forming technique. And the control electrode layer 24 are sequentially formed (see FIG.
(B)), and further, the resist layer 25 is patterned into a control electrode shape by using a photolithography technique (FIG. 3C), and then the buffer layer 23 and the control electrode layer 24 are each formed with a suitable etching solution. A method (FIG. 3 (d); Method 2) for patterning is known.

【0006】[0006]

【従来技術の課題】しかしながら、上述の方法1の技術
では、光導波路および制御電極の形成以外にバッファ層
を形成するためのフォトリソグラフィ工程が余分に必要
であり、制御電極層を形成する前に、基板表面を清浄に
保つ配慮を行う必要があるなど、工程が複雑化するうえ
工程数も増加するといった問題を孕んでいる。
However, the method 1 described above requires an additional photolithography step for forming the buffer layer in addition to the formation of the optical waveguide and the control electrode. However, there are problems that the process is complicated and the number of processes is increased, for example, it is necessary to keep the substrate surface clean.

【0007】また、上述の方法2の技術では、バッファ
層形成後に高温アニールを行う事ができる反面、例えば
制御電極層が貴金属であるような場合にエッチング液の
選定が困難であったり、バッファ層及び制御電極層の双
方に適したエッチング液を選別しなければならず、工程
が煩雑となるうえサイドエッチングによるパターン精度
が悪化するといった問題があった。
Further, in the technique of the above-mentioned method 2, although high temperature annealing can be performed after forming the buffer layer, it is difficult to select an etching solution when the control electrode layer is a noble metal, or the buffer layer is difficult to select. It is necessary to select an etching solution suitable for both the control electrode layer and the control electrode layer, which complicates the process and deteriorates the pattern accuracy due to side etching.

【0008】[0008]

【目的】そこで、本発明は上述した問題点を解消し、簡
便な工程でしかもパターン精度を良好にでき、かつバッ
ファ層の酸素欠損によるDCドリフトを大幅に低減でき
る、新規で画期的な光制御デバイスの製造方法を提供す
ることを目的とする。
[Object] Therefore, the present invention solves the above-mentioned problems, improves the pattern accuracy in a simple process, and significantly reduces the DC drift due to oxygen deficiency in the buffer layer. It is an object to provide a method for manufacturing a control device.

【0009】[0009]

【課題を解決するための手段】上述の目的を達成するた
めに、本発明の光制御デバイスの製造方法は、電気光学
効果を有する基板の表層部もしくは表面上に設けた光導
波路に、バッファ層を介して制御電極層を形成させるも
のであって、光導波路上の少なくとも一部領域を残して
基板上にレジスト層を積層し、次に光導波路上の少なく
とも一部領域にバッファ層と制御電極層とを順次積層
し、しかる後に前記レジスト層を除去することを特徴と
する。
In order to achieve the above object, a method of manufacturing a light control device according to the present invention comprises a buffer layer on an optical waveguide provided on a surface layer portion or surface of a substrate having an electro-optical effect. A control electrode layer is formed through the resist layer, a resist layer is laminated on the substrate leaving at least a partial region on the optical waveguide, and then a buffer layer and a control electrode are formed on at least a partial region on the optical waveguide. It is characterized in that layers are sequentially laminated, and then the resist layer is removed.

【0010】また特に、前記バッファ層は、酸素ガスを
含有するガス雰囲気中でスパッタリングを行って形成す
るとよい。
Particularly, the buffer layer is preferably formed by sputtering in a gas atmosphere containing oxygen gas.

【0011】[0011]

【作用】本発明の光制御デバイスの製造方法によれば、
バッファ層のパターン形成を制御電極形成と同時に行う
ため、従来の製造方法に比べて製造工程を大幅に簡略化
できるとともに、パターン精度が良好となる。
According to the method of manufacturing the light control device of the present invention,
Since the pattern formation of the buffer layer is performed at the same time as the formation of the control electrodes, the manufacturing process can be greatly simplified as compared with the conventional manufacturing method, and the pattern accuracy becomes good.

【0012】また、バッファ層の成膜を酸素を含有した
ガス雰囲気中でスパッタリングを行うことにより、従来
のように(例えば、特開昭59-181318 号公報参照)長時
間の高温アニールを行うことなく酸化物からなるバッフ
ァ層の酸素欠損を補うことができるため、バッファ層及
び制御電極層の連続作製が行え、かつバッファ層の酸素
欠損によるDCドリフトを大幅に低減することができ
る。
In addition, by performing sputtering for forming the buffer layer in a gas atmosphere containing oxygen, a high temperature annealing for a long time as in the prior art (see, for example, Japanese Patent Laid-Open No. 59-181318) is performed. Since oxygen vacancies in the buffer layer made of oxide can be compensated for, the buffer layer and the control electrode layer can be continuously manufactured, and DC drift due to oxygen vacancies in the buffer layer can be significantly reduced.

【0013】[0013]

【実施例】本発明に係る実施例を図面に基づいて詳細に
説明する。まず、両面が光学研磨された厚さ0.5 〜1.0
mm程度のオプティカルグレイドのLN単結晶(Zカッ
ト;カット面が(001) 面)の誘電体基板(以下、単に基
板ともいう)1を用意し、これを純水, アセトン等によ
り超音波洗浄を充分に行う。その後、例えば通常の半導
体デバイスの製造工程で使用される一般的なフォトレジ
ストを、基板1の表面上に0.5 〜1.5 μm 程度の厚さで
スピンコート法により塗布し、次いで適当な条件で露
光, 現像することにより、レジスト表層部のパターン幅
に比してレジスト層と基板との密着面の幅が0.1 〜数μ
m 程度広くなるような、断面が逆テーパ形状となるレジ
ストパターンを得る。これは従来のいわゆるフォトリソ
グラフィ技術を用いて容易に形成することができ、後記
する光導波路を形成させるためのパターン形状を成すも
のである。
Embodiments of the present invention will be described in detail with reference to the drawings. First, both sides are optically polished to a thickness of 0.5-1.0
Prepare a dielectric substrate (hereinafter simply referred to as substrate) 1 of LN single crystal (Z-cut; cut face is (001) face) of optical grade of about mm and ultrasonically clean it with pure water, acetone, etc. Do enough. After that, for example, a general photoresist used in a normal semiconductor device manufacturing process is applied on the surface of the substrate 1 by a spin coating method to a thickness of about 0.5 to 1.5 μm, and then exposed under appropriate conditions. By developing, the width of the contact surface between the resist layer and the substrate is 0.1 to several μ compared to the pattern width of the resist surface layer.
A resist pattern having an inversely tapered cross section, which is widened by about m, is obtained. This can be easily formed by using a conventional so-called photolithography technique, and forms a pattern shape for forming an optical waveguide described later.

【0014】次に、周知の真空蒸着法もしくはRFスパ
ッタリング法等により、前記レジストパターンの領域上
にチタン(Ti)の薄膜を20〜200 nm程度の厚さに成膜
した後、この基板1をアセトン中に浸漬してレジスト層
を溶融することにより、ストライプ幅数μm ,前記厚さ
の光導波路形状のTi膜を得る。その後、過湿もしくは
乾燥アルゴン(Ar)、または酸素(O2 )ガス雰囲
気、またはこれらの混合雰囲気ガスを毎分数リットルの
流量で流した1000℃程度の電気炉内において約10時間前
後加熱し、Tiを基板1の表層部へ熱拡散させて所望形
状を成す光導波路2を形成した(図1(a)参照)。な
お、このような光導波路の形成技術は上述した埋め込み
型の光導波路以外の各種光導波路に適用が可能であり、
例えばリッジ型の光導波路にもこの技術を適用すること
もできる。すなわち、光導波路2を基板1の表面に設け
てもよく、まずチタン膜を基板1の表面全域に上述した
薄膜形成技術を用いて形成し、このチタン膜を上述した
方法で基板表層部に熱拡散させた後、上述したフォトリ
ソグラフィ技術及び薄膜形成技術を用いて光導波路形状
のチタン膜を形成し、ドライエッチング等によりこのチ
タン膜の装荷領域以外のチタン拡散領域を除去して形成
することもできる。
Next, a titanium (Ti) thin film is formed in a thickness of about 20 to 200 nm on the region of the resist pattern by a well-known vacuum vapor deposition method or RF sputtering method, and then the substrate 1 is formed. By immersing the resist layer in acetone to melt it, an optical waveguide-shaped Ti film having a stripe width of several μm and the above thickness is obtained. After that, it is heated for about 10 hours in an electric furnace at about 1000 ° C. in which a humidified or dry argon (Ar) or oxygen (O 2) gas atmosphere or a mixed atmosphere gas thereof is flowed at a flow rate of several liters per minute, and Ti is heated for about 10 hours. Was thermally diffused to the surface layer of the substrate 1 to form the optical waveguide 2 having a desired shape (see FIG. 1A). Incidentally, such a technique for forming an optical waveguide can be applied to various optical waveguides other than the above-mentioned embedded optical waveguide,
For example, this technique can be applied to a ridge type optical waveguide. That is, the optical waveguide 2 may be provided on the surface of the substrate 1. First, a titanium film is formed on the entire surface of the substrate 1 by using the above-described thin film forming technique, and the titanium film is formed on the surface layer of the substrate by the method described above. After diffusion, a titanium film having an optical waveguide shape may be formed by using the above-mentioned photolithography technique and thin film forming technique, and the titanium diffusion region other than the titanium film loading region may be removed by dry etching or the like. it can.

【0015】次に、図1(b)に示すように、上述した
フォトリソグラフィ技術により制御電極パターンに微細
加工したレジスト層3を厚さ1 〜2 μm 程度に形成す
る。このとき、レジスト層3の断面形状が逆テーパ形状
であることが、パターンエッジ部にバリなどの微小砕片
を残すことなく、後述する良好なリフトオフを行うこと
ができる点で重要である。なお、このレジスト層3は少
なくとも光導波路2上の一部を含む領域を残して基板1
上に積層すればよい。
Next, as shown in FIG. 1B, a resist layer 3 finely processed into a control electrode pattern is formed to a thickness of about 1 to 2 μm by the photolithography technique described above. At this time, it is important that the cross-sectional shape of the resist layer 3 is an inverse taper shape, because good lift-off described below can be performed without leaving minute fragments such as burrs at the pattern edge portion. It should be noted that the resist layer 3 is left in the substrate 1 at least in a region including a part of the optical waveguide 2.
It may be stacked on top.

【0016】次に、図1(c)に示すように、RFスパ
ッタリング法等により、膜厚約0.2〜 2μm 程度のシリ
カ(SiO2 )もしくはアルミナ(Al2 O3 )等の低
屈折率の酸化物誘電体からなる1層もしくは複数層のバ
ッファ層4をレジスト層2及び基板1の表面上に形成し
た。ここで、バッファ層4はレジスト層3上にも形成さ
れているが、このバッファ層4は少なくともレジスト層
3が積層された領域を除いた光導波路2上の一部に積層
すればよい。
Next, as shown in FIG. 1C, a low refractive index oxide dielectric such as silica (SiO2) or alumina (Al2 O3) having a film thickness of about 0.2 to 2 .mu.m is formed by RF sputtering or the like. One layer or a plurality of layers of the buffer layer 4 consisting of was formed on the surfaces of the resist layer 2 and the substrate 1. Here, the buffer layer 4 is also formed on the resist layer 3, but the buffer layer 4 may be laminated on at least a part of the optical waveguide 2 except the region where the resist layer 3 is laminated.

【0017】ここで、スパッタガスとしてアルゴン及び
酸素の混合ガスを使用し、流量比は10/0.5〜10
/2程度が適当である。また、スパッタ成膜時の圧力は
2〜5mTorrでRFパワーは 100〜 300Wで成膜を行っ
た(最適値は装置や、成膜条件によって異なる)。な
お、これら混合ガスはアルゴン及び酸素に限定されるも
のではなく、少なくとも酸素ガスが含有されたものであ
ればよい。
Here, a mixed gas of argon and oxygen is used as a sputtering gas, and the flow rate ratio is 10 / 0.5 to 10.
/ 2 is suitable. Further, the film formation was carried out at a pressure of 2 to 5 mTorr and a RF power of 100 to 300 W during sputtering film formation (the optimum value varies depending on the apparatus and film forming conditions). It should be noted that these mixed gases are not limited to argon and oxygen, and may be any gas containing at least oxygen gas.

【0018】次いで、このバッファ層4と同様な製法に
て白金(Pt),金(Au),銀(Ag),クロム(C
r),アルミニウム(Al),タンタル(Ta),ニッ
ケル(Ni),チタン(Ti)等、その他の金属から成
る1層もしくは複数層の制御電極層5をバッファ層4上
に積層する。
Then, platinum (Pt), gold (Au), silver (Ag), chromium (C) are produced by the same manufacturing method as for the buffer layer 4.
r), aluminum (Al), tantalum (Ta), nickel (Ni), titanium (Ti), etc. One or a plurality of control electrode layers 5 made of other metal are laminated on the buffer layer 4.

【0019】ここで、バッファ層4及び制御電極層5と
は、例えば多元真空蒸着法もしくはマルチターゲットを
用いたRFスパッタリング法により連続的に成膜させる
ことができ、従来のようにバッファ層の形成後に行って
いたフォトリソグラフィー工程を不要とし、このときに
真空状態を維持しながら基板を清浄状態に保つようにす
る必要がなく、工程の大幅な簡略化を図ることができ
る。
Here, the buffer layer 4 and the control electrode layer 5 can be continuously formed by, for example, a multi-source vacuum deposition method or an RF sputtering method using a multi-target, and the formation of the buffer layer as in the prior art. The photolithography process performed later is not necessary, and it is not necessary to keep the substrate in a clean state while maintaining the vacuum state at this time, and the process can be greatly simplified.

【0020】次に、レジスト層3をアセトン等で溶解し
て酸化物のバッファ層4及び制御電極層5の所望のパタ
ーンを形成する。このとき、アセトン等の溶剤は基板1
に例えばフッ酸のような強酸のエッチング液を使用した
ようなダメージを与えることはなく、また、エッチング
液によりパターン形成するときに、材料によってはレジ
スト層3及び基板1を損傷しないようなエッチング液を
選定することが困難になる問題や、サイドエッチングに
よるパターン精度の悪化の問題を解消することができ、
さらに複数層の薄膜を重ねた構造にしたときに複数のエ
ッチング液を用いる煩雑さもなく、いかなる材料であっ
ても、またそれらが複数層重なった構造になっていても
パターン形成が容易に実現される。
Next, the resist layer 3 is dissolved with acetone or the like to form a desired pattern of the oxide buffer layer 4 and the control electrode layer 5. At this time, a solvent such as acetone is used for the substrate 1.
Does not cause damage as in the case of using a strong acid etching solution such as hydrofluoric acid, and does not damage the resist layer 3 and the substrate 1 depending on the material when forming a pattern with the etching solution. It is possible to solve the problem that it becomes difficult to select, and the problem of deterioration of pattern accuracy due to side etching,
Furthermore, there is no complexity of using a plurality of etching solutions when a structure in which a plurality of layers of thin films are stacked is used, and pattern formation can be easily realized with any material and with a structure in which a plurality of layers are stacked. It

【0021】上述の実施例に基づいて作製した光制御デ
バイス及び、バッファ層をアルゴン単独でスパッタ成膜
した光制御デバイスの、バッファ層によるDCドリフト
(概して短時間でのDCドリフト)を比較した結果、大
幅な緩和特性の向上がみられた。すなわち、図4(a)
に示す印加電圧波形に対し、従来では図4(b)に示す
ように数分オーダーでのDCドリフトが認められたのに
対して、この実施例によれば図4(c)に示すように数
分オーダーでのDCドリフトはほとんど認められなかっ
た。なお、図中Vは半波長電圧を示し、τは緩和時間で
ある。
Results of comparison of DC drift (generally short-time DC drift) due to the buffer layer between the light control device manufactured according to the above-described embodiment and the light control device in which the buffer layer is formed by sputtering with argon alone. , A significant improvement in relaxation characteristics was observed. That is, FIG. 4 (a)
In contrast to the applied voltage waveform shown in FIG. 4, a DC drift on the order of several minutes was conventionally recognized as shown in FIG. 4B, whereas according to this embodiment, as shown in FIG. Almost no DC drift on the order of a few minutes was observed. In the figure, V indicates a half-wave voltage, and τ is a relaxation time.

【0022】また、このアルゴン及び酸素の混合ガスに
よりスパッタリングを行った酸化膜の屈折率並びに抵抗
率を測定した結果、アルゴン単独のものと比較して屈折
率は小さく、抵抗率は増加していた。これは、バッファ
層の酸素欠損が補われ緻密化したことを示しており、デ
バイスの特性向上との相関が見られた。
Further, as a result of measuring the refractive index and the resistivity of the oxide film sputtered with this mixed gas of argon and oxygen, the refractive index was smaller and the resistivity was higher than that of the argon alone. . This indicates that the oxygen deficiency of the buffer layer was compensated and the buffer layer was densified, and a correlation with improvement in device characteristics was observed.

【0023】[0023]

【発明の効果】以上のように、本発明の光制御デバイス
の製造方法によれば、バッファ層のパターン形成を制御
電極形成と同時に行うため、従来の製造方法に比べて製
造工程を大幅に簡略化できるとともに、パターン精度を
極めて良好にさせる優れた製造方法を提供できる。
As described above, according to the method of manufacturing the light control device of the present invention, the patterning of the buffer layer is performed simultaneously with the formation of the control electrode, so that the manufacturing process is greatly simplified as compared with the conventional manufacturing method. It is possible to provide an excellent manufacturing method that can realize the pattern accuracy and can make the pattern accuracy extremely good.

【0024】また、バッファ層の成膜を酸素を含有した
ガス雰囲気中でスパッタリングを行うことにより、従来
のように長時間の高温アニールを行うことなくバッファ
層の酸素欠損を補うことができるため、バッファ層及び
制御電極層の連続作製が行え、かつバッファ層によ高温
アニールを行うことなくバッファ層によるDCドリフト
を大幅に低減することができる。
Further, since the buffer layer is formed by sputtering in a gas atmosphere containing oxygen, oxygen vacancies in the buffer layer can be compensated for without performing high temperature annealing for a long time as in the conventional case. The buffer layer and the control electrode layer can be continuously manufactured, and DC drift due to the buffer layer can be significantly reduced without performing high-temperature annealing on the buffer layer.

【0025】さらに、本発明によれば、レジスト層を例
えばアセトン等の有機溶剤にて容易に除去することが可
能なのでバッファ層あるいは制御電極を種々の材質から
なる多層構造を形成することが容易である。
Further, according to the present invention, since the resist layer can be easily removed with an organic solvent such as acetone, it is easy to form the buffer layer or the control electrode in a multi-layer structure made of various materials. is there.

【図面の簡単な説明】[Brief description of drawings]

【図1】(a)〜(d)はそれぞれ本発明に係る実施例
の各工程を示す図である。
1A to 1D are diagrams showing respective steps of an example according to the present invention.

【図2】(a)〜(c)はそれぞれ従来例の各工程を示
す図である。
2A to 2C are diagrams showing respective steps of a conventional example.

【図3】(a)〜(d)はそれぞれ他の従来例の各工程
を示す図である。
FIG. 3A to FIG. 3D are diagrams showing respective steps of another conventional example.

【図4】本発明の製造方法及び従来法によって作製した
光制御デバイスのバッファ層によるDCドリフト特性を
示す図
FIG. 4 is a diagram showing DC drift characteristics of a buffer layer of an optical control device manufactured by a manufacturing method of the present invention and a conventional method.

【符号の説明】[Explanation of symbols]

1 ・・・ 基板 2 ・・・ 光導波
路 3 ・・・ レジスト層 4 ・・・ バッフ
ァ層 5 ・・・ 制御電極層
1 ... Substrate 2 ... Optical waveguide 3 ... Resist layer 4 ... Buffer layer 5 ... Control electrode layer

Claims (2)

【特許請求の範囲】[Claims] 【請求項1】電気光学効果を有する基板の表層部もしく
は表面上に設けた光導波路に、バッファ層を介して制御
電極層を形成させる光制御デバイスの製造方法であっ
て、前記光導波路上の少なくとも一部領域を残して前記
基板上にレジスト層を積層し、次に前記光導波路上の少
なくとも一部領域にバッファ層と制御電極層とを順次積
層し、しかる後に前記レジスト層を除去することを特徴
とする光制御デバイスの製造方法。
1. A method of manufacturing a light control device, comprising a control electrode layer formed on a surface layer portion or a surface of a substrate having an electro-optical effect on a surface portion or a surface of the substrate through a buffer layer. Laminating a resist layer on the substrate leaving at least a partial region, then sequentially laminating a buffer layer and a control electrode layer on at least a partial region on the optical waveguide, and then removing the resist layer. A method for manufacturing a light control device, comprising:
【請求項2】前記バッファ層は、酸素ガスを含有するガ
ス雰囲気中でスパッタリングにより形成することを特徴
とする請求項1に記載の光制御デバイスの製造方法。
2. The method for manufacturing a light control device according to claim 1, wherein the buffer layer is formed by sputtering in a gas atmosphere containing oxygen gas.
JP5038701A 1992-05-29 1993-02-26 Production of optical control device Pending JPH0643412A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP5038701A JPH0643412A (en) 1992-05-29 1993-02-26 Production of optical control device

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
JP13815992 1992-05-29
JP4-138159 1992-05-29
JP5038701A JPH0643412A (en) 1992-05-29 1993-02-26 Production of optical control device

Publications (1)

Publication Number Publication Date
JPH0643412A true JPH0643412A (en) 1994-02-18

Family

ID=26377982

Family Applications (1)

Application Number Title Priority Date Filing Date
JP5038701A Pending JPH0643412A (en) 1992-05-29 1993-02-26 Production of optical control device

Country Status (1)

Country Link
JP (1) JPH0643412A (en)

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH07128624A (en) * 1993-11-01 1995-05-19 Sumitomo Osaka Cement Co Ltd Production of waveguide optical element
JPH08278473A (en) * 1995-02-09 1996-10-22 Nec Corp Waveguide type optical controll device and its production
US8539852B2 (en) 2010-06-17 2013-09-24 Kabushiki Kaisha Tokai Rika Denki Seisakusho Gearshift lever for vehicle transmission

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH07128624A (en) * 1993-11-01 1995-05-19 Sumitomo Osaka Cement Co Ltd Production of waveguide optical element
JPH08278473A (en) * 1995-02-09 1996-10-22 Nec Corp Waveguide type optical controll device and its production
US8539852B2 (en) 2010-06-17 2013-09-24 Kabushiki Kaisha Tokai Rika Denki Seisakusho Gearshift lever for vehicle transmission

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