JPH0642464B2 - Annealing method for semiconductor crystal substrates - Google Patents
Annealing method for semiconductor crystal substratesInfo
- Publication number
- JPH0642464B2 JPH0642464B2 JP754986A JP754986A JPH0642464B2 JP H0642464 B2 JPH0642464 B2 JP H0642464B2 JP 754986 A JP754986 A JP 754986A JP 754986 A JP754986 A JP 754986A JP H0642464 B2 JPH0642464 B2 JP H0642464B2
- Authority
- JP
- Japan
- Prior art keywords
- semiconductor crystal
- crystal substrate
- annealing
- annealing method
- crystal substrates
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Lifetime
Links
Landscapes
- Recrystallisation Techniques (AREA)
- Crystals, And After-Treatments Of Crystals (AREA)
Description
【発明の詳細な説明】 （産業上の利用分野） 本発明は、半導体結晶基板のアニール法に関するもので
ある。TECHNICAL FIELD The present invention relates to a method for annealing a semiconductor crystal substrate.
（従来の技術） 半導体結晶基板のアニール法の一つとして、ランプアニ
ール法が考案され、実用化されている。ランプアニール
法とは、赤外線またはそれより短い波長域にスペクトル
をもつランプ（光源）から輻射された電磁波を半導体結
晶基板に吸収させることにより、これを急速かつ短時間
のうちに加熱する方法である。ランプアニール法では、
加熱時間が短いために、工程が簡単で、キヤリヤのウエ
ハ面内での拡散が少く、不純物注入領域が互いに重なり
合うことが生じにくい。このため、ランプアニール法は
集積度の高い半導体集積回路の製造の際に用いられてい
る。しかしながら、半導体結晶の赤外線吸収率は一般に
低いために、ランプアニールによる半導体結晶基板の加
熱は有効に行なわれない。特に、GaAs等の半絶縁性半導
体結晶においては、赤外線吸収率が非常に低く、ランプ
アニールによる加熱効率はかなり低いという問題が存在
している。(Prior Art) As one of the annealing methods for semiconductor crystal substrates, a lamp annealing method has been devised and put into practical use. The lamp annealing method is a method in which an electromagnetic wave radiated from a lamp (light source) having a spectrum in an infrared ray or a shorter wavelength region is absorbed in a semiconductor crystal substrate to heat it rapidly and in a short time. . In the lamp annealing method,
Since the heating time is short, the process is simple, diffusion of the carrier within the wafer surface is small, and the impurity implantation regions are unlikely to overlap with each other. For this reason, the lamp annealing method is used in the manufacture of highly integrated semiconductor integrated circuits. However, since the infrared absorption rate of the semiconductor crystal is generally low, heating of the semiconductor crystal substrate by lamp annealing is not effectively performed. Particularly, in a semi-insulating semiconductor crystal such as GaAs, there is a problem that the infrared absorption rate is very low and the heating efficiency by lamp annealing is considerably low.
（発明が解決しようとする問題点） 本発明は、前述の従来技術の問題点を解決し半導体結晶
基板のランプアニールを効率よく行なう方法を提供する
ものである。(Problems to be Solved by the Invention) The present invention provides a method for solving the above-mentioned problems of the prior art and efficiently performing lamp annealing of a semiconductor crystal substrate.
（問題点を解決するための手段及び作用） 本発明による半導体結晶基板のアニール法は、Ｎ型また
はＰ型の不純物となり得るイオンを注入すべき半導体結
晶基板の裏面に予め高濃度のＮ型不純物をドープして伝
導電子密度を増大させておくことによって該半導体結晶
基板の赤外線吸収能を高め、赤外線波長域にスペクトル
をもつランプにて該半導体結晶基板を照射し加熱するこ
とを特徴とする。(Means and Actions for Solving Problems) In the annealing method for a semiconductor crystal substrate according to the present invention, a high-concentration N-type impurity is previously formed on the back surface of the semiconductor crystal substrate into which ions that may be N-type or P-type impurities should be implanted. By increasing the conduction electron density to increase the infrared absorption capacity of the semiconductor crystal substrate, and irradiating and heating the semiconductor crystal substrate with a lamp having a spectrum in the infrared wavelength range.
（実施例） 第１図は、本発明の一実施例としてランプアニール炉の
構造の概略を示したものである。第１図において、１は
ランプアニール炉本体、２は赤外線ヒーター、３はN2ま
たは希ガス導入管、４は排気管、５は試料ホルダー、６
及び７は半導体結晶基板を表わす。(Embodiment) FIG. 1 shows an outline of the structure of a lamp annealing furnace as an embodiment of the present invention. In FIG. 1, 1 is a lamp annealing furnace main body, 2 is an infrared heater, 3 is an N 2 or rare gas introduction pipe, 4 is an exhaust pipe, 5 is a sample holder, 6
Reference numerals 7 and 7 represent semiconductor crystal substrates.
第２図は、試料ホルダー部分の拡大図である。加熱すべ
き半導体結晶基板６，７は、Ａ，Ｂ両面にSiNx,SiO2ま
たはSiNxOy膜を付着し、Ａ面どうしを重ね合わせ、Ｂ面
を赤外線ヒーター２に対して露出するように取り付けら
れている。但し、Ｂ面には予め高濃度のＮ型不純物がド
ープされており、Ｂ面付近の伝導電子密度が１×1018cm
-3以上となっている。FIG. 2 is an enlarged view of the sample holder portion. The semiconductor crystal substrates 6 and 7 to be heated are attached so that SiNx, SiO 2 or SiNxOy films are attached to both sides of A and B, the A sides are overlapped, and the B side is exposed to the infrared heater 2. There is. However, the B-face was previously doped with a high concentration of N-type impurities, and the conduction electron density near the B-face was 1 × 10 18 cm 2.
-3 or more.
（発明の効果） 半導体結晶は、free carrier absorption（伝導バンド
におけるバンド内遷移）を誘起することによって赤外線
波長域の電磁波を吸収する。本発明では、半導体結晶基
板の片面に予め高濃度のＮ型不純物をドープして伝導電
子（即ち、free carrier）密度を増大させておくことに
よって半導体結晶基板の赤外線吸収能を高めることがで
きるので、ランプアニール法を用いて該半導体結晶基板
を短時間のうちに効果的に加熱することができる。(Effect of the Invention) A semiconductor crystal absorbs electromagnetic waves in the infrared wavelength range by inducing free carrier absorption (intraband transition in the conduction band). In the present invention, one side of the semiconductor crystal substrate is doped with a high concentration of N-type impurities in advance to increase the density of conduction electrons (that is, free carrier), so that the infrared absorption capability of the semiconductor crystal substrate can be increased. By using the lamp annealing method, the semiconductor crystal substrate can be effectively heated in a short time.
第１図はランプアニール炉の概略図である。 第２図は試料ホルダー部分の拡大図である。 １…ランプアニール炉本体 ２…赤外線ヒーター ３…N2または希ガス導入管 ４…排気管 ５…試料ホルダー ６及び７…半導体結晶基板 ６Ａ，７Ａ…イオン注入したところの面 ６Ｂ，７Ｂ…予め高濃度のＮ型不純物をドープしたとこ
ろの面FIG. 1 is a schematic view of a lamp annealing furnace. FIG. 2 is an enlarged view of the sample holder part. 1 ... Lamp annealing furnace main body 2 ... Infrared heater 3 ... N 2 or rare gas introduction pipe 4 ... Exhaust pipe 5 ... Sample holder 6 and 7 ... Semiconductor crystal substrate 6A, 7A ... Ion-implanted surface 6B, 7B ... High in advance Surface where N-type impurities of high concentration are doped
Claims (4)
を注入すべき半導体結晶基板の裏面に予め高濃度のＮ型
不純物をドープし、伝導電子密度を増大させておくこと
によって該半導体結晶基板の赤外線吸収能を高め、赤外
線波長域にスペクトルをもつランプにて該半導体結晶基
板を照射し加熱することを特徴とする半導体結晶基板の
アニール法。1. A semiconductor crystal substrate to which ions capable of becoming N-type or P-type impurities are to be implanted by previously doping a high-concentration N-type impurity on the back surface of the semiconductor crystal substrate to increase the conduction electron density. A method for annealing a semiconductor crystal substrate, which comprises irradiating the semiconductor crystal substrate with a lamp having a spectrum in the infrared wavelength range and heating the semiconductor crystal substrate by increasing the infrared absorption ability of the semiconductor crystal substrate.
るＮ型不純物の密度を１×1018cm-3以上とすることを特
徴とする特許請求の範囲第１項記載の半導体結晶基板の
アニール法。2. The annealing of the semiconductor crystal substrate according to claim 1, wherein the density of the N-type impurities pre-doped on the back surface of the semiconductor crystal substrate is 1 × 10 18 cm −3 or more. Law.
にSiNx,SiO2またはSiNxOy膜を付着させることを特徴と
する特許請求の範囲第１項記載の半導体結晶基板のアニ
ール法。3. The annealing method for a semiconductor crystal substrate according to claim 1, wherein SiNx, SiO 2 or SiNxOy films are adhered to both surfaces of the semiconductor crystal substrate before annealing.
で行なうことを特徴とする特許請求の範囲第１項記載の
半導体結晶基板のアニール法。4. The annealing method for a semiconductor crystal substrate according to claim 1, wherein the annealing is performed in an atmosphere of N 2 or a rare gas.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP754986A JPH0642464B2 (en) | 1986-01-16 | 1986-01-16 | Annealing method for semiconductor crystal substrates |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP754986A JPH0642464B2 (en) | 1986-01-16 | 1986-01-16 | Annealing method for semiconductor crystal substrates |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS62165326A JPS62165326A (en) | 1987-07-21 |
| JPH0642464B2 true JPH0642464B2 (en) | 1994-06-01 |
Family
ID=11668877
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP754986A Expired - Lifetime JPH0642464B2 (en) | 1986-01-16 | 1986-01-16 | Annealing method for semiconductor crystal substrates |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH0642464B2 (en) |
Families Citing this family (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2004063863A (en) * | 2002-07-30 | 2004-02-26 | Matsushita Electric Ind Co Ltd | Method for manufacturing semiconductor device |
-
1986
- 1986-01-16 JP JP754986A patent/JPH0642464B2/en not_active Expired - Lifetime
Also Published As
| Publication number | Publication date |
|---|---|
| JPS62165326A (en) | 1987-07-21 |
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