JPH01110726A - Lamp annealing - Google Patents
Lamp annealingInfo
- Publication number
- JPH01110726A JPH01110726A JP62268534A JP26853487A JPH01110726A JP H01110726 A JPH01110726 A JP H01110726A JP 62268534 A JP62268534 A JP 62268534A JP 26853487 A JP26853487 A JP 26853487A JP H01110726 A JPH01110726 A JP H01110726A
- Authority
- JP
- Japan
- Prior art keywords
- wafer
- lamp
- absorbing
- substrate
- main surface
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 238000000137 annealing Methods 0.000 title claims description 25
- 238000000034 method Methods 0.000 claims abstract description 25
- 239000000758 substrate Substances 0.000 claims abstract description 14
- 230000001678 irradiating effect Effects 0.000 claims abstract 2
- 239000006096 absorbing agent Substances 0.000 claims description 14
- HBMJWWWQQXIZIP-UHFFFAOYSA-N silicon carbide Chemical compound [Si+]#[C-] HBMJWWWQQXIZIP-UHFFFAOYSA-N 0.000 abstract description 14
- 229910010271 silicon carbide Inorganic materials 0.000 abstract description 14
- 238000010438 heat treatment Methods 0.000 abstract description 11
- 239000004065 semiconductor Substances 0.000 abstract description 7
- 239000006185 dispersion Substances 0.000 abstract description 4
- 239000012535 impurity Substances 0.000 description 9
- 238000010586 diagram Methods 0.000 description 6
- 229910052736 halogen Inorganic materials 0.000 description 6
- 239000005360 phosphosilicate glass Substances 0.000 description 6
- 229910052721 tungsten Inorganic materials 0.000 description 6
- 239000010937 tungsten Substances 0.000 description 6
- -1 tungsten halogen Chemical class 0.000 description 6
- 239000010410 layer Substances 0.000 description 5
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N silicon dioxide Inorganic materials O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 description 4
- 239000010453 quartz Substances 0.000 description 3
- OAICVXFJPJFONN-UHFFFAOYSA-N Phosphorus Chemical compound [P] OAICVXFJPJFONN-UHFFFAOYSA-N 0.000 description 2
- 239000013078 crystal Substances 0.000 description 2
- 238000010894 electron beam technology Methods 0.000 description 2
- 238000005224 laser annealing Methods 0.000 description 2
- 229910052698 phosphorus Inorganic materials 0.000 description 2
- 239000011574 phosphorus Substances 0.000 description 2
- 239000007787 solid Substances 0.000 description 2
- 229910004298 SiO 2 Inorganic materials 0.000 description 1
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 description 1
- 239000003575 carbonaceous material Substances 0.000 description 1
- 230000007547 defect Effects 0.000 description 1
- 238000009792 diffusion process Methods 0.000 description 1
- 230000000694 effects Effects 0.000 description 1
- 230000031700 light absorption Effects 0.000 description 1
- 238000004519 manufacturing process Methods 0.000 description 1
- 229910021420 polycrystalline silicon Inorganic materials 0.000 description 1
- 229910052710 silicon Inorganic materials 0.000 description 1
- 239000010703 silicon Substances 0.000 description 1
- 229910052814 silicon oxide Inorganic materials 0.000 description 1
- 239000002344 surface layer Substances 0.000 description 1
- 229910052724 xenon Inorganic materials 0.000 description 1
- FHNFHKCVQCLJFQ-UHFFFAOYSA-N xenon atom Chemical compound [Xe] FHNFHKCVQCLJFQ-UHFFFAOYSA-N 0.000 description 1
Landscapes
- Manufacture Of Macromolecular Shaped Articles (AREA)
- Laminated Bodies (AREA)
- Shaping By String And By Release Of Stress In Plastics And The Like (AREA)
Abstract
Description
【発明の詳細な説明】
〔概 要〕
半導体装置を熱処理するランプアニール方法の改善に関
し、
被処理基板内の加熱温度のバラツキを減少させることを
目的とし、
被処理基板の主面に間隙を介して光エネルギーを吸収す
る吸収体を配置し、該吸収体にランプを照射して該吸収
体からの熱の対流によって前記被処理基板の主面が熱処
理されるようにしたことを特徴とする。[Detailed Description of the Invention] [Summary] Regarding the improvement of a lamp annealing method for heat-treating semiconductor devices, the present invention relates to an improvement in a lamp annealing method for heat-treating semiconductor devices. The present invention is characterized in that an absorber that absorbs light energy is disposed, the absorber is irradiated with a lamp, and the main surface of the substrate to be processed is heat-treated by convection of heat from the absorber.
本発明は半導体装置を熱処理するランプアニール方法の
改善に関する。The present invention relates to improvements in lamp annealing methods for heat treating semiconductor devices.
〔従来の技術と発明が解決しようとする問題点〕半導体
デバイスの高速化のために、浅い接合をもった不純物層
の形成が望まれており、例えば、第４図に示すようなｎ
ｐｎ型バイポーラトランジスタのｎ型エミッタ領域は厚
み１０００〜２０００人、不純物濃度１０ ／ｃｎ！
程度が必要になっている。第２図において、１はｎ型コ
レクタ領域、２はｐ型ベース領域、３はｎ型エミッタ領
域、４はフィールド絶縁膜、５はエミッタ電極を示し、
上記のエミッタ領域３の寸法条件に対してｐ型ベース領
域の厚みは２０００〜３０００人、不純物濃度は１０
／ｃｏ？程度である。[Prior art and problems to be solved by the invention] In order to increase the speed of semiconductor devices, it is desired to form an impurity layer with a shallow junction.
The n-type emitter region of a pn-type bipolar transistor has a thickness of 1000 to 2000 nm and an impurity concentration of 10/cn!
degree is required. In FIG. 2, 1 is an n-type collector region, 2 is a p-type base region, 3 is an n-type emitter region, 4 is a field insulating film, and 5 is an emitter electrode.
For the above dimensional conditions of the emitter region 3, the thickness of the p-type base region is 2000 to 3000, and the impurity concentration is 10.
/co? That's about it.
ところで、このごミッタ領域のような不純物濡度が高く
、厚みの薄い不純物層を従来の電気炉を利用した熱処理
で形成することは困難であり、最近、短時間加熱できる
急速熱処理方式、例えば、レーザアニール、電子ビーム
アニール、ランプアニールなどが使用されている。しか
し、レーザアニールや電子ビームアニールはビームをス
キャンさせるμＳ以下の短時間加熱方式で、１２００℃
程度の高温度に瞬間的に加熱され、急熱１急冷されるた
めに結晶欠陥が発生し易い欠点がある。By the way, it is difficult to form a thin impurity layer with high impurity wetness like this emitter region by heat treatment using a conventional electric furnace.Recently, rapid heat treatment methods that can heat in a short time, such as Laser annealing, electron beam annealing, lamp annealing, etc. are used. However, laser annealing and electron beam annealing are short-time heating methods of less than μS that scan the beam, and are heated to 1200°C.
It has the disadvantage that crystal defects are likely to occur because it is instantaneously heated to a relatively high temperature and then rapidly heated and cooled.
従って、その場合はウェハー全面を均一に加熱する方式
が望まれて、ランプアニール（Ｌａｍｐ Ａｎｎｅａｌ
）法を使用した不純物層の形成がおこなわれている。こ
のランプアニール法は秒単位のアニール法で、１０００
℃程度に加熱され、不純物拡散によって歪んだ結晶は容
易に回復される。Therefore, in that case, a method that uniformly heats the entire surface of the wafer is desired, and a lamp annealing method is required.
) method is used to form an impurity layer. This lamp annealing method is an annealing method in seconds, and
The crystal, which is heated to about .degree. C. and distorted by impurity diffusion, is easily recovered.
第５図は一例のランプアニール装置の概要図を示してお
り、１１はウェハー（被処理基板）、１２は載置台、１
３は石英管、１４は反射板、１５はタングステンハロゲ
ンランプで、上下に複数のタングステンハロゲンランプ
１５を配置し、その外側に反射板を設け、反射板１４は
水冷して温度上昇を防止している構造で、透明な石英管
１３はランプの光エネルギーを吸収せずに透過し、ウェ
ハー１１が光エネルギーを吸収して加熱される。且つ、
上下のタングステンハロゲンランプ１５のうち、下側の
ランプは直接ウェハーの主面を照射せず、ウェハーの裏
面を加熱する補助的な役目をする。尚、光源としては、
タングステンハロゲンランプ１５の他、キセノンアーク
ランプなども使用されている。FIG. 5 shows a schematic diagram of an example of a lamp annealing apparatus, in which 11 is a wafer (substrate to be processed), 12 is a mounting table, 1
3 is a quartz tube, 14 is a reflector, and 15 is a tungsten halogen lamp. A plurality of tungsten halogen lamps 15 are arranged above and below, a reflector is provided on the outside, and the reflector 14 is water-cooled to prevent temperature rise. In this structure, the transparent quartz tube 13 transmits the light energy of the lamp without absorbing it, and the wafer 11 absorbs the light energy and is heated. and,
Of the upper and lower tungsten halogen lamps 15, the lower lamp does not directly irradiate the main surface of the wafer, but plays an auxiliary role in heating the back surface of the wafer. In addition, as a light source,
In addition to the tungsten halogen lamp 15, a xenon arc lamp is also used.
ところで、ウェハーは４〜６インチφ程度と表面積が大
きく、且つ、ウェハーの主面には酸化シリコン（ＳｉＯ
２）などの異種膜が形成されて光の吸収係数が異なり、
且つ、これらの表面層の膜厚は一定ではなく部分的に相
異している。従って、このような半導体デバイスの構造
の違いのために、不必要な部分が加熱されて、必要な部
分が十分に加熱されないと云う問題が起きる。例えば、
燐珪酸ガラス（ＰＳＧ）膜から燐を拡散させてｎ型不純
物層を形成すると、表面抵抗のバラツキが太き（なって
、そのバラツキは時間と共に増加し、加熱時間が約１２
０秒では７〜８％程度の抵抗値のバラツキに達する。Incidentally, the wafer has a large surface area of about 4 to 6 inches in diameter, and the main surface of the wafer is coated with silicon oxide (SiO
2) Different types of films are formed with different light absorption coefficients,
Moreover, the film thicknesses of these surface layers are not constant but partially different. Therefore, due to such differences in the structure of semiconductor devices, a problem arises in that unnecessary portions are heated and necessary portions are not sufficiently heated. for example,
When an n-type impurity layer is formed by diffusing phosphorus from a phosphosilicate glass (PSG) film, the variation in surface resistance increases (the variation increases with time, and the heating time is about 12
At 0 seconds, the resistance value varies by about 7 to 8%.
本発明はこのウェハー内の加熱温度のバラツキを減少さ
せることを目的としたランプアニール方法を提案するも
のである。The present invention proposes a lamp annealing method aimed at reducing variations in heating temperature within a wafer.
その目的は、被処理基板の主面に間隙を介して光エネル
ギーを吸収する吸収体を配置し、該吸収体にランプを照
射して該吸収体からの熱の対流によって前記被処理基板
の主面が熱処理されるようにしたランプアニール法によ
って達成される。The purpose of this is to arrange an absorber that absorbs light energy through a gap on the main surface of the substrate to be processed, and to irradiate the absorber with a lamp so that the heat convection from the absorber causes the main surface of the substrate to be processed to absorb light energy. This is achieved by a lamp annealing method in which the surface is heat treated.
即ち、本発明は、ランプアニールのランプから照射した
光を吸収体に吸収させ、吸収体から熱エネルギーを熱対
流によって被処理基板に与えて、熱処理する方法である
。そうすれば、加熱温度のバラツキが減少して、半導体
デバイスが高品質化される。That is, the present invention is a method of heat-treating a substrate by absorbing light emitted from a lamp for lamp annealing into an absorber, and applying thermal energy from the absorber to a substrate to be processed by thermal convection. By doing so, variations in heating temperature are reduced and the quality of the semiconductor device is improved.
以下、図面を参照して実施例により詳細に説明する。 Hereinafter, embodiments will be described in detail with reference to the drawings.
第１図は本発明にかかるランプアニール方法を示す図で
、第５図に説明したランプアニール装置のウェハーとＲ
置台との部分を図示している。上面から照射するランプ
の光を吸収する吸収体として、シリコンカーバイド（Ｓ
ｉＣ）２１を用いており、間隙２龍を介してウェハー１
１（上側が主面）が配置されるように載置台２２を工夫
している。シリコンカーバイド２１の厚みは３龍、直径
は６インチφで、直径５インチφのウェハーに対してや
や大きい口径のものを配置している。FIG. 1 is a diagram showing the lamp annealing method according to the present invention, in which the wafer and R
The part with the stand is shown. Silicon carbide (S
iC) 21 is used, and the wafer 1 is passed through the gap 2.
1 (the upper side is the main surface) is arranged on the mounting table 22. The silicon carbide 21 has a thickness of 3 mm and a diameter of 6 inches, which is slightly larger than the wafer having a diameter of 5 inches.
かくして、シリコンウェハーの主面に燐珪酸ガラス膜を
被覆し、タングステンハロゲンランプを用イたランプア
ニールによって熱処理した結果を第２図および第３図に
示している。なお、この際、燐珪酸ガラス膜が光エネル
ギーで加熱され易いように、多結晶シリコン膜で燐珪酸
ガラス膜を包囲した状態としており、そうすれば、ラン
プアニールによって燐珪酸ガラス膜から燐が拡散してｎ
型不純物層がウェハー表面に形成される。第２図はその
表面抵抗（ρΩ／ ）と処理時間（秒）との関係を示し
ており、実線で示す曲線■は本発明にかかるランプアニ
ール法によるもの、点線で示す曲線■はシリコンカーバ
イド（ＳｉＣ）を配置せず、光エネルギーを直接ウェハ
ーに照射した方法によるものである。曲線■、■は殆ど
返信しており、これからシリコンカーバイドを介してア
ニールしても十分熱処理されることが判る。Thus, the main surface of the silicon wafer was coated with a phosphosilicate glass film and heat treated by lamp annealing using a tungsten halogen lamp. The results are shown in FIGS. 2 and 3. At this time, the phosphosilicate glass film is surrounded by a polycrystalline silicon film so that the phosphosilicate glass film is easily heated by light energy, and in this case, phosphorus is diffused from the phosphosilicate glass film by lamp annealing. Then n
A type impurity layer is formed on the wafer surface. Figure 2 shows the relationship between the surface resistance (ρΩ/ ) and the processing time (seconds), where the solid curve ■ is for the lamp annealing method according to the present invention, and the dotted curve ■ is for silicon carbide ( This method is based on a method in which light energy is directly irradiated onto the wafer without placing SiC (SiC) thereon. The curves ■ and {circle around (2)} show almost no response, and it can be seen from this that even if annealing is performed through silicon carbide, the heat treatment is sufficient.
次に、第３図は表面抵抗のバラツキ（％）と処理時間（
秒）との関係を図示している。実線で示す曲線Ｉは本発
明にかかるランプアニール法によるもの、点線で示す曲
線■はシリコンカーバイドを配置せず、光エネルギーを
直接ウェハーに照射した方法によるもの、破線で示す曲
線■はシリコンカーバイドをウェハー面に密着させたも
のの結果である。これより、シリコンカーバイドを介在
させることによって表面抵抗のバラツキが減少すること
か明らかで、且つ、シリコンカーバイドをウェハーに密
着させるよりも、若干の間隙を設けた方がバラツキが僅
かに減少することも判る。Next, Figure 3 shows the variation in surface resistance (%) and processing time (
(seconds). The curve I shown by the solid line is obtained by the lamp annealing method according to the present invention, the curve ■ shown by the dotted line is obtained by the method in which the wafer is directly irradiated with light energy without placing silicon carbide, and the curve ■ shown by the broken line is obtained by the method in which the wafer is directly irradiated with light energy without disposing silicon carbide. This is the result when the wafer was placed in close contact with the surface of the wafer. From this, it is clear that the dispersion of surface resistance is reduced by interposing silicon carbide, and it is also possible that dispersion is slightly reduced by providing a slight gap rather than by adhering silicon carbide to the wafer. I understand.
従って、本発明は光エネルギーを吸収する吸収体を間隙
を介して配置してランプアニールする方法を提案するも
のである。なお、このような吸収体としてはシリコンカ
ーバイドの他にカーボン材などが考えられる。Therefore, the present invention proposes a lamp annealing method in which absorbers that absorb light energy are arranged with gaps in between. In addition to silicon carbide, carbon materials and the like can be considered as such an absorber.
以上の説明から明らかなように、本発明によればランプ
アニールによる被処理基板（ウェハー）内の熱処理温度
のバラツキが減少して、高速半立体デバイスの品質向上
に大きく貢献するものである。As is clear from the above description, according to the present invention, variations in heat treatment temperature within a substrate to be processed (wafer) by lamp annealing are reduced, and this greatly contributes to improving the quality of high-speed semi-solid devices.
第１図は本発明にかかるランプアニール方法を示す図、
第２図は表面抵抗と処理時間との関係図、第３図は表面
抵抗のバラツキと処理時間との関係図、
第４図はｎｐｎバイポーラトランジスタの部分断面図、
第５図はランプアニール装置の概要図である。
図において、
１１はウェハー（被処理基板）、
１２、２２は載置台、
１３は石英管、
１４は反射板、
１５はタングステンハロゲンランプ、
２１はシリコンカーバイド（吸収体）
を示している。
４４さ日月＋ｚｒｐ＞ｍう＞７’７＝−ル方４ｓ木ｔｍ
第１図
Ｘ！Ｌｐｌ吟固Ｃ社）
ｋ面抵ａｙあ理眸闇び関係ｍ
第２図
ｆｉ ３９ Ｅ今７’！Ｉ（す）
表面・抵抗め）Ｖう′／ｈメｂ理番キ固Ｌ＾し１是Ｊ
゛第３図
ｎｐｎ ｔｖ４Ｐ−ラドラ〉シ“λり一−ｇｒｉｍ第４
図
う＞７−アニール暮１−壽隻τイ刀
第５図Fig. 1 is a diagram showing the lamp annealing method according to the present invention, Fig. 2 is a relation diagram between surface resistance and processing time, Fig. 3 is a relation diagram between surface resistance variation and processing time, and Fig. 4 is npn. A partial cross-sectional view of a bipolar transistor, and FIG. 5 is a schematic diagram of a lamp annealing device. In the figure, 11 is a wafer (substrate to be processed), 12 and 22 are mounting tables, 13 is a quartz tube, 14 is a reflection plate, 15 is a tungsten halogen lamp, and 21 is silicon carbide (absorber). 44 days and months + zrp>mu>7'7=-ru 4s tree tm
Figure 1: X! Lpl Gingo C Company) K-side resist ayar eye dark relationship m Fig. 2 fi 39 E now 7'! I (Surface/resistance)
゛Figure 3 npn tv4P-radora>
Figure 7 - Anneal life 1 - Jusen τi sword Figure 5
Claims (1)
する吸収体を配置し、該吸収体にランプを照射して該吸
収体からの熱の対流によって前記被処理基板の主面が熱
処理されるようにしたことを特徴とするランプアニール
方法。An absorber that absorbs light energy is arranged on the main surface of the substrate to be processed through a gap, and the main surface of the substrate to be processed is heat-treated by irradiating the absorber with a lamp and convection of heat from the absorber. A lamp annealing method characterized by:
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP62268534A JPH01110726A (en) | 1987-10-23 | 1987-10-23 | Lamp annealing |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP62268534A JPH01110726A (en) | 1987-10-23 | 1987-10-23 | Lamp annealing |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPH01110726A true JPH01110726A (en) | 1989-04-27 |
Family
ID=17459852
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP62268534A Pending JPH01110726A (en) | 1987-10-23 | 1987-10-23 | Lamp annealing |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH01110726A (en) |
Cited By (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US5861609A (en) * | 1995-10-02 | 1999-01-19 | Kaltenbrunner; Guenter | Method and apparatus for rapid thermal processing |
| US5970213A (en) * | 1993-03-02 | 1999-10-19 | Balzers Und Leybold Deutschland Holding Aktiengesellscaft | Apparatus for heating a transparent substrate utilizing an incandescent lamp and a heating disk emitting infrared wavelengths |
| US6403475B1 (en) | 1999-06-18 | 2002-06-11 | Hitachi, Ltd. | Fabrication method for semiconductor integrated device |
| JP2008251733A (en) * | 2007-03-29 | 2008-10-16 | Nec Corp | Optical heating device and optical heating method |
-
1987
- 1987-10-23 JP JP62268534A patent/JPH01110726A/en active Pending
Cited By (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US5970213A (en) * | 1993-03-02 | 1999-10-19 | Balzers Und Leybold Deutschland Holding Aktiengesellscaft | Apparatus for heating a transparent substrate utilizing an incandescent lamp and a heating disk emitting infrared wavelengths |
| US5861609A (en) * | 1995-10-02 | 1999-01-19 | Kaltenbrunner; Guenter | Method and apparatus for rapid thermal processing |
| US6403475B1 (en) | 1999-06-18 | 2002-06-11 | Hitachi, Ltd. | Fabrication method for semiconductor integrated device |
| JP2008251733A (en) * | 2007-03-29 | 2008-10-16 | Nec Corp | Optical heating device and optical heating method |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| JP3466633B2 (en) | Annealing method for polycrystalline semiconductor layer | |
| US4659422A (en) | Process for producing monocrystalline layer on insulator | |
| JPS58223320A (en) | Diffusing method for impurity | |
| KR100272145B1 (en) | Shield, apparatus for heat-treating semiconductor substrate, and method for the same | |
| JPH03266424A (en) | Annealing process of semiconductor substrate | |
| JPH01110726A (en) | Lamp annealing | |
| JP2004063863A (en) | Method for manufacturing semiconductor device | |
| JPS61116820A (en) | Annealing method for semiconductor | |
| JPS59211221A (en) | Heat treatment of ion implanted semiconductor | |
| JPS59178718A (en) | Semiconductor substrate processing apparatus | |
| JPH0420254B2 (en) | ||
| JPS60239400A (en) | Process for annealing compound semiconductor | |
| JP4581238B2 (en) | Silicon carbide semiconductor manufacturing apparatus and silicon carbide semiconductor manufacturing method using the same | |
| JP2530158B2 (en) | Selective heating method for transparent substrates | |
| JPH0351091B2 (en) | ||
| JP2979550B2 (en) | Lamp annealing equipment | |
| JPS60193343A (en) | Heat treatment device | |
| JP2551040B2 (en) | Method for manufacturing semiconductor device | |
| JP2002124483A (en) | Heat treatment device and method therefor using the same and film forming method | |
| JPH0572096B2 (en) | ||
| JP2778068B2 (en) | Heat treatment method for semiconductor device | |
| JPS62271420A (en) | Treatment equipment for semiconductor substrate | |
| JPH057860B2 (en) | ||
| JPS6244847B2 (en) | ||
| JPH0210569B2 (en) |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| A621 | Written request for application examination |
Free format text: JAPANESE INTERMEDIATE CODE: A621 Effective date: 20040406 |
|
| A977 | Report on retrieval |
Effective date: 20050120 Free format text: JAPANESE INTERMEDIATE CODE: A971007 |
|
| A131 | Notification of reasons for refusal |
Free format text: JAPANESE INTERMEDIATE CODE: A131 Effective date: 20050628 |
|
| A521 | Written amendment |
Effective date: 20050824 Free format text: JAPANESE INTERMEDIATE CODE: A523 |
|
| A02 | Decision of refusal |
Effective date: 20050920 Free format text: JAPANESE INTERMEDIATE CODE: A02 |
|
| A521 | Written amendment |
Free format text: JAPANESE INTERMEDIATE CODE: A523 Effective date: 20051013 |
|
| A911 | Transfer of reconsideration by examiner before appeal (zenchi) |
Free format text: JAPANESE INTERMEDIATE CODE: A911 Effective date: 20051215 |
|
| A912 | Removal of reconsideration by examiner before appeal (zenchi) |
Free format text: JAPANESE INTERMEDIATE CODE: A912 Effective date: 20060120 |
|
| A521 | Written amendment |
Free format text: JAPANESE INTERMEDIATE CODE: A523 Effective date: 20080326 |
|
| A01 | Written decision to grant a patent or to grant a registration (utility model) |
Free format text: JAPANESE INTERMEDIATE CODE: A01 |
|
| A61 | First payment of annual fees (during grant procedure) |
Effective date: 20080513 Free format text: JAPANESE INTERMEDIATE CODE: A61 |
|
| FPAY | Renewal fee payment (prs date is renewal date of database) |
Free format text: PAYMENT UNTIL: 20110523 Year of fee payment: 3 |
|
| FPAY | Renewal fee payment (prs date is renewal date of database) |
Free format text: PAYMENT UNTIL: 20110523 Year of fee payment: 3 |
|
| FPAY | Renewal fee payment (prs date is renewal date of database) |
Free format text: PAYMENT UNTIL: 20120523 Year of fee payment: 4 |
|
| FPAY | Renewal fee payment (prs date is renewal date of database) |
Year of fee payment: 4 Free format text: PAYMENT UNTIL: 20120523 |
|
| FPAY | Renewal fee payment (prs date is renewal date of database) |
Year of fee payment: 5 Free format text: PAYMENT UNTIL: 20130523 |
|
| FPAY | Renewal fee payment (prs date is renewal date of database) |
Year of fee payment: 5 Free format text: PAYMENT UNTIL: 20130523 |