JPH0638168A - Magnetic recording and reproducing device - Google Patents

Abstract

PURPOSE:To obtain a special reproduction picture in which the content of a picture is discriminated by using all at a of a block including DCT transformation coefficients of a decoded DC component for DCT transformation coefficients of a DC component. CONSTITUTION:The transformation coefficients of a DC component are converted into a group of data string of L' coefficients by a DC component coding processing circuit 10 to apply independent differential coding to the coefficients, then the number of transformation coefficients unable to be decoded when a magnetic head reproduced a signal while crossing a recording tracks becomes L' or below. Moreover, by recording the coded sequence in a cyclically distributed manner sequentially for N-sets of segments and n-recording channels, the sequence is recorded to each track according to number nXN. With this arrangement, when the signal is reproduced at a tape speed different from that at recording, since the transformation coefficients of the DC component are obtained from the entire pattern from the upper to the lower part by one scanning of the magnetic head, even when there is any data string unable to be detected by the scanning of the head for n-times, the string is interpolated by using the transformation coefficients of the DC component adjacent to above/under the string.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a magnetic recording / reproducing apparatus for sampling and quantizing an image signal in the time axis direction to convert it into a digital signal, and compressing and recording the image data amount of the digital signal. The present invention relates to a recording method for obtaining a good reproduced image when running at a tape speed different from the time.

[0002]

2. Description of the Related Art In a device for converting an image signal into a digital signal and transmitting it, the number of quantization bits per sample is usually required to be 7 to 8 bits in the case of linear quantization. If the image signal is directly digitized by this linear quantization, the transmission rate of the digital signal is
Standard TV system (sampling frequency, luminance signal: 13.5
MHz color difference signals (Cr, Cb): 6.75MHz) 150Mbp
s or more is required. In a device for magnetically recording this image signal as a digital signal (hereinafter referred to as a digital VTR), since the transmission rate is extremely high as described above, the recording density of the tape is substantially lower than that of the conventional analog VTR. As a result, a sufficient recording time cannot be obtained, the signal to be handled becomes a very wide band, and the operation speed of the digital signal processing circuit becomes a problem, which is technically difficult. This digital VTR is widely used for home use. It is a big obstacle to let.

In order to improve such problems, so-called high-efficiency coding has been studied conventionally, and as a means for reducing the image data amount of one field or one frame to a predetermined data amount, for example, a special method is used. Kaihei 3-229
There is a method described in Japanese Patent No. 571. In this method, one digital image is divided into a plurality of blocks each consisting of n × n pixels, discrete cosine transform (hereinafter referred to as DCT) is performed for each block, and n × is obtained. Quantization is performed by dividing each threshold value of a quantization matrix composed of n × n threshold values by n transform coefficients. Then, the transform coefficient F (u, v) after DCT or after quantization
A conversion coefficient F (u, v) that sets a specific variable k for (u, v = 0,1,2, ..., n-1) and satisfies the condition "k≤u + v"
After the value of is set to zero, the conversion coefficient F (u, v) is converted from the direct current component to the high frequency component into a one-dimensional sequence in a fixed order,
Data compression is performed by encoding the number of consecutive zeros in this converted number sequence. At this time, the cumulative distribution of the sum of squares of the AC components of the DCT coefficients is obtained for each block, a function that is proportionally converted to the desired compressed data amount is determined from this cumulative distribution, and the cumulative value of this function and the actual compressed data amount is determined. And are compared for each block, and the value of the variable k is adjusted for each block so that the accumulated value follows the above function.

According to this method, one digital image data can be compressed into a desired data amount,
It is possible to record the image data of one field on a digital VTR by recording it on a predetermined number of tracks.

[0005]

In the above-mentioned prior art, only the method of compressing the image data amount is specified, and the recording method to the digital VTR is not specified. Therefore, when the above-mentioned conventional technique is applied to a digital VTR, the image data compressed by the algorithm described in the above-mentioned conventional technique is recorded as it is.

In the above algorithm, the difference between the DC component conversion coefficient after the DCT and the DC component conversion coefficient quantized in the immediately preceding block is coded and output in block units together with the AC component. Will be recorded. Therefore, when playing back at a tape speed different from that at the time of recording and playing back across a recording track, the block immediately after the crossing cannot maintain continuity with the preceding block, and thus the DC component of the differentially encoded DC component is not maintained. The transform coefficients are not decoded, making it impossible to construct a reconstructed image over several blocks.

Further, for example, the number of scans of the magnetic head N times is 1
As in N-speed reproduction in a so-called N-segment recording method for recording image data of a field, there is a block which is fixed depending on the tape speed and is not reproduced at all, and one reproduced image is constructed. There is a problem that it can not be done.

In view of the above-mentioned conventional technique, an object of the present invention is to reproduce one image even when the data recorded by compressing an image of one field into a predetermined data amount is reproduced at a tape speed different from that at the time of recording. It is to provide a magnetic recording / reproducing apparatus capable of constructing a.

[0009]

In order to achieve the above object, the present invention divides one field or one frame of digital image data into a plurality of blocks each consisting of k × k pixels, and for each block. The discrete cosine transform is performed on k, and the k × k transform coefficients obtained by the transform are
Quantization is performed by dividing each of the threshold values of a quantization matrix composed of predetermined k × k threshold values. And each K'x
The conversion coefficient of the quantized DC component for one field or one frame composed of L's is L continuous in the horizontal direction.
Every ′ number is converted into a one-dimensional data string, and the difference between this one-dimensional data string and the preceding conversion coefficient is encoded independently. The encoded data sequence is sequentially and cyclically distributed to the number of segments N in units of the data sequence, and is also cyclically distributed and recorded to the number of recording channels n.

Then, when reproducing at a tape speed different from that at the time of recording, one image is constructed only from the conversion coefficient of the DC component distributed and recorded in each segment and each track.

[0011]

In the above means, the image data of each block is converted into the component decomposed into the spatial frequency by the discrete cosine transform and the quantization process, and u → of the transform coefficients F (u, v)
The conversion coefficient F (u, v) at which the value of the high frequency component that becomes large, v → large becomes zero increases. Of these, F (0,0) is a conversion coefficient of the DC component, which is data corresponding to the average value of k × k image data forming each block, and all k × k in the block including the data. Even when the data of (1) is replaced with the data, that is, the conversion coefficient of the DC component, to construct one image, it is possible to obtain the image quality capable of determining the image content. By converting the conversion coefficient of the DC component into a data string for each L ′ and independently performing differential encoding, the number of conversion coefficients that cannot be decoded when the magnetic head reproduces across the recording track is L ′ or less. . Also, by sequentially and cyclically recording the coded sequence into the segment number N and the recording channel number n, respectively,
A number sequence is recorded on each track every n × N.

As a result, when reproducing at a tape speed different from that at the time of recording, the conversion coefficient of the DC component of the entire screen can be obtained from the upper part of the screen to the lower part by one scan of the magnetic head. Even if there is a data string that could not be obtained, that is, there is a DC component conversion coefficient, it is possible to interpolate from the vertically adjacent DC component conversion coefficients, and construct one image from the detected DC component conversion coefficients. Is possible.

[0013]

Embodiments of the present invention will now be described in detail with reference to the drawings. FIG. 1 is a block diagram showing an embodiment of an encoding circuit when the present invention is applied to a magnetic recording / reproducing apparatus such as a VTR, and FIG. 2 is a configuration of a magnetic recording / reproducing apparatus such as a VTR to which the present invention is applied. 3 is a block diagram showing an example of a decoding circuit when the present invention is applied to a VTR, and FIG. 4 shows an example of the DC component encoding processing circuit of FIG. 5 is a block diagram, FIG. 5 is a block diagram showing an embodiment of the DC component decoding processing circuit and the image configuration processing circuit of FIG. 3, and FIG. 6 is a luminance for explaining the operation of the quantization circuit of FIG. 7 is a table showing the quantization matrix of the signal, FIG. 7 is a table showing the quantization matrix of the color difference signal for explaining the operation of the quantization circuit of FIG. 1, and FIG. 8 is a description of the operation of the zigzag scan processing circuit of FIG. Shows a table of zigzag scans for 9 is a table showing the positions of DC component data on the screen for explaining the operations of the DC component encoding processing circuit of FIG. 1 and the DC component decoding processing circuit of FIG. 3, and FIG. FIG. 11 is a track pattern diagram showing the recording position of each data string group composed of DC component conversion coefficients by the VTR, FIG. 11 is a track pattern diagram showing the recording position of DC component data by the VTR to which the present invention is applied, and FIG. It is a waveform diagram which shows the reproduction envelope signal at the time of reproduction.

In FIG. 2, the image signal supplied through the terminal 250 is converted into a digital signal by the A / D conversion circuit 45 with the quantization bit number M bits. This digital signal is appropriately data-compressed as described later by signal processing in the encoding circuit 46 according to the present invention. The output A of the encoding circuit 46 (hereinafter abbreviated as data A) is sent to the memory 4 via the digital processor 48.
Sequentially written to 7. When writing to the memory 47, an address code indicating the address thereof, a so-called parity code for code correction, and the like are added as needed for each block of a predetermined number of bits of the data A and sequentially written to the memory 47. Be done.

After the writing to the memory 47 is completed, the data A, the address code and the parity code that are read out successively are read by the digital processor 48 as a sync signal for finding the beginning of a block and, if necessary, a code. An error detection code for error detection is added and output.

The output data string B from the digital processor 48 is modulated into a code suitable for magnetic recording by a modulation circuit 49, and its output is successively recorded on a magnetic tape 52 by a magnetic head 51 via a recording amplification circuit 50. Will be recorded. At this time, the present embodiment shows a case where two rotary magnetic heads 51 of the helical scan system record two fields on a magnetic tape at substantially the same time and one field is sequentially recorded by two scans. Result As shown in FIG. 11, one field is composed of four tracks. Next, in the reproducing system, from the magnetic tape 52 to the magnetic head 51.
The signal reproduced by is reproduced and equalized by the reproduction equalizer 53 as appropriate, and then demodulated by the demodulation circuit 54, and a signal B ′ similar to the data string B input to the modulation circuit 49 is output. Output data string B'from the demodulation circuit 54
The data is sequentially written in the memory 47 after being subjected to data cueing for each block by the digital processor 48 based on the synchronization code and code error detection based on the error detection code. The data written in the memory 47 is sequentially code-corrected by the digital processor 48 based on the parity code, the redundant code is sequentially removed, and the data A ′ similar to the output data A from the encoding circuit 46 is obtained. Is output and supplied to the decoding circuit 55.

The M-bit digital signal decoded by the decoding circuit 55 is converted into an analog signal by the D / A conversion circuit 56 to restore the original image signal and output to the terminal 230.

Next, the operation of the encoding circuit 46 according to the present invention will be described with reference to the embodiment shown in FIG. 1 by using the DC component encoding circuit of FIG. 4 and the tables of FIGS. 6, 7, 8 and 9. In FIG. 1, an image signal converted into a digital signal having a bit number M by an A / D conversion circuit 45 is supplied to a terminal 100, and a discrete cosine transform processing circuit (hereinafter abbreviated as a DCT processing circuit) via a memory 2. Input to 3. In this embodiment, DC
In the T processing circuit 3, for each image data of one field of the input image signal, one block 8 × in the horizontal and vertical directions.
Divide into a plurality of K ′ × L ′ blocks of 8 pixels,
The case where two-dimensional DCT is performed for each block is shown. Therefore, in the present embodiment, the memory 2 has, for example, two memories each having a capacity corresponding to an image signal of at least eight horizontal scanning lines (hereinafter referred to as lines), and the memory control circuit 6 allows each memory to have a surface unit (8 line units). ) Are alternately read from and written to the memory, and 8 samples are read out per line, and are supplied to the DCT processing circuit 3 in units of 8 × 8 samples which form one block.

The DCT is a kind of orthogonal transform in the frequency domain, and the input image data is f (i, j) (i = 0, ..., 7, j = 0, ...,
7), the DCT transform coefficient is F (u, v) (u = 0, to, 7, v = 0,
~, 7)

[0020]

[Equation 1]

Is defined by DCT obtained by this
The transform coefficient F (u, v) represents each component obtained by decomposing one block of input image data into spatial frequencies.

In the DCT transform coefficient F (u, v), the coefficient F
(0,0) indicates a value (DC component, hereinafter referred to as DC component) proportional to the average value of 8 × 8 pixels of the input image data f (i, j),
A component having a higher spatial frequency (AC component, hereinafter referred to as AC component) is represented as u and v increase. In addition, since the image data is usually concentrated in low frequencies, the DC
The high frequency component of the T conversion coefficient F (u, v) has a low value.

The output D from the DCT processing circuit 3
The CT transform coefficient F (u, v) is supplied to the quantization circuit 4 and quantized. The quantization circuit 4 quantizes the DCT transform coefficient F (u, v) for each block by dividing the DCT transform coefficient F (u, v) by each threshold value of the quantization matrix composed of 8 × 8 threshold values shown in FIGS. 6 and 7, for example. Here, FIG. 6 shows a quantization matrix for a luminance signal, and FIG. 7 shows a quantization matrix for a color difference signal. This quantization matrix has a large threshold value for dividing the DCT transform coefficient F (u, v) of the high frequency component in which u, v increases. Therefore, in the output from the quantization circuit 4, that is, in the divided and quantized DCT transform coefficient, most high frequency component values are zero. The divided and quantized DCT transform coefficient is then subjected to zigzag scan processing by the zigzag scan processing circuit 3.

The zigzag scan processing circuit 5 converts the conversion coefficient for each block into a one-dimensional sequence in the order of the numbers shown in the zigzag scan table of FIG. 8 and outputs it.
The order of the numbers shown in the zigzag scan table of FIG. 8 is configured such that the DC components of the transform coefficients of the respective blocks are sequentially arranged to have higher frequency components. The image data for one field from the zigzag scanning circuit 5 is sequentially written in the memory 7. Here, the present embodiment shows the case where an image of one field is recorded by two scans of the rotary magnetic head 51, that is, the image of one field is divided into two segments and recorded, and therefore the memory is used. From 7 onward, a block group continuous in the horizontal direction on the screen is used as a unit, and one segment is read every other block group from the screen upper part to the screen lower part. Further, in this embodiment, the DCT transform coefficients of all the DC components of each block constituting the block group are first read continuously, and subsequently the DCT transform coefficients of the AC component are read. . The DCT transform coefficient read from the memory 7 is supplied to the data selector circuit 8 and the control signal from the controller 11 reads the DC component DCT transform coefficient to the I side during the period when the AC component DCT transform coefficient is read. The period is selectively output to the II side. The DCT transform coefficient of the AC component selectively output to the I side is, for example, run length coding (zero run length coding process) and Huffman coding for compressing the number of consecutive zero data in the AC component coding processing circuit 9. Is performed. As a result, the DCT transform coefficient of the AC component is two-dimensionally Huffman-encoded by the run-length encoded number data of continuous zero data and the bit number data of the effective coefficient. Huffman coding does not use the quantized coefficient value itself, but Huffman codes the number of bits required to represent the value. Then, in addition to the Huffman code, the value of the number of bits is added as additional information. For example, if the quantized transform coefficient value is 3 (decimal number), the binary number is 000
It is expressed as 0 …… 011, but the number of bits 2 required to express this is Huffman-coded and 2-bit data 11
Is added as an additional bit. The data encoded by the AC component encoding processing circuit 9 is the data selector 1
2 is supplied to the I side.

Further, D of the DC component selectively output to the II side
The CT transform coefficient is subjected to differential encoding processing in the DC component encoding processing circuit 10 shown in FIG. 4, for example.

In FIG. 4, D from the data selector 8
The DCT transform coefficient of the C component is supplied via the terminal 150,
The subtraction circuit 20 calculates the difference from the data corresponding to the DCT transform coefficient of the DC component of the immediately preceding block from the delay circuit 25, and supplies the difference to the bit number compression circuit 21. The bit number compression circuit 21 encodes the difference calculation result from the subtraction circuit 20 with a bit number M ′ smaller than M. The data compressed to the bit number M ′ by the bit number compression circuit 21 is
It is supplied to the II side of the data selector circuit 26 and is also supplied to the bit number expansion circuit 22. Bit number expansion circuit 2
2, the difference data compressed to the number of bits M ′ is expanded to the same number of bits as the number of bits of the data supplied to the bit number compression circuit 21, and the subtraction circuit 2
Data corresponding to the difference data from 0 is output. The output data from the bit number decompression circuit 22 is subjected to an addition operation with the data corresponding to the DCT conversion coefficient of the DC component of the immediately preceding block from the delay circuit 25 in the adding circuit 23, and the data selector 24 outputs the data. It is supplied to the II side. Here, in the DC component encoding process in the present embodiment, the differential encoding process is performed independently for each of the L ′ DC component data strings of each block that is continuous in the horizontal direction on the screen.
For example, as shown in FIG. 9, a screen of one field is displayed vertically K ′.
And L'horizontal blocks, and the DC component data of each block is DC1,1 DC1,2 ... DC1, L 'DC2,
1 DC2,2… DC2, L ′… DCK ′, L ′. And
Horizontal DC1,1 DC1,2 ... DC1, L 'is the first data string,
DC2,1 DC2,2… DC2, L ′ is the second data string, DCK′-1,1
DCK'-1,2 ... DCK'-1, L 'is the K'-1th data string, DC
K ', 1 DCK', 2 ... DCK ', L' is the K'th data string,
First data string, third data string, ... K'-1 data string is data segment of the first segment, second data string, fourth data string, ... K'data string is data of the second segment Make a column. Then, each data string is subjected to differential encoding processing independently, that is, the first data of each data string, DC1,1 DC2,1 ... DCK ', 1 is coded as it is as data of the number of bits M, Followed by L'-1
This data is configured so that the difference from the previous data is encoded with a bit number M ′ that is smaller than the bit number M. Further, in this embodiment, from the terminal 150, the DCT transform coefficient of the DC component of each block constituting the block group in units of the block group continuous in the horizontal direction on the screen is set to DC1 as the first segment. , 1 DC1,2… DC1, L´
DC3,1 DC3,2… DC3, L´ …… DCK´-1,1 DCK´-1,2
… DCK´-1, L´, as the second segment DC2,1 DC2,2
… DC2, L´ DC4,1 DC4,2… DC4, L´ …… DCK´, 1 D
CK´, 2… DCK´, L are supplied in this order. Therefore, the data selectors 24 and 26 are the first data DC of each data string.
1,1 DC3,1 …… DCK´-1,1 DC2,1 DC4,1 …… DCK
The I side is selectively output only during the period when ′, 1 is supplied through the terminal 150, and the II side is selectively output during the period when other data is supplied. Then, the selected output from the data selector 24 is delayed by the delay circuit 25 for a period corresponding to one data, and then supplied to the subtraction circuit 20 and the addition circuit 23. The selection output from the data selector 26 is supplied to the II side of the data selector 12 of FIG. 1 via the terminal 160.

In the data selector 12, as in the case of the data selector 8, the I side is set to DC during the period in which the data of the AC component is supplied by the control signal from the controller 11.
The II side is selected and output during the period when the component data is supplied,
It is supplied to the latch circuits 13 and 14. Latch circuit 13,
In 14, the coded data from the clock generation circuit 15 is latched by the clocks having the same frequency but 180 degrees out of phase with each other. As a result, the coded data selected and output by the data selector 12 is divided into two channels, and the divided data is output via the terminals 110 and 120. Is output and written as data A in the memory 47 via the digital processor 48 shown in FIG.

The image data compressed and written in the memory 47 is stored in the digital processor 4 as described above.
The data is sequentially read via 8, the sync signal and the error detection code are added, and the data B is output from the digital processor 48.

This data B is recorded on the magnetic tape 52 by the magnetic head 51 via the modulation circuit 49 and the recording / amplifying circuit 50. As a result, as shown in FIG. 10A, the first data string, the third data string, the fifth data string, ... Of the first segment are recorded on the tape over two tracks from the head scanning start position. Then, in the next two tracks, the second data string, the fourth data string, the sixth data string of the second segment,
……… is recorded. Further, as shown in FIG. 11, the data of the DC component is recorded in the hatched area under the track, and the data of the AC component is recorded in the area subsequent thereto.

Next, an embodiment of the decoding circuit 55 according to the present invention will be described with reference to FIG. During reproduction, the data recorded as described above is transferred from the magnetic tape 52 to the magnetic head 5.
1, the reproduction equalizer 53 and the demodulation circuit 5 are reproduced.
The data output B ', which is similar to the data output B described above, is obtained from the demodulation circuit 54 by being appropriately reproduced and demodulated at 4.

This data output B'is successively written into the memory 47 via the digital processor 48. From the digital processor 48, the encoding circuit 4
Output data A ′ similar to the output data A from 6 is supplied to the terminals 250 and 260 of the decoding circuit 55 shown in FIG.

In FIG. 3, the output signal A'from the digital processor 48 input from the terminals 250 and 260 is supplied to the latch circuits 60 and 61, and the two channels are adjusted in timing so that their phases are different from each other by 180 degrees. The data is converted by the 1-channel conversion processing circuit 59 into the same 1-channel signal as the output signal from the data selector circuit 12 of FIG. 1 and then supplied to the data selector circuit 62. Then, in the data selector circuit 62, D at the start of head scanning
The C component data is output to the II side while the AC component data is output, and the AC component data is output to the I side while the AC component decoding processing circuit 63 and the DC component decoding processing circuit 64 are selected.
Is supplied to each. The AC component decoding processing circuit 63 performs Huffman decoding and zero run length decoding corresponding to the Huffman coding processing and the zero run length coding in the AC component coding processing circuit 9. Also, DC
The component decoding processing circuit 64 performs the differential decoding processing shown in FIG.

In FIG. 5, the data of the DC component supplied through the terminal 200 is input to the II side of each of the bit number expansion circuit 30 and the data selector circuits 33 and 34. In the bit number expansion circuit 30, the DC component data, which has been compressed through the number of bits and supplied through the terminal 200, is converted into data having the same number of bits as the number of bits of the differential data input to the bit number compression circuit 21 of FIG. Then, difference data corresponding to the difference data input to the bit number compression circuit 21 is output. The difference data whose bit number has been expanded from the bit number expanding circuit 30 is supplied to the adder circuit 31, and the delay circuit 3
Addition is performed with the data corresponding to the DCT transform coefficient of the DC component of the block preceding by one from 2. The addition output from the addition circuit 31 is data corresponding to the DCT conversion coefficient of the DC component, and is supplied to the I side of each of the data selector circuits 33 and 34. Here, the data strings of the DC components supplied via the terminal 200 are independent of each other, and the data strings of the L ′ DC component continuous in the horizontal direction on the screen as shown in FIG. The first data is encoded as it is with the number of bits M. Therefore, the data selector 3
In Nos. 3 and 34, the II side is controlled to selectively output only during the period in which the data of the first DC component of each data string having the bit number M which is not bit number compressed is supplied. Then, the data selected and output by the data selector circuit 33 is delayed by the delay circuit 32 for a period corresponding to one sample of data, and the data of the DC component one block before is added by the adder circuit 3.
1 is supplied. The data selected and output by the data selector circuit 34 is supplied to the memory 65 via the terminal 220 and also to the image configuration processing circuit 69.

This AC component decoding processing circuit 63 and DC
The output signal from the component decoding processing circuit 64 is supplied to the memory 65, and after the data corresponding to the DCT transform coefficient for at least 8 lines is written in the memory 65, the transform coefficient in the same block changes from the low frequency component to the high frequency component. The components are sequentially read out for each block and supplied to the zigzag scan decoding processing circuit 66.

In the zigzag scan decoding processing circuit 66, the conversion coefficients supplied in the one-dimensional numerical sequence in the order of the numbers shown in the zigzag scanning table of FIG. 8 are converted into the order of the conversion coefficients supplied to the zigzag scanning processing circuit 5. Rearrange, that is, construct a two-dimensional block composed of 8 × 8 transform coefficients. Then, the inverse quantization circuit 67 outputs 1
For each conversion coefficient of the block, for example, 8 × 8 shown in FIGS.
Inverse quantization processing is performed by multiplying each threshold of a quantization matrix composed of individual thresholds, and further, inverse discrete cosine transform processing circuit (IDCT) 68 performs inverse discrete cosine transform defined by the following equation.

[0036]

[Equation 2]

This inverse discrete cosine transform processing circuit (IDC
T) 68 causes each block to be written to the memory 70. Then, the image data corresponding to the original image data that is sequentially read from the memory 70 from the first line and supplied through the terminal 100 of FIG. 1 is restored, and is supplied to the II side of the data selector 71, and during normal reproduction. It is output as it is via the terminal 270.

On the other hand, during so-called special reproduction in which the tape speed is different from that during recording, the data selector circuit 7
The image signal from the image configuration processing circuit 69 supplied to the I side of 1 is selectively output and output via the terminal 270. For example, when the tape speed in the head scanning direction indicated by the dotted line arrow on the track pattern diagram of FIG. 11 is triple the positive speed, the envelope waveform of the reproduction signal is as shown in FIG. 11 and 12, the hatched area is D
The area in which the data of the C component is recorded is shown. When all the data is not reproduced in this way, the hatched D
An image signal is constructed only from the data of the C component.

That is, the DCT transform coefficient of the DC component decoded by the DC component decoding circuit 64 is supplied to the memory 35 and the memory control circuit 38 of the image configuration processing circuit 69 configured in the lower part of FIG. The memory 35 has a capacity of at least 1/64 field or more.
After the DCT conversion coefficient of the DC component for the field is written, 1 /
An image signal of one field is formed by reading out with the clock of frequency 8 and reading the same line continuously eight times. The image signal read from the memory 35 is supplied to the I side of the data selector circuit 40, the adder circuit 36, and the line memory 39. At this time, in this embodiment, since the image signal is divided into two segments and recorded, only the track of one segment is always reproduced when the tape speed is 2 × m times (m is an arbitrary integer). It Therefore, the output signal from the memory 35 is added by the adder circuit 36 to the signal delayed by the line memory 39 for a period corresponding to one line, and then the divider circuit 37.
And is supplied to the II side of the data selector 40. Then, depending on the tape speed, that is, during the period in which a line that is not reproduced is output, the II side is selected and the other side is selected and output to the I side of the data selector 71 via the terminal 210, and is selectively output during special reproduction. And output via the terminal 270.

The above embodiment shows the case where the present invention is applied to a VTR in which two segments are divided and two channels are recorded.
It goes without saying that the present invention is not limited to this, and can be applied to all cases of arbitrary segment division and arbitrary channel recording VTR.

In the above embodiment, the case where only the differential coding processing is performed as the DC component coding processing circuit 10 has been described, but the present invention is not limited to this, and Huffman is applied to the data subjected to the differential coding processing. The present invention can be applied to the case of encoding processing and does not deviate from the gist of the present invention.

In the above embodiments, the case where the discrete cosine transform process is applied as the orthogonal transform process has been described, but the present invention is not limited to this, and when other orthogonal transform processes such as Hadamard transform process are used. Needless to say, the present invention is also applicable.

In the above embodiment, the case where the data string of the DCT transform coefficient of the DC component continuous in the horizontal direction on the screen is differentially encoded has been described, but the present invention is not limited to this, and it is continuous in the vertical direction. Even when the data string of the DCT transform coefficient of the DC component is differentially encoded, as shown in FIG. 9C, DC1,1
DC2,1 ...... DCk ', 1 is the first data string, DC1, L' DC
2, L '... DCk', L 'as the L'th data string, DC1,1
The present invention can be applied by encoding DC1, L'with the bit number M as it is and encoding other data with the bit number M '(M'<M).

In the above embodiment, the case where the input image of one field is divided into a plurality of blocks of 8 × 8 pixels has been described, but the present invention is not limited to this, and n × m pixels (n, m) are used. Needless to say, the present invention can be applied to the case of dividing into a plurality of blocks each of which is an arbitrary integer.

Further, in the above embodiment, as shown in FIG. 10A, a DC component data string is distributed to each segment, and DC data of the same data string is distributed to two channels (two tracks) and recorded. Although the case has been described, the present invention is not limited to this, and as shown in FIG. 10B, a DC component data string is distributed to each segment, and the distributed DC component data string is recorded in one channel (track). The present invention can also be applied to the case where the DC component data sequence is sequentially cyclically distributed and recorded in the channel (track) of each segment as shown in FIG.

In the above embodiments, the case where the DC component data is recorded at the head scanning start position has been described, but the present invention is not limited to this, and the track center portion or the head scanning end position, and further, any track position. It is also applicable when recording at the position. Furthermore, when each data string obtained by encoding the DCT transform coefficient of the DC component is sequentially cyclically distributed and recorded in each segment, each D distributed to each track is recorded.
The present invention can also be applied to a case where a coded AC data group is inserted and recorded between DC data strings without continuously recording C data strings.

[0047]

As described above, according to the present invention, the DCT transform coefficients of the DC components which are continuous in the horizontal direction on the screen are differentially encoded into one independent data string. Then, by sequentially cyclically distributing and recording the data string into each segment, it becomes possible to extract and decode the DC component data during special reproduction, and the DC of the decoded DC component can be extracted.
By making the data of all the blocks including the T conversion coefficient the DCT conversion coefficient of the DC component, it is possible to obtain a special reproduction image whose image content can be discriminated. Further, even when the head always scans the track of the same segment depending on the tape speed, the DCT conversion coefficients of the DC components of the blocks above and below the DCT conversion coefficient of the DC component that is not reproduced are reproduced, so that the DCT conversion coefficients of the DC component of the block that is not reproduced are interpolated. There is an effect that a reproduced image can be obtained.

[Brief description of drawings]

FIG. 1 is a block diagram showing an embodiment of an encoding circuit when the present invention is applied to a VTR.

FIG. 2 is a block diagram showing a configuration example of a VTR to which the present invention is applied.

FIG. 3 is a block diagram showing an embodiment of a decoding circuit when the present invention is applied to a VTR.

FIG. 4 is a block diagram showing an embodiment of the DC component encoding processing circuit of FIG.

5 is a block diagram showing an embodiment of a DC component decoding processing circuit and an image configuration processing circuit of FIG.

FIG. 6 is a diagram showing a luminance signal quantization matrix for explaining the operation of the quantization circuit of FIG. 1;

FIG. 7 is a diagram showing a quantization matrix of color difference signals for explaining the operation of the quantization circuit of FIG.

8 is a diagram showing a zigzag scan table for explaining the operation of the zigzag scan circuit of FIG. 1. FIG.

9 is a diagram showing the position of DC component data on the screen for explaining the operation of the DC component encoding / decoding processing circuit shown in FIGS. 1 and 3; FIG.

FIG. 10 is a track pattern diagram showing the recording position of each data string group composed of DC components by a VTR to which the present invention is applied.

FIG. 11 is a track pattern diagram showing recording positions of DC component data by a VTR to which the present invention is applied.

FIG. 12 is a waveform diagram showing a reproduction envelope signal during 3 × speed reproduction.

[Explanation of symbols]

 3 ... Discrete cosine transform processing circuit, 4 ... Quantization circuit, 5 ... Zigzag scan processing circuit, 7, 35, 65, 70 ... Memory, 9 ... AC component coding processing circuit, 10 ... DC component coding processing circuit, 63 ... AC component decoding processing circuit, 64 ... DC component decoding processing circuit, 66 ... Zigzag scan decoding processing circuit, 67 ... Inverse quantization circuit, 68 ... Inverse discrete cosine transform processing circuit, 69 ... Image configuration processing circuit.

Claims (9)

[Claims] 1. An image signal is sampled and quantized and converted into a digital signal, and the digital signal is multiplied by n (n is 1).
The time axis is extended to n channels and divided into n channels, and n fields of the helical scan method are used for n tracks on the magnetic tape at substantially the same time and one field is sequentially performed N times (N is 1). In the magnetic recording / reproducing apparatus of the digital recording system in which one field is divided into N segments and the segments are divided and recorded in n different tracks by recording by the scanning of the above integers, the signals are converted into digital signals. 1 field of image data, a plurality of blocks of K × L pixels (K and L are arbitrary integers) K ′ × L ′ (K ′ and L ′ are arbitrary integers)
Means for performing an orthogonal transform process for each block, and a transform coefficient obtained by the transform process is divided by each threshold value of a quantization matrix composed of predetermined K × L threshold values for quantization. Means for generating a DC component data group consisting of a predetermined number of DC component conversion coefficients of each block for one field obtained by the quantizing means, and DC component data generated by the generating means. And a means for recording a group at a predetermined position on each track and a means for constructing an image signal only from the reproduced DC component data group when reproducing at a tape speed different from that at the time of recording. Characteristic magnetic recording / reproducing device. 2. The means for generating the data group of the DC component is one field for each conversion coefficient of the DC component of L'blocks which are continuous in the lateral direction among the blocks obtained by dividing the image data of 1 field. Means for dividing the conversion coefficient of the DC component of each of the blocks into K ′ pieces, means for converting the conversion coefficient of the DC component into K ′ pieces into a one-dimensional data string, and the converted K ??? The above-mentioned one-dimensional data strings are each independently provided with a means for performing a difference encoding process for encoding a difference from the conversion coefficient of the preceding DC component, and the difference-encoded data sequences are substantially n. 2. The magnetic recording / reproducing apparatus according to claim 1, wherein the magnetic recording / reproducing apparatus is composed of a unit for dividing the data string group into N data strings. 3. The means for generating the data group of the DC component is one field for each conversion coefficient of the DC component of K'blocks which are continuous in the vertical direction among the blocks obtained by dividing the image data of 1 field. Means for dividing the conversion coefficient of the DC component of each of the blocks into L'pieces, means for converting the conversion coefficient of the DC component into L'pieces into a one-dimensional data string, and the converted L ??? The above-mentioned one-dimensional data strings are each independently provided with a means for performing a difference encoding process for encoding a difference from the conversion coefficient of the preceding DC component, and the difference-encoded data sequences are substantially n. 2. The magnetic recording / reproducing apparatus according to claim 1, wherein the magnetic recording / reproducing apparatus is composed of a unit for dividing the data string group into N data strings. 4. The difference encoded data string is omitted.
means for dividing the data string into n × N data string groups, means for sequentially cyclically distributing the data string that has been subjected to the differential encoding for one field to the number N of segments in units of the data string; And a means for sequentially and cyclically distributing the above-mentioned data string distributed into individual pieces to the number n of tracks forming each segment in units of a predetermined number of bits forming the data string. The magnetic recording / reproducing apparatus according to claim 1, 2 or 3. 5. The differential encoded data string is omitted.
means for dividing the data string into n × N data string groups, means for sequentially cyclically distributing the data string that has been subjected to the differential encoding for one field to the number N of segments in units of the data string; 4. A means for sequentially and cyclically distributing the number sequence divided into individual pieces to the number n of tracks forming each segment in units of a data row. The magnetic recording / reproducing apparatus described. 6. The difference encoded data string is omitted.
The means for dividing into n × N data string groups is to sequentially cyclically divide the data string, which has been subjected to differential encoding for one field, into n × N tracks, which constitute one field, with the data string as a unit. The magnetic recording / reproducing apparatus according to claim 1, 2 or 3, wherein the magnetic recording / reproducing apparatus comprises a distributing means. 7. The means for constructing an image signal only from the data group of the DC component is not detected by means of differential decoding processing for each reproduced data string and scanning of the rotary magnetic head a predetermined number of times. A means for interpolating the conversion coefficient of the DC component of the data string by means of the differentially decoded conversion coefficient adjacent to the conversion coefficient; and the differentially decoded conversion coefficient or the block K containing the interpolated conversion coefficient. 7. The magnetic recording / reproducing apparatus according to claim 1, wherein the magnetic recording / reproducing apparatus is configured by means for setting the level of all the pixels of L pixels to the level of the conversion coefficient. 8. The means for recording at a predetermined position on each track comprises means for controlling so as to record the data group of the DC component for a predetermined time from the start of scanning of the rotary magnetic head. 8. The method according to claim 1, wherein
The magnetic recording / reproducing apparatus according to the item. 9. The magnetic recording / reproducing apparatus according to claim 1, wherein the means for performing the orthogonal transform processing is constituted by means for performing the discrete cosine transform processing.