JPH0638086B2 - Current detection method and device - Google Patents

Description

Description: BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an inverter load current detection method and device, and more particularly to a current detection method and device capable of highly accurately detecting a low current region.

[Conventional technology]

In the conventional device, as described in Japanese Patent Publication No. 60-19236, the instantaneous value detection current is sequentially moved at a constant electrical angle and averaged. Further, in Japanese Patent Laid-Open No. 58-198165, the instantaneous value of the output current of the PWM converter is detected using the A / D converter when the carrier signal is near the maximum amplitude value.

[Problems to be Solved by the Invention]

The above-mentioned conventional technique (Japanese Patent Publication No. 60-19236) is effective for a pulsating component that repeats at a frequency that is six times the inverter frequency, but is not considered in a pulse width modulation control inverter having different pulsating components. Therefore, the pulsation component could not be removed and stable control was difficult. Moreover, JP-A-58-198165
In the publication, the current detection value of the fundamental wave component of the output current can be obtained without the influence of the pulsating component.
Since the / D converter is required, the circuit is complicated and expensive, and there is a problem in terms of economy. On the other hand, as a current detection method, inexpensive V
A method of converting to a digital value using a / F converter and a counter circuit can be considered, but due to the small pulse count value in the low current region and the small pulse count value in the high current region when the sampling cycle is fast, etc. There is a problem that current cannot be detected with high accuracy in a wide range.

An object of the present invention is to provide a current detection method and device capable of detecting a load current of a pulse width modulation control inverter with high accuracy even in a low current region by reducing the influence of a pulsating component due to pulse width modulation control.

[Means for Solving the Problems]

In order to achieve the above object, a load current of an inverter driven by pulse width modulation control is converted into a voltage signal, and the voltage signal is converted into a pulse train having a pulse number proportional to an absolute value of an instantaneous value of the voltage signal. Then, the pulse number of the pulse train is reversibly counted according to the positive and negative of the instantaneous value of the voltage signal to obtain a count value, and the count value is sampled at each sampling timing synchronized with the carrier signal of the pulse width modulation control. Find the amount of change in the count value,
The current detection method is characterized in that the detected value of the load current is obtained based on a value obtained by dividing the amount of change by the sampling time difference until the absolute value of the amount of change reaches or exceeds a predetermined value.

As a device for achieving this object, a current detector for converting a load current of an inverter driven by pulse width modulation control into a voltage signal, and a voltage detector for converting the converted voltage signal to an instantaneous value of the voltage signal. A voltage / frequency converter for converting into a pulse train having a pulse number proportional to an absolute value, a counter for inputting the pulse train to count the number of pulses reversibly according to the positive / negative of the instantaneous value of the voltage signal, and a central processing unit And the central processing unit samples the count value of the counter at a timing synchronized with the carrier signal of the pulse width modulation control, and calculates the difference between the sampled count value and the count value at the previous sampling. And a detection value of the load current is calculated based on a value obtained by dividing by the sampling time difference until the absolute value of the difference becomes a predetermined value or more. Than it was.

[Action]

With this configuration, the above-described object can be achieved according to the present invention by the following actions.

Since the pulse width modulation controlled inverter is turned on / off by the pulse width modulation pulse synchronized with the cycle of the carrier signal, the load current of the inverter includes a pulsating component due to the turning on / off of the pulse. Therefore, the pulse density of the pulse train obtained by frequency-converting the instantaneous value of the load current changes with the pulsation component reflected. As a result, the amount of change in the count value obtained by counting the number of pulses in this pulse train also changes according to the pulsating component. Therefore,
If the count value is sampled at an arbitrary timing and the amount of change in the count value is divided by the sampling time difference to obtain the load current, an instantaneous value including a pulsating component may be detected.

In this respect, according to the present invention, sampling is performed in synchronization with the timing of the carrier signal period, that is, the pulsation period of the pulsating component, and the amount of change in the count value between each sampling timing is divided by the sampling time difference to obtain the load current. Since it is obtained, the pulsation component is averaged. As a result, the instantaneous value of the load current excluding the pulsating component is detected.

On the other hand, when sampling is performed in synchronization with the cycle of the carrier signal, the cycle of the carrier signal is extremely short, so that the pulse density becomes small in the low current region near the zero cross, and the count value may not change. In this case, the current is detected to be zero between the sampling timings, but if the count value changes during the next sampling timing, for example, the load current suddenly flows between the sampling timings. . Since the load current is essentially continuous, the detected values between those sampling timings should be averaged.

In this respect, according to the present invention, sampling is performed a plurality of times until a change occurs, and when a change occurs, the sampling time difference until then is obtained, and the change amount is divided by the time difference to obtain the load current. , The detection value can be obtained.

〔Example〕

An embodiment according to the present invention will be described below with reference to FIGS. FIG. 2 is a block diagram showing the configuration of the speed control device for the induction motor. In FIG. 2, 1 is a DC power source, 2 is an inverter circuit, 3 is an induction motor, 4 is a pulse oscillator, 5 is a current detector, 6 is a digital controller using a microprocessor, and 7 is an AC current detector. A current detection circuit for converting into a digital value, 8 is a control circuit for an induction motor including a microprocessor, and 9 is a PWM generation circuit.

FIG. 1 is a block diagram of a current detection circuit 7 showing this embodiment. First, the configuration of FIG. 1 will be described. In FIG. 1, reference numeral 10 denotes 3φ / 2φ for converting the three-phase AC current of the current detector 5 into a two-phase AC current signal having two-axis coordinates orthogonal to the rotating magnetic field system.
A conversion circuit, 11 is an absolute value circuit for outputting the absolute value of the AC signal, 12 is a V / F converter, 13 is a positive / negative discrimination circuit for discriminating the positive / negative of the AC signal, and 14 is 9 for one pulse input.
A two-phase signal generation circuit that generates two-phase pulse signals having a 0 ° phase difference, 15 is a multi-input counter circuit that includes a reversible counter, a register, and the like, 16 is a clock generation circuit that serves as a reference clock of the multi-input counter circuit, and 17 Is the microprocessor data and address bus.

Next, the operation of FIG. 1 will be described with reference to FIGS. FIG. 3 and FIG. 4 show operation waveforms of each part. 3φ AC current waveform (voltage signal) eu, ev, ew is 3φ / 2
The φ converter circuit 10 converts 2α of eα and eβ. The absolute value circuit 11 calculates | eα | and | eβ from eα and eβ.
The waveform of | is created and input to the V / F converter 12. V /
The F converter 12 outputs pulse trains feα and feβ having frequencies proportional to the instantaneous values of the input signals | eα | and | eβ |. The positive / negative discriminating circuit 13 outputs signals Peα and Peβ that discriminate between positive and negative of eα and eβ. In the two-phase signal generation circuit 14, the pulse trains feα and feβ are divided into quarters, and the two-phase signal pulse trains Aφ and Bφ whose phases are shifted by 90 degrees are fed to feα and fe.
Output to β respectively.

Although FIG. 4 shows the operation for feα, the same applies to feβ. First, when Peα is "H (positive)", Aφ leads the phase of Bφ by 90 °.
When α is "L (negative)", Aφ is delayed by 90 ° with respect to Bφ. The pulse train of Aφ and Bφ is input to the multi-input counter circuit 15 in the next stage. The multi-input counter circuit 15 counts the pulse trains of Aφ and Bφ of feα and feβ, counts the clock 16, and stores the respective count values in the register.

Next, the multi-input counter circuit 15 will be described with reference to FIG. FIG. 5 is a block diagram of the multi-input counter circuit 15. In FIG. 5, 20 and 29 are fe, respectively.
A counter and register circuit for α and feβ.
Reference numeral 21 is a frequency multiplication circuit, 22 is a reversible counter for counting feα, 23 and 24 are registers, 25 is a counter for counting reference clocks, 26 and 27 are registers, 28 is a latch timing of the registers 23, 24 and 26, 27. It is a control circuit that controls.

Next, the operation of FIG. 5 will be described with reference to FIG. The pulses of the two-phase signals Aφ and Bφ of feα input to the frequency multiplication circuit 21 of FIG. 5 are Aφ and B as shown in FIG.
A rising / falling signal of φ is detected to form a pulse train having a frequency four times higher, and a pulse train having an output frequency of the V / F converter 12 is input to the reversible counter 22 in the next stage. At this time, the pulse train is input to the + side of the reversible counter when the phase of Aφ is ahead of the phase of Bφ, and is input to the-side when the phase is delayed, and the reversible counter counts increment and decrement, respectively.

Next, the operating principle of high precision current detection will be described with reference to FIGS. 6 and 7. FIG. 6 shows a case of a high current in which a multiplied pulse is input in the sampling period Tss, and FIG. 7 shows a case of a low current region in which no multiplied pulse is input.

Here, the sampling period Tss is determined in synchronization with the carrier signal for pulse width modulation control, as will be described later with reference to FIG.

In FIG. 6, the multiplied pulse signal is counted by the reversible counter 22 and its count value M (i-1), M is calculated for each pulse input.
(I) is stored in the register A23. On the other hand, the counter 25
Then, the reference clock is counted, and as a time count value, T (i-1), T is stored in the register A26 for each multiplied pulse input.
Store (i). Then, the sampling cycle Tss based on the sampling signal from the address bus shown in FIG.
In the case of S (i-1) and S (i), register A23,2
The contents of 6 are stored in the registers B24, 27 and then read out. The read current count value M (n) and time count value T (n), (where n = 1,2, ... i-1, i, i + 1)
Is a value updated every time the multiplied pulse signal is input, and is not affected by the sampling cycle Tss.

The current value I _M can be calculated with high accuracy by the following equation.

K: constant At a low current when no pulse is input during the sampling period Tss, as shown in FIG. 7, instead of storing in the registers A23 and 26 for each multiplied pulse input, the period Ts is stored.
When s is sampled, it is stored in the registers A23, 26 and the registers B24, 27.

Then, the time ΔTx until {M (i) −M (i−1)} ≧ | 1 | is calculated. As a result, the current calculation formula (1) can be used as it is.

FIG. 8 shows a flowchart of current calculation. When the calculation is started in block 100, the sampling period T
Blocks 110 to 160 are executed for each ss. That is, the block 110 outputs a latch command to the registers B24 and 27, and the blocks 120 and 130 fetch the time count value T (n) and the current count value M (n). Block 1
The difference ΔT (n), M between T (i) and T (i-1) at 40
The difference ΔM (n) between (i) and M (i−1) is calculated. Here, n = 1,2, ... i-1, i, i + 1.

In block 141, it is determined whether or not ΔM (n) is a value of 1 or more. If it is, ΔTx is obtained in block 143. When ΔM (n) of the previous time is a value of 1 or more, since the flow of block 142 has not been entered, there is no ΔTx to be added, so ΔTx becomes ΔT (n). The number of times ΔTx that has passed through the flow of block 142 is added.
The current I _M is calculated in block 150, and block 151
Then, ΔTx is set to 0, and the process ends at block 160.

If ΔM (n) is not a value greater than or equal to 1 in block 141, ΔTx is added in block 142, the process ends, and the next sampling starts. This is repeated until ΔM (n) becomes 1 or more.

FIG. 9 shows the output waveform of the 3φ / 2φ conversion circuit, which contains the pulsating component generated by the pulse width modulation control.

FIG. 10 shows the operation waveform and shows that the average value can be detected even if there is a pulsating component.

In this embodiment, as described above, the current is sampled in synchronization with the carrier signal of the pulse width modulation control. Since the calculation is performed using the average value during the sampling period Tss, the pulsation component is removed.

In the present embodiment, it is possible to calculate the current value I _M based on feα and feβ that have been 3φ / 2φ converted, and to calculate the torque current and the exciting current component that are vector components with high accuracy.

In this way, the current detection circuit 7 uses the V / F converter 12, the reversible counter 22, and the registers 23 and 24 to count the pulses proportional to the current, while the reference clock is used as the time counter 2.
5, high-precision current detection is achieved from the current count value and time count value to the low current region, and the current detection calculation of the average value for each cycle is performed in synchronization with the carrier signal of the pulse width modulation control. As a result, the pulsating component due to the pulse width modulation control is averaged, so that the influence of the pulsating component can be removed.

〔The invention's effect〕

The load current of the pulse width modulation controlled inverter is converted into a pulse train having the number of pulses proportional to the instantaneous value, the number of pulses is counted, and the amount of change in the count value is obtained for each sampling timing synchronized with the carrier signal. Since the load current is obtained by dividing by the sampling time difference, the pulsating component contained in the load current can be removed.

Also, when the change in the number of pulses exceeds a predetermined value, the load current is obtained from the sampling time difference until then,
Even in the low current range, the current can be detected with high accuracy.

As a result, there is an effect that the load of the inverter for pulse width modulation control can be stably controlled.

[Brief description of drawings]

1 is a block diagram of a current detection circuit, FIG. 2 is a block diagram showing an embodiment using an induction motor as a load, and FIGS. 3 and 4 are diagrams showing operation waveforms of the current detection circuit of FIG. , Fifth
The figure is a block diagram of a multi-input counter circuit, FIGS. 6 and 7.
FIG. 8 is an operation waveform diagram of the multi-input counter circuit of FIG. 5, FIG. 8 is a flow chart of current calculation, FIG. 9 is a current waveform diagram after 3φ / 2φ conversion, and FIG. 10 is an averaged operation waveform of current. It is a figure. 1 ... DC power supply, 2 ... Inverter circuit, 3 ... Induction motor, 4 ... Pulse generator, 5 ... Current detector, 6 ...
Digital control device, 7 ... Current detection circuit, 8 ... Control circuit, 9 ... Pulse width modulation (PWM) generation circuit, 10 ...
3φ / 2φ conversion circuit, 11 ... Absolute value circuit, 12 ... Voltage / frequency (V / F) converter, 13 ... Positive / negative discrimination circuit,
14 ... 2-phase signal generation circuit, 15 ... Multi-input counter circuit, 16 ... Clock, 20, 29 ... Counter / register circuit.

 ─────────────────────────────────────────────────── ─── Continuation of the front page (56) References JP-A-59-100866 (JP, A) JP-A-57-179668 (JP, A) JP-A-58-205864 (JP, A) Actually published 53- 53376 (JP, U)

Claims (2)

[Claims] 1. A load current of an inverter driven by pulse width modulation control is converted into a voltage signal, and the voltage signal is converted into a pulse train having a pulse number proportional to an absolute value of an instantaneous value of the voltage signal, The count value is obtained by reversibly counting the number of pulses of the pulse train in accordance with the positive and negative of the instantaneous value of the voltage signal, and the count value is sampled at each sampling timing synchronized with the carrier wave signal of the pulse width modulation control. A current detection method, wherein a change amount is obtained, and a detected value of the load current is obtained based on a value obtained by dividing the change amount by a sampling time difference until the absolute value of the change amount becomes a predetermined value or more. 2. A current detector for converting a load current of an inverter driven by pulse width modulation control into a voltage signal, and a pulse number proportional to the absolute value of the instantaneous value of the voltage signal for the converted voltage signal. A central processing unit having a voltage / frequency converter for converting to a pulse train, a counter for reversibly counting the number of pulses by inputting the pulse train according to the positive / negative of the instantaneous value of the voltage signal, and a central processing unit. The processing device samples the count value of the counter at a timing synchronized with the carrier wave signal of the pulse width modulation control,
Obtaining the difference between the sampled count value and the count value at the previous sampling, and calculating the load current detection value based on the value divided by the sampling time difference until the absolute value of the difference becomes a predetermined value or more. A current detection device characterized by: