JPS58205864A - Apparatus for measuring pulse frequency - Google Patents

Abstract

PURPOSE:To make it possible to measure pulse frequency in good preciseness even when input frequency is chaned over a wide range, by dividing the number of pulses arriving within a predetermined time interval by a net time required in the arrival of said number of pulses. CONSTITUTION:A loop counter 2 generates a timing pulse B with a definite cycle by repeating operation counting the internal reference pulse A of a CPU circuit 8 until predetermined numbers PT. On the other hand, an input pulse C is inputted in a counter 3 through the matching circuit 1 and a counter 4 is cleared zero each time by an input pulse D. When the CPU circuit 8 receives the pulse B as an interruption signal, a retention indicating signal is imparted to latch circuits 5, 6, 7 and the valves Qn, Mn, Pn thereof are taken in. In addition, the previous values Qn-1, Mn-1, Pn-1 stored in a memory circuit 9 are taken out and predetermined operation is carried out corresponding to the decided result according to the size of Mn and Mn-1 to output the operated result to a data receiving circuit 10 as a frequency measuring value.

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a pulse frequency measuring device that outputs from incoming input pulses a digital quantity that is proportional to the frequency of these input pulses.

With the spread of microcomputers, development of DDC devices that directly digitally control the rotational speed of electric motors has become active. In a fragile DDC device, it is required to detect the rotational speed as a digital quantity. A pulse having a frequency proportional to the rotational speed to be detected is extracted from a pulse generator attached to the rotating shaft. The pulses generated by the pulse generator are input to a measurement circuit including a pulse counter via a waveform shaping circuit.

In the measurement circuit, for example, input pulses arriving within a certain measurement time are integrated and counted. However, in the case of such a simple method, as is well known, 6±1
The lower the speed, the larger the detection error becomes.In order to reduce this detection error, it is necessary to set the time for integrating the input pulses (measurement time) to be large. In such a case, the detection delay becomes correspondingly large, which brings about the inconvenience of deteriorating the speed control performance of the DDC device.

In order to eliminate the above-mentioned inconvenience and to detect the speed with high precision in a short time in the rated speed range, a high-frequency reference pulse with a constant period is prepared, and while a predetermined number of input pulses are counted, It has already been proposed to obtain a digital quantity proportional to the frequency of the input pulse, that is, the speed to be detected, by counting the number of generated reference pulses and calculating the reciprocal of the counted number of reference pulses ( (See Japanese Unexamined Patent Publication No. 55-37707, or page 520 of "Patent Pulse Circuit Technology Encyclopedia" published by Ohmsha on May 20, 1980).

However, the above-mentioned known method has a problem in that the measurement time (and therefore the detection delay) varies considerably in applications where variable speed control is performed over a wide speed range. For the DDC device, the speed detection section can be considered as part of the controlled object, so the above means that the transfer function of the controlled object varies depending on the speed. Furthermore, this known method requires a very large number of input pulses to be counted in the low speed range, resulting in extremely long measurement times and correspondingly unacceptable detection delays. In the invention described in the above-mentioned publication, in order to solve this problem, the speed range is determined, and if it is in the low speed range at startup, the first method is used, that is, a fixed measurement time is used. It is proposed to detect the speed by counting the number of input pulses that arrive within a certain period of time.

An object of the present invention is to enable accurate measurement of the frequency of an input pulse repeatedly at regular time intervals even when the frequency of the input pulse changes over a wide range.

This purpose, according to the invention, is to provide a pulse frequency measuring device which generates from an incoming input pulse a digital output proportional to its frequency. This is achieved by comprising second and third counters and a digital arithmetic processing device such as a micron computer.

That is, the tenth counter generates a timing pulse having a constant period by repeatedly counting a predetermined number PT of high-frequency reference pulses having a constant period. The second counter repeats the operation of counting incoming input pulses up to a predetermined number (Ko). The number of input pulses is selected to be larger than the number of input pulses that arrive within one period of the typing pulse. The third counter counts the reference pulse while being cleared by an incoming input pulse. Each time the digital processing device receives and receives a timing pulse from the first counter, the first . The count contents of the second and third counters are input and the following arithmetic processing is performed to output a desired frequency measurement value. In other words, 1st. The current values of the count contents of the second and third counters are set as Qn = Mn and Pyu, respectively, and the values stored in the previous range are set as Qn-1, Mn-1 and Pn. Then, M21≧Mn according to the result of determining the magnitude of the current value Mn and the previous value Mn-1 of the count contents of the 20th counter.
-1, when Mn<M knee 1, force calculation is executed, and the calculation result is output as a Jli1 wave number measurement value.

According to the present invention, even when the frequency of the input pulse changes over a wide range, the frequency of the input pulse can be increased repeatedly at constant time intervals corresponding to the period of the timing pulse. Can be measured with precision.

Hereinafter, the present invention will be explained in more detail with reference to the drawings.

FIG. 1 shows an embodiment of a pulse frequency measuring device according to the present invention, and FIG. 2 shows an operating waveform diagram of the main part thereof.

In FIG. 1, reference numeral 1 denotes a pulse shaping circuit, which shapes a pulse C generated by, for example, a pulse generator attached to the rotating shaft of an electric motor, into a rectangular pulse D having a constant time width.

In particular, in this case, the output pulse D of the pulse shaping circuit 1
is preferably synchronized with an internal reference pulse (clock pulse) AK of the CPU circuit 8, which will be described later. 2 is a loop counter circuit (first counter) that generates a timing pulse B of a constant period by repeating the operation of counting the reference pulses up to a predetermined number F=. Reference numeral 3 denotes a loop counter circuit (second counter) that repeatedly counts the input pulses D guided through the pulse shaping circuit 1 up to a predetermined number KO. The predetermined number of KOs is
The number of input pulses that arrive within one cycle of the timing pulse B when the input pulse D is at the assumed maximum frequency is also set to be larger. 4 is a counter circuit (third counter) for counting reference pulses, and is cleared to zero each time by an input pulse D that arrives. Associated with each counter 2, 3 and 4 is a latch circuit 5.6 and 7.

8.9.10 configures a microcomputer,
8 is a CPU circuit, 9 is a memory circuit (ROM and RAM
), 10 is a data exchange circuit.

Reference numeral 11 denotes a control microcomputer that constitutes a DDC device for controlling motor speed, for example. The internal reference pulses of the CPU circuit 8 are guided to the first counter 2 and the third counter 4 as already mentioned. The timing pulse generated by the first counter 2 is given to the CPU circuit 8 as an interrupt signal. Loop counter circuit 2, 3.
The F-Touch circuits 5, 6, and 7, the CPU circuit 8, the memory circuit 9, and the data exchange circuit 10 are connected by a common bus.

The CPU circuit 8 operates according to a program contained in the memory circuit 9. Loop counter circuit 2.3 (7) The number of loops FT and Ko can be set by the CPU circuit 8 according to a program. The CPU circuit 8 receives a timing pulse B of a constant period generated by the loop counter circuit 2.
When received as an interrupt signal, the process currently being executed is interrupted and a predetermined interrupt program stored in the ROM in the memory circuit 9 is executed. In this interrupt program, first, a hold command signal E is simultaneously applied to the latch circuit fs, 6.7. Then loop counter 2
The value Qn held in the latch circuit 5 attached to.

The value Mn held in the latch circuit 6 attached to the loop counter circuit 3 and the value Pn held in the latch circuit 7 attached to the counter circuit 4 are taken in, and the values taken in during the previous calculation cycle are stored in the memory circuit 9. Take out the corresponding previous value Qn-1IMn-11Pn-1 stored in the RAM of Execute. That is, after determining the size of Mn and Mn-1, according to the result of the determination, if Mn≧Mu-1, the following operation is executed, and when MIX <Mn-1, the following operation is executed. Execute. In this case, it goes without saying that a proportionality constant can be taken into account for the calculation results if necessary. After the calculation is completed, the calculation result is output as a desired measurement value to the data exchange circuit 10, and
Qyu9M□ which has been inserted several times this time in preparation for the next calculation cycle
, Pn are stored in RAMK in the memory circuit 9.

#! Figure 2 shows the operating waveforms of the main parts.

A-Fl in Fig. 2 is a reference pulse A, a timing pulse (interrupt signal) B, and an input pulse C9 before waveform shaping, respectively.
The input pulse D and hold command signal fE of the waveform shaping edge are shown, respectively. F, G, H are counters 2, 3.4 respectively
The operation is illustrated.

Referring to FIG. 2, the principle of calculation for pulse frequency measurement in the apparatus of the present invention will be explained.

The calculation principle for pulse frequency measurement of the device of the present invention is to calculate the number of input pulses that have arrived within the time interval of two adjacent holding command signals E, and calculate the net time required for that number of input pulses to arrive. The basic idea is to measure the out-of-precision frequency by dividing by .

The number of loops KO of the loop counter circuit 3 is selected to be larger than the number of input pulses that arrive within the time corresponding to the reference pulse number PT at the expected maximum frequency, so
That is, even at the maximum frequency, the repetition period of the loop counter circuit 3 does not fall below the constant repetition period of the loop counter 2. Therefore, the number of input pulses that arrive within the time interval of two adjacent hold command signals E is between the current value Mn and the previous value Mn-1 of the loop counter circuit 30 count held by the latch circuit 6. It is given by the difference M, -M□-1. however,
When the current value Mn is smaller than the previous value Mn-1, the number of loops KO must be added to the difference Mn-MB-1.

The number of input pulses MnMn-1 or Mn Mn that arrived within the time interval of two adjacent hold command signals E
The net time required for -10Ko to occur corresponds to the time from immediately after the arrival of the input pulse immediately before the generation of the previous hold command signal to the arrival of the input pulse immediately before the generation of the current hold command signal. As can be seen from Figure 2, this time is M
, and Mu-1, the latch circuit 7 attached to the counter circuit 4 is determined based on the time from immediately after the generation of the previous hold command signal to the generation of the current hold command signal.
is the time obtained by subtracting the time corresponding to the difference between the count number Pn held this time and the count number Pn-1 held last time. Moreover, as can be seen from FIG. 2, the time from immediately after the generation of the previous hold command signal to the generation of the current hold command signal is a constant time corresponding to the reference pulse number PT.
Loop counter circuit 2 held by latch circuit 5
It corresponds to the difference between the current value Q and the previous same value Qn-1. Therefore, the above net time can be determined as PT+Qn Qn-t Pn+Pn-t. Therefore, the pulse frequency is ・Mn and Mn
-1, it can be determined by confirming the calculation that when Mn≧Mn-1, Mn<Mn-t.

As can be seen from the above, according to the present invention, since calculation is performed using net time, highly accurate measured values can be obtained. Moreover, over a wide range of frequencies, the calculation cycle for measurement is kept at a constant time corresponding to the reference pulse number PT,
Measured values can be obtained repeatedly.

As mentioned earlier, if high accuracy is required even when the input pulse is in the extremely low frequency region, the time corresponding to the set loop number of the loop counter circuit 2, that is, the reference pulse number, is exceeded. Then, the number of loops PT can be changed in the program. Further, the number of loops KO of the loop counter circuit 3 can be similarly set and changed by a program, and in this way, the maximum measurable frequency can also be increased.

[Brief explanation of the drawing]

FIG. 1 is a block diagram showing one embodiment of the device of the present invention, and FIG.
The figure is an operational waveform diagram of main parts for explaining the operation of the embodiment. Description of symbols 1... Pulse shaping circuit, 2... Loop counter circuit (first counter), 3... Loop counter circuit (second counter), 4... Song counter circuit (#l!3 counter), 5 to 7, song/latch circuit, 8...CPU, 9...Memory, 1o
...In front of the data transfer circuit 1 Figure 25II Bin-1 Building

Claims (1)

[Claims] l) In a pulse frequency measuring device that generates a digital output proportional to the frequency of an incoming input pulse, an operation of repeatedly counting a predetermined number (PT) of high-frequency reference pulses with a constant period is performed. (J) A first counter that generates a timing pulse with a constant period, and a counter that generates a timing pulse with a constant period, and a counter that is equal to the number of input pulses that arrive within one period of the timing pulse when the frequency to be measured is at its maximum value. a second counter that repeats the operation of counting incoming input pulses up to a large predetermined number (Ko); a third counter that counts the reference pulses while being shuffled by the incoming input pulse; and the timing Each time a pulse is received, the count contents of the first, second, and third counters are captured, and the contents of the first, second, and third counters are captured. The current value (Qn, M, and Pn) and the previous value (Qn -12Mn-s and Pn) of the count contents of the second and third counters
-t), the current value of the count contents of the second counter (
According to the result of determining the magnitude between M, ) and the previous value (Mn-t), when Mn ≥ MB-1, perform the calculation such that Mal < Mn-t, and use the calculation result as the frequency measurement value. A pulse frequency measuring device comprising: a digital arithmetic processing device that outputs an output; 2) The pulse frequency measuring device according to claim 1, wherein the digital arithmetic processing device is a microcomputer. 3) The pulse frequency measuring device according to claim 2, wherein the reference pulse is provided by a four-wheel pulse generator within a microcomputer. 4) The pulse frequency measuring device 1iO according to claim 3, wherein the arriving input pulse is synchronized with the reference pulse and waveform-shaped. 5) The timing pulse is transmitted to the microcomputer. The pulse frequency measuring device according to any one of claims 2 to 4, characterized in that the pulse frequency measurement device is provided as an interrupt signal. 6) 1st. Each output section of the second and third counters is equipped with a latch circuit, and after receiving the timing pulse as an interrupt signal, the microcomputer gives a hold command signal to these latch circuits, and The pulse frequency measuring device according to any one of claims 2 to 5, wherein the held contents are input after the holding operation of the pulse frequency measuring device is completed. 7) The pulse frequency measuring device according to any one of claims 1 to 6, wherein the loop count number in the loop counting operation of the first and second counters is set by a program in a microcomputer. 8) the incoming input pulses are supplied by a pulse generator mounted on the rotating shaft whose rotational speed is to be measured;
Pulse frequency measuring device 0 according to any one of claims 1 to 7, characterized in that the rotational speed is measured by the frequency of input pulses coming from the pulse generator.