JP2539170B2 - Current detection method and device - Google Patents

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an inverter load current detection method and device, and more particularly to a current detection method and device which can detect with high accuracy the influence of a pulsating component due to pulse width modulation control.

[0002]

2. Description of the Related Art In a conventional device, as described in Japanese Patent Publication No. 19236/1985, an instantaneous value detection current is sequentially moved at a constant electrical angle and averaged. Further, in Japanese Patent Laid-Open No. 58-198165, an instantaneous value of the output current of a pulse width modulation (hereinafter abbreviated as PWM) control converter when the carrier wave signal is in the vicinity of the maximum amplitude value is referred to as an A / D converter. Used to detect.

[0003]

DISCLOSURE OF THE INVENTION Problems to be Solved by the Invention
60-19236) is effective for a pulsating component that repeats at a frequency that is six times the inverter frequency, but is not considered in a PWM control inverter with a different pulsating component, so the pulsating component cannot be removed and is stable. Control was difficult. Further, in JP-A-58-198165, the current detection value of the fundamental wave component of the output current can be obtained without the influence of the pulsating component, but the circuit is complicated because a high-speed A / D converter is required. It became expensive and there was a problem in terms of economy.

An object of the present invention is to provide a current detection method and apparatus capable of detecting a load current of a PWM control inverter with high accuracy while reducing the influence of a pulsating component due to PWM control.

[0005]

To achieve the above object, a load current of an inverter driven by pulse width modulation control is converted into a voltage signal, and the voltage signal is converted into an absolute value of an instantaneous value of the voltage signal. was converted to a pulse train having a number proportional to the pulse, Ru obtains the count value by reversibly counting the combined number of pulses of the pulse train to the positive and negative instantaneous value of the voltage signal
In both cases, the time count value is calculated by counting the generation time of the pulse train.
And sequentially store the count value and the time count value,
Note that each of the stored contents is sampled at each sampling timing synchronized with the carrier signal of the pulse width modulation control,
The difference between the count value change amount and the time count value during the sampling period is obtained by the sampling , and the time count value is calculated.
The current detection method is characterized in that the detected value of the load current is obtained based on a value obtained by dividing the amount of change in the count value by the difference in value .

As a device for achieving this object, a current detector for converting a load current of an inverter driven by pulse width modulation control into a voltage signal, and the converted voltage signal for the voltage signal. A voltage / frequency converter for converting a pulse train having a pulse number proportional to the absolute value of the instantaneous value, and a first counter for reversibly counting the pulse number by inputting the pulse train according to the positive / negative of the instantaneous value of the voltage signal. and a second counter for counting the generation time of the pulse train.
And a count value of the first counter are sequentially stored.
First memory and time counted by the second counter
It has a second memory for sequentially storing the count value and a central processing unit, and the central processing unit has the first memory for each timing synchronized with the carrier wave signal of the pulse width modulation control .
Sample the contents stored in the second memory and the second memory ,
Due to the sampling,
Determining a difference variation and time count in count value, said time counting
The detected value of the load current is calculated based on the value obtained by dividing the amount of change in the count value by the difference between the values.

[0007]

With this structure, the above-mentioned object can be achieved by the present invention by the following operations.

Since the PWM-controlled inverter is turned on / off by the pulse width modulation pulse synchronized with the cycle of the carrier signal, the load current of the inverter contains a pulsating component due to the turning on / off of the pulse. Therefore, the pulse density of the pulse train obtained by frequency-converting the instantaneous value of the load current changes with the pulsation component reflected. as a result,
The amount of change in the count value obtained by counting the number of pulses in this pulse train also changes according to the pulsating component. Therefore, if the count value is sampled at an arbitrary timing and the amount of change in the count value is divided by the sampling time difference to obtain the load current, an instantaneous value including a pulsating component may be detected.

In this respect, according to the present invention, the pulse train corresponding to the instantaneous value of the load current is synchronized with the timing synchronized with the cycle of the carrier signal, that is, in synchronization with the pulsating cycle of the pulsating component.
Count value and time count value related to pulse train generation time
It was sampled, the by the sampling sampling
Difference between count value and time count value
And the load current is calculated by dividing the amount of change in the count value by the difference in the time count value, so that the pulsation component is averaged. As a result, the instantaneous value of the load current excluding the pulsating component is detected.

[0010]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENT An embodiment according to the present invention will be described below with reference to FIGS.
This will be described below. FIG. 2 is a block diagram showing the configuration of the speed control device for the induction motor. In the figure, 1 is a DC power supply, 2 is an inverter circuit, 3 is an induction motor, 4 is a pulse oscillator, 5 is a current detector, 6 is a digital controller using a microprocessor, and 7 is a digital value that detects an alternating current. Is a current detection circuit for converting into a current, 8 is a control circuit for an induction motor including a microprocessor, and 9 is a PWM control generation circuit.

FIG. 1 is a block diagram of a current detection circuit 7 showing this embodiment. First, the configuration of FIG. 1 will be described. In FIG. 1, reference numeral 10 denotes 3φ for converting the three-phase alternating current of the current detector 5 into a two-phase alternating current signal of a rotating magnetic field system orthogonal two-axis coordinate.
/ 2φ conversion circuit, 11 is an absolute value circuit that outputs the absolute value of an AC signal, 12 is a V / F converter, 13 is a positive / negative determination circuit that determines the positive / negative of the AC signal, and 14 is for one pulse input A two-phase signal generation circuit that generates a two-phase pulse signal having a 90 ° phase difference, 15 is a multi-input counter circuit that includes a reversible counter, a register, and the like, 16 is a clock generation circuit that serves as a reference clock of the multi-input counter circuit, and 17 Is the microprocessor data and address bus.

Next, the operation of FIG. 1 will be described with reference to FIGS. 3 and 4. 3 and 4 are operation waveforms of each part. 3φ
AC current waveform (voltage signal) eu, ev, ew of 3φ /
The 2φ converter circuit 10 converts 2α of eα and eβ. The absolute value circuit 11 uses eα and eβ to calculate | eα |, | e
A waveform of β | is created and input to the V / F converter 12. V
The / F converter 12 outputs pulse trains feα and feβ having frequencies proportional to the instantaneous values of the input signals | eα | and | eβ |. The positive / negative discriminating circuit 13 outputs signals Peα and Peβ for discriminating the positive / negative of eα and eβ. Two-phase signal generation circuit 14
Then, the pulse trains feα and feβ are divided into quarters, and the two-phase signal pulse trains Aφ and Bφ with a phase difference of 90 degrees are fed to feα and f.
Output to eβ respectively.

Although FIG. 4 shows the operation for feα, the same applies to feβ. First, Peα is "H
When “(positive)”, Aφ is 90 ° ahead of Bφ, and when Peα is “L (negative)”, Aφ is Bφ.
90 ° position behind. The pulse train of Aφ and Bφ is input to the multi-input counter circuit 15 in the next stage.
The multi-input counter circuit 15 counts the pulse trains of Aφ and Bφ of feα and feβ, counts the clock 16, and stores the respective count values in the register.

Next, the multi-input counter circuit 15 shown in FIG.
Will be explained. FIG. 5 is a block diagram of the multi-input counter circuit 15. In FIG. 5, reference numerals 20 and 29 denote counters and register circuits for feα and feβ, respectively. Reference numeral 21 is a frequency multiplication circuit, 22 is a reversible counter that counts feα (first counter) , 23 and 24 are registers, and 25 is a counter that counts a reference clock (second counter ).
Unter) , 26 and 27 are registers, 28 is register 2
It is a control circuit for controlling the latch timing of 3, 24 and 26, 27.

Next, the operation of FIG. 5 will be described with reference to FIG. The pulses of the two-phase signals Aφ and Bφ of feα input to the frequency multiplication circuit 21 of FIG.
Detecting the rising and falling signals of φ and Bφ, a pulse train having a frequency four times that of the V / F converter 12 is inputted to the reversible counter 22 at the next stage. At this time, the pulse train is input to the + side of the reversible counter when the phase of Aφ is advanced with respect to Bφ, and is input to the − side when the phase is delayed, and the reversible counter counts increment and decrement, respectively.

Next, the operating principle of high precision current detection will be described with reference to FIGS. 6 and 7. FIG. 6 shows the sampling period T
In the case of a high current in which a multiplied pulse is input to ss, FIG.

Here, the sampling period Tss is as shown in FIG.
As will be described later, it is determined in synchronization with the PWM control carrier signal.

In FIG. 6, the multiplied pulse signal is counted by the reversible counter 22 and its count value M (i-
1) and M (i) are stored in the register A (first memory) 23. On the other hand, the counter 25 counts the reference clock and uses it as a time count value in the register A for each multiplied pulse input.
(Second memory) 26 stores T (i−1) and T (i). Then, at the sampling cycle Tss based on the sampling signal from the address bus shown in FIG. 5, S (i-
In 1) and S (i), the contents of the registers A23 and 26 are stored in the registers B24 and 27 and then read out. A multiplied pulse signal is input to the read current count value M (n) and time count value T (n) (where n = 1,2, ... i-1, i, i + 1 ...). The value is updated every time and is not affected by the sampling cycle Tss.

The current value I _M can be calculated with high accuracy by the following equation.

M (i) -M (i-1) I _M = K ─────────── (1) T (i) -T (i-1) K: constant sampling period At the time of low current when no pulse is input during Tss, as shown in FIG. 7, instead of storing in the registers A23 and 26 for each input of the multiplied pulse, the cycle Tss is stored.
Are stored in the registers A23 and 26 and the registers B24 and 27 at the time of sampling.

Then, the time ΔTx until {M (i) -M (i-1)} ≧ │1│ is calculated. As a result, the current calculation formula (1) can be used as it is.

FIG. 8 shows a flowchart for current calculation. When the calculation is started in block 100, blocks 110 to 160 are executed every sampling period Tss. That is, in block 110, registers B24, 2
The latch command to 7 is output, and the blocks 120 and 130 take in the time count value T (n) and the current count value M (n). At block 140, the difference ΔT between T (i) and T (i−1)
(N), the difference ΔM (n) between M (i) and M (i-1) is calculated. Here, n = 1,2, ... i-1, i, i + 1.

In block 141, it is judged whether or not ΔM (n) is a value of 1 or more, and if it is, block 143.
Then, ΔTx is calculated. When the previous ΔM (n) is a value of 1 or more, the flow of block 142 has not been entered, so there is no ΔTx to be added, so ΔTx is ΔT (n).
Becomes ΔTx of the number of times the flow of block 142 has been passed
Is added. The current I _M is calculated in block 150, ΔTx is set to 0 in block 151, and the process ends in block 160.

If .DELTA.M (n) is not a value of 1 or more in block 141, .DELTA.Tx is added in block 142 and the process ends, and the next sampling starts. This is repeated until ΔM (n) becomes 1 or more.

FIG. 9 shows the output waveform of the 3φ / 2φ conversion circuit.
A pulsation component generated by PWM control is included.

FIG. 10 shows the operation waveform, and shows that the average value can be detected even if there is a pulsating component.

In this embodiment, as described above, the current is sampled in synchronization with the carrier wave signal of the PWM control. Since the calculation is performed using the average value during the sampling period Tss, the pulsation component is removed.

In this embodiment, fe converted by 3φ / 2φ is used.
By calculating the current value I _M based on α and feβ, the torque current and the exciting current component, which are vector components, can be calculated with high accuracy.

As described above, the current detection circuit 7 uses the V / F converter 12, the reversible counter 22, and the registers 23 and 24 to count the pulses proportional to the current, while the reference clock is counted by the time counter 25 and the ammeter. High-precision current detection is achieved from the numerical value and time count value to the low current region, and PW
By performing current detection calculation of the average value for each cycle in synchronization with the carrier wave signal of M control, the pulsation component by PWM control is averaged, so that the influence of the pulsation component can be removed.

[0030]

The load current of the PWM controlled inverter is converted into a pulse train having a pulse number proportional to the instantaneous value, and the pulse number is counted and the pulse generation time is measured.
Several obtains a difference between the change amount and the time count of the count value at each sampling timing synchronized with the carrier signal, Cow
Since the load current is obtained by dividing the amount of change in the load value by the difference in the time count value, the pulsating component included in the load current can be removed.

As a result, there is an effect that the load of the PWM-controlled inverter can be stably controlled.

[Brief description of drawings]

FIG. 1 is a block diagram of a current detection circuit according to an embodiment of the present invention.

FIG. 2 is a block diagram in which an induction motor is used as a load in one embodiment of the present invention.

FIG. 3 is a diagram showing an example of operation waveforms of respective parts of the current detection circuit according to the embodiment of the present invention.

FIG. 4 is a diagram showing an example of operation waveforms of respective parts of the current detection circuit according to the embodiment of the present invention.

FIG. 5 is a block diagram of a multi-input counter circuit of the current detection circuit according to the embodiment of the present invention.

FIG. 6 is a diagram showing an example of operation waveforms when a high current is detected in the multi-input counter circuit according to the embodiment of the present invention.

FIG. 7 is a diagram showing an example of operation waveforms when a low current is detected in the multi-input counter circuit according to the embodiment of the present invention.

FIG. 8 is a flow chart of current calculation according to an embodiment of the present invention.

FIG. 9 is a diagram showing an example of output waveforms of a 3φ / 2φ conversion circuit.

FIG. 10 is a waveform diagram showing execution of averaging of output waveforms in an embodiment of the present invention.

[Explanation of symbols]

 1 DC power supply 2 Inverter circuit 3 Induction motor 4 Pulse oscillator 5 Current detector 6 Digital control device 7 Current detection circuit 8 Control circuit 9 PWM control generation circuit 10 3φ / 2φ conversion circuit 11 Absolute value circuit 12 V / F converter 13 Positive / negative discrimination circuit 14 Two-phase signal generation circuit 15 Multi-input counter circuit 16 Clock generation circuit 17 Address bus 20, 29 Counter register circuit 21 Frequency multiplication circuit 22 Reversible counter 23, 24, 26, 27 Register 25 Counter 28 Control circuit

 ─────────────────────────────────────────────────── --- Continuation of the front page (56) References JP-A-58-205764 (JP, A) JP-A-59-100866 (JP, A) JP-A-57-179668 (JP, A) JP-A-1- 84157 (JP, A) Actual development Sho 53-53376 (JP, U)

Claims (2)

(57) [Claims] 1. A load current of an inverter driven by pulse width modulation control is converted into a voltage signal, the voltage signal is converted into a pulse train having a pulse number proportional to an absolute value of an instantaneous value of the voltage signal, Rutomoni obtains the count value by reversibly counting the combined number of pulses in the pulse train to the positive and negative instantaneous value of the voltage signal, counts the time of occurrence of said pulse train
Obtain the time count value, and sequentially calculate the count value and the time count value.
The stored contents are sampled at each sampling timing synchronized with the carrier signal of the pulse width modulation control, and the sampling is performed during the sampling period.
The difference between the count value change and the time count value at
A current detection method, wherein a detection value of the load current is obtained based on a value obtained by dividing a change amount of the count value by a difference between the time count values . 2. A current detector for converting a load current of an inverter driven by pulse width modulation control into a voltage signal,
A voltage / frequency converter for converting the converted voltage signal into a pulse train having a pulse number proportional to the absolute value of the instantaneous value of the voltage signal; and inputting the pulse train to change the pulse number to the instantaneous value of the voltage signal. 1st which counts reversibly according to positive and negative
Second counting and the counter, the time of occurrence of said pulse train
Counter and the count value of the first counter are sequentially
The first memory for storing and the second counter for counting
The central processing unit has a second memory for sequentially storing the time count value by the central processing unit, and the central processing unit is provided for each timing synchronized with the carrier signal of the pulse width modulation control.
The stored contents of the first memory and the second memory are sampled, and the sampling is performed during the sampling period.
Determining a difference variation and time count of definitive count value, the
A current detection device, wherein the detected value of the load current is calculated based on a value obtained by dividing the amount of change in the count value by the difference in time count value .