JPH0637030A - Method and apparatus for additive ion implantation and electrode formation in semiconductor substrate - Google Patents

Abstract

PURPOSE:To reduce irradiation defects during ion implantation by maintain the semiconductor substrate temperature at a constant value below a specific value, expressed in absolute temperature, related to the melting point of the semiconductor above the temperature of liquid nitrogen. CONSTITUTION:Additive is ionized by an ion source 1, and the resultant ions are implanted into a semiconductor substrate 8. A chamber 11 is exhausted by a vacuum pump 12. For uniform ion implantation, a stage 10 is turned by a rotational driving motor 13 through gears 131 and 132. A sealed bearing 111 is installed on the chamber 11 to support the shaft of the stage 10. The stage 10 is cooled by an electronic cooling device 14 built therein and thus cools semiconductor substrates 8. The semiconductor substrate temperature is controlled by the cooling action during ion implantation so that it is maintained at a constant value below a value equal to 15% of the melting point of the semiconductor (absolute temperature) above the temperature of liquid nitrogen.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method for implanting an additive ion into a semiconductor substrate, a method for forming an electrode on a semiconductor substrate by an ion mixing method, and an apparatus for carrying out these methods. The present invention relates to an improvement for facilitating the suppression and removal of irradiation defects caused by ion implantation.

[0002]

2. Description of the Related Art As a conventional technique for implanting additive ions into a semiconductor substrate, as described in JP-A-3-145722, the semiconductor substrate is cooled to liquid nitrogen or liquid helium temperature at the time of ion implantation to cause lattice vibration. There is a method of implanting additive ions so as to suppress and promote channeling to obtain a steep additive profile and suppress generation of irradiation defects, and then perform annealing.

Further, as described in Japanese Patent Laid-Open No. 63-185016, it is easy to remove irradiation defects by making the ion-implanted region amorphous, preliminarily implanting additive ions, and then annealing. Attempts have been made to

As a conventional technique for forming electrodes on a semiconductor substrate, metal for electrodes is vapor-deposited on a semiconductor substrate, and then mixing ions (semiconductor or ions of the same substance as the vapor-deposited metal) are irradiated to vapor-deposit. There is an electrode forming method by a so-called ion mixing method in which a metal and a semiconductor substrate are mixed.

[0005]

In the additive ion implantation method described above, the generation of irradiation defects is suppressed by cooling the semiconductor substrate to the liquid nitrogen or liquid helium temperature during the additive ion implantation. Although heat transfer is used for this cooling, it takes time for the semiconductor to be cooled to these temperatures due to poor heat transfer. In addition, using liquid nitrogen or helium is expensive,
There is a problem that handling becomes complicated.

Further, in the additive ion implantation method described above, by implanting semiconductor self-ions (ions of the same substance as the semiconductor, that is, if the semiconductor is silicon, silicon ions) into the semiconductor substrate. The annealing temperature is lowered by performing the amorphization in advance and then implanting the additive ions and then recrystallizing by annealing. However, there is a problem that irradiation defects are formed in the vicinity of the interface between the amorphized region and the crystalline region, the defects grow during annealing, and the defects remain after annealing. Further, there is a problem that a long time annealing is required to completely remove this defect, and high integration cannot be achieved.

Further, in the method of forming the electrode for the semiconductor described above by the ion mixing method, there is a problem that irradiation defects are formed in the semiconductor during the mixing.

Therefore, the first object of the present invention is to provide the above-mentioned first object.
A semiconductor that improves the conventional additive ion implantation method described above and suppresses irradiation defects even if the semiconductor substrate temperature at the time of additive ion implantation is higher than that of the conventional method described above, and facilitates its removal. It is an object to provide a method for implanting an additive ion into a substrate and an apparatus therefor.

A second object is to improve the conventional additive ion implantation method described above, to suppress defects formed when the semiconductor substrate is amorphized, and to facilitate its removal. A method for implanting an additive ion into a semiconductor substrate and an apparatus therefor are provided.

A third object is to improve the electrode forming method by ion mixing described in the third aspect, to suppress irradiation defects and to facilitate their removal, and a device therefor. To provide.

[0011]

The first object is the structure of claims 1 or 5 in the claims, and the second object is the structure of claims 2, 3, 6 or 7.
The third object is achieved by the structure of claim 4 or 8.

[0012]

First, the operation of the invention according to claim 1 or 5 will be described. FIG. 7 shows 100 keV boron ions at 20 ° C. as additive ions on a silicon substrate which is a semiconductor substrate.
Is a schematic view of a cross section of a semiconductor substrate when 1 × 10 ¹³ pieces are implanted at a temperature of −70 ° C. and then annealed at a temperature of 850 ° C. for 20 minutes, and the vertical direction in the figure is the thickness of the semiconductor substrate. Direction. As shown in FIG. 7, the size of the dislocation loop generated as an irradiation defect and the width W of the existing region thereof differ depending on the ion implantation temperature. FIG. 8 shows the results of measuring the width (W in FIG. 1) of the irradiation defect existing region when the ion implantation is performed under the same conditions as above at various temperatures. The vertical axis represents the width W and the horizontal axis represents the ion implantation temperature T. As can be seen from these figures, irradiation defects become finer as the implantation temperature becomes lower, and their existing regions are localized, so that they can be easily removed by annealing. Since the generation of irradiation defects depends on the behavior of point defects (a defect of one atom size, which means ejected atoms and vacancies in the trace thereof), when an additive ion other than boron is implanted, or Similar results are obtained when the energy of the implanted ions is changed.

From the results of FIG. 8, in the case of silicon, when the ion implantation temperature is -20 ° C. or less, the defect existing region width W
It can be seen that is significantly reduced. The temperature of −20 ° C. corresponds to 15% of the melting point (absolute temperature) of silicon. Even in the case of semiconductors other than silicon, the generation amount of irradiation defects depends on the ion implantation temperature, and by setting the temperature at the time of ion implantation to a temperature equal to or lower than 15% of the melting point (absolute temperature) of the semiconductor, the irradiation defects The width of the existing region can be reduced.

As described above, the temperature of the semiconductor substrate at the time of ion implantation is 1 of the melting point (expressed in absolute temperature) of the semiconductor.
If the temperature is equal to or lower than 5%, it is possible to suppress the generation amount and generation region of irradiation defects without cooling the semiconductor substrate to the temperature of liquid nitrogen at the time of ion implantation as in the prior art described above. Therefore, the removal can be easily performed by annealing.

However, if the temperature of the semiconductor substrate at the time of ion implantation varies, the irradiation defect may remain without being removed depending on the annealing conditions. Therefore, in the present invention, the temperature of the semiconductor substrate at the time of ion implantation is controlled to be constant within a range higher than the temperature of liquid nitrogen and equal to or lower than 15% of the melting point (absolute temperature) of the semiconductor.

Next, the operation of the invention according to claim 2, 3, 6 or 7 will be described. In order to amorphize a semiconductor by ion implantation, a certain amount of ion implantation or more is required. The lower limit of this required injection amount is called the critical dose for amorphization. Irradiation defects are formed at the interface between the amorphized region and the crystalline region, and the amount of this defect depends on the number of implanted ions. Therefore, in the present invention, after the self-ion of the semiconductor (ion of the same substance as the semiconductor) is injected to such an extent that the critical dose is not reached by itself, the additive ion is injected, and the total of the injection amounts of both is The critical dose is reached so that amorphization occurs only at this time. That is, in the prior art, the amount of ion implantation was made amorphous by reaching the critical dose for amorphization by only self-ion implantation, whereas in the present invention, self-ion implantation is performed first and then The additive ions are implanted into the amorphous silicon, and the amorphization occurs only when the total dose of the two ions reaches the critical dose for the amorphization. As a result, it is possible to reduce the occurrence of irradiation defects as compared with the conventional technique in which amorphization is performed only with self-ions in advance, and therefore removal by annealing becomes easier.

In this case, if the temperature of the semiconductor substrate at the time of self-ion implantation and at the time of additive ion implantation is controlled to be higher than the temperature of liquid nitrogen and not higher than 15% of the melting point of the semiconductor as described above, The critical dose for the amorphization is reduced, and the generation amount and generation region of irradiation defects can be reduced more effectively.

Also in the invention described in claim 4 or 8, by controlling the temperature of the semiconductor substrate at the time of irradiation of the mixing ions to a temperature regulated by the irradiation, the generation of irradiation defects is reduced, so that the removal thereof can be easily performed. Become.

[0019]

EXAMPLE An example of implanting additive ions into a semiconductor substrate will be described with reference to FIG. The additive is ionized by the ion source 1, becomes the additive ion 2, is extracted forward by the extraction electrode 3, the impurities are removed by the analysis magnet 4, and is accelerated by the acceleration tube 5. The accelerated ions 2 are converged by the quadrupole lens 6 and scanned vertically and horizontally by the deflection lens 7. The scanned ions are implanted into the semiconductor substrate 8. The semiconductor substrate 8 is covered with a photomask 9 so that it can be implanted only in an arbitrary predetermined region. A plurality of semiconductor substrates 8 are fixed to the stage 10. The above apparatus is in a vacuum container 11, and the inside of this container 11 is exhausted by a vacuum pump 12. In order to perform uniform ion implantation, the stage 10 is rotated by the rotary drive motor 13 via the gears 131 and 132. Reference numeral 111 denotes a seal bearing provided on the container 12 to support the stage 10 axially. The stage 10 is cooled by an electronic cooling device (for example, one utilizing the Peltier effect) 14 built in the stage 10 to cool the semiconductor substrate 8. By this cooling action, the temperature of the semiconductor substrate at the time of ion implantation is controlled to be a constant temperature equal to or lower than the temperature corresponding to 15% of the melting point (absolute temperature) of the semiconductor and higher than the temperature of liquid nitrogen. Therefore, the temperature of the semiconductor substrate 8 at the time of ion implantation is measured by the thermocouple 15 provided on the substrate 8, the signal from the thermocouple 15 is sent to the signal processing device 16, and the substrate 8
When the temperature of 1 is deviated from the above constant temperature, the signal processing device 16 adjusts the output of the power supply 17 for the electronic cooling device 14 to control the temperature of the substrate 8 to the above constant temperature. Instead of the electronic cooling device 14, a refrigerating cycle refrigerant evaporator is used as stage 1.
It may be provided in 0 for cooling.

FIG. 2 is a schematic view of another embodiment of an implanter for implanting additive ions into a semiconductor substrate. Portions corresponding to the respective portions in FIG. 1 are denoted by the same reference numerals, and duplicated description of the structure and operation of these portions will be omitted. In this embodiment, the stage 10 supporting the semiconductor substrate 8 is cooled by the liquid nitrogen 18 introduced into the stage 10 to cool the semiconductor substrate 8. The additive ions 2 are implanted into the semiconductor substrate 8 as in FIG. At the time of this ion implantation, the temperature of the semiconductor substrate 8 is controlled to be the same constant temperature as in the embodiment of FIG. For that purpose, in the present embodiment, the temperature of the substrate 8 at the time of ion implantation is measured by the thermocouple 15 provided on the substrate 8, the signal from the thermocouple 15 is sent to the signal processing device 16, and the temperature of the substrate 8 is measured. Is deviated from the above constant temperature, the signal processing device 16 adjusts the output of the power source 19 of the heater 20 installed facing the semiconductor substrate 8 to adjust the heat generation amount of the heater 20.
The temperature of 8 is controlled to the above constant temperature.

FIG. 3 is a schematic view of an embodiment in which a semiconductor device is manufactured by amorphizing the semiconductor by implanting self ions (ions of the same substance as the semiconductor) and additive ions.
In FIG. 3, parts similar to those of FIG. 1 are denoted by the same reference numerals, and duplicated description of the structure and operation of these parts will be omitted. In this embodiment, the self-ion implantation is performed on the semiconductor substrate 8 using the self-ion implantation accelerator 22. After that, the additive ions are implanted into the semiconductor substrate 8 by using the accelerator for implanting the additive ions 23 to make the implanted region amorphous. The temperature of the substrate 8 during ion implantation is the same as in the embodiment of FIG. 1, and the temperature control method is also the same as in the case of FIG. The above-mentioned self-ion implantation and additive-ion implantation are performed such that the critical dose for amorphization described above is achieved for the first time by the sum of the injection amounts of both, and at that time, amorphization occurs for the first time. . FIG. 9 relates to the present embodiment, and in the case where the semiconductor substrate is silicon, silicon ions are implanted as self ions and boron ions are implanted as additive ions so that the sum of the implantation doses of both is made equal to the critical dose. It is a figure which shows the correlation of the implantation amount of both, the vertical axis is the implantation amount of silicon ions, the horizontal axis is the implantation amount of boron ions, and the line L is a line where the total of the implantation amounts of both is equal to the critical dose. Is shown.

FIG. 4 is a schematic view of an embodiment in which electrodes are formed on a semiconductor substrate by a mixing method. The metal for the electrode evaporated from the evaporation source 24 is vapor-deposited on the semiconductor substrate 8 fixed to the stage 10. In this case, the substrate 8 is covered with the mask 9 so that vapor deposition can be performed only in a required region. The substrate 8 is rotated by rotating the stage 10 in order to uniformly deposit the metal film. The vapor deposition film thickness is controlled by using the crystal oscillator 25 installed on the substrate 8. That is,
Since the frequency of the crystal oscillator 25 changes depending on the film thickness deposited on the substrate 8, the deposited film thickness can be measured from the frequency, and the deposited film thickness is controlled based on this. In this way, the electrode metal is vapor-deposited so as to have a predetermined film thickness, and the vapor deposition region is irradiated with the self-ions of the semiconductor by using the ion accelerator 26, whereby the vapor-deposited electrode metal and the semiconductor substrate are deposited. 8 is mixed to form a compound. During mixing, the temperature of the substrate 8 is controlled to the same temperature and in the same control manner as in the embodiment of FIG.

In the embodiment shown in FIGS. 3 and 4, the semiconductor substrate may be cooled and the temperature may be controlled by the same means as in the embodiment shown in FIG.

Next, an example of a manufacturing process for forming a PNP junction in the N-type silicon substrate 8 and attaching electrodes by using the present invention will be described with reference to FIG. First, the N-type silicon substrate 8 covered with the photomask 9 is cooled to -30 ° C. This substrate temperature is kept constant during ion implantation. While cooling the substrate 8 in this way, boron ions 2
1 × 10 ^{13 of} 7 is injected. After the implantation of the boron ions 27, the mask 9 is removed, a new mask 9'is covered next to the portion other than the electrode mounting portion, and molybdenum 28 as an electrode metal is vapor-deposited at 0.5 μm on the electrode mounting portion. Then 600 ke
Irradiate 1 × 10 ¹³ V silicon ions 29 to mix the molybdenum 28 and the silicon substrate 8 to form molybdenum silicide 31 at the interface between the two. In this way, the electrodes of the emitter 32, the collector 33, and the base 34 are formed. After forming the electrodes, the mask 9'is removed and the temperature is 850 ° C.
Annealing is performed for 1 hour to stabilize the region of molybdenum silicide 31 and remove irradiation defects.

Another example of the manufacturing process for forming the PNP junction in the N-type silicon substrate 8 and mounting the electrodes using the present invention will be described with reference to FIG. First, the silicon substrate 8 covered with the photomask 9 is cooled to -30 ° C.
This substrate temperature is kept constant during ion implantation. While cooling the substrate 8 in this manner, 4.9 × 10 ¹⁵ silicon ions 29 are implanted, and after this implantation, boron ions 2 are added.
1 × 10 ^{13 of} 7 is implanted to form the P layer 30. The implantation region 30 becomes amorphous. Next, the mask 9 is removed, a new mask 9'is covered over the electrode installation portion, and 0.5 μm of molybdenum 28 is vapor-deposited as an electrode metal on the electrode installation portion. After that, 600 keV silicon ion 29 is added to 1 × 1.
Irradiating 0 ¹³ pieces, the molybdenum 28 and the silicon substrate 8 are mixed to form molybdenum silicide 31 at the interface between the two. In this way, the emitter 32, the collector 33,
The electrodes of the base 34 are formed. 600 ° C after electrode formation
Is annealed for 2 hours to stabilize the region of molybdenum silicide 31 and to recrystallize the irradiated region.

[0026]

According to the present invention, when an additive ion is implanted into a semiconductor substrate, irradiation defects formed by the ion implantation are reduced, so that the defect can be easily removed.
As a result, it is possible to suppress the diffusion of the additive during annealing and achieve high integration of the semiconductor device. Further, since it is not necessary to cool the semiconductor substrate to the temperature of liquid nitrogen or helium, the semiconductor element can be manufactured inexpensively and easily.

Also, when the electrodes are formed on the semiconductor substrate by using the ion beam mixing method, irradiation defects are reduced and removal thereof is facilitated as in the case of the above-mentioned ion implantation.

[Brief description of drawings]

FIG. 1 is a diagram showing an example of implanting additive ions according to the present invention.

FIG. 2 is a diagram showing another embodiment of implanting additive ions according to the present invention.

FIG. 3 is a diagram showing an example of implanting additive ions after self-ion implantation according to the present invention.

FIG. 4 is a diagram showing an example of forming electrodes on a semiconductor substrate according to the present invention.

FIG. 5: PNP by low temperature ion implantation using the present invention
The figure which shows a joining manufacturing process.

FIG. 6 is a PN formed by an amorphization process utilizing the present invention.
The figure which shows a P junction manufacturing process.

FIG. 7 is a schematic cross-sectional view of a semiconductor substrate when annealed after ion implantation at two different temperatures.

FIG. 8 is a diagram of an experimental graph showing the ion implantation temperature dependence of the width of the defect region remaining in the silicon substrate after annealing.

FIG. 9 is a diagram showing a correlation between implantation amounts when implanting silicon ions and boron ions into silicon and setting the sum of the implantation amounts of both ions as a critical dose.

[Explanation of symbols]

DESCRIPTION OF SYMBOLS 1 ... Ion source 2 ... Additive ion 3 ... Extraction electrode 4 ... Analysis magnet 5 ... Accelerating tube 6 ... Quadrupole lens 7 ... Deflection lens 8 ... Semiconductor substrate 9 ... Photomask 10 ... Stage 11 ... Vacuum container 12 ... Vacuum pump 13 ... Rotation drive motor 14 ... Electronic cooling device 15 ... Thermocouple 16 ... Signal processing device 17 ... Electronic cooling power supply 18 ... Liquid nitrogen 19 ... Heater power supply 20 ... Heater 22 ... Self-ion implantation accelerator 23 ... Additive ion implantation Accelerator 24 ... Evaporation source 25 ... Crystal oscillator 26 ... Mixing ion accelerator 27 ... Boron ion 28 ... Molybdenum 29 ... Silicon ion 30 ... P layer 31 ... Molybdenum silicide 32 ... Emitter 33 ... Collector 34 ... Base

 ─────────────────────────────────────────────────── ─── Continuation of the front page (72) Inventor Motoyuki Hashimoto 1168 Moriyama-cho, Hitachi-shi, Ibaraki Inside the Institute for Energy Research, Nitrate Works (72) Inventor Shinro Owada 2326 Imai, Ome-shi, Tokyo Hitachi, Ltd. Device Development In the center

Claims (9)

[Claims] 1. Addition while controlling the temperature of the semiconductor substrate to a constant temperature within a temperature range equal to or lower than 15% of the melting point of the semiconductor expressed in absolute temperature and higher than the temperature of liquid nitrogen. A method of implanting an additive ion into a semiconductor substrate, which comprises implanting a product ion into a semiconductor substrate. 2. A semiconductor substrate is implanted with self-ions of a semiconductor to such an extent that the critical dose for amorphization of the semiconductor is not reached, and then additive ions are implanted. A method for implanting an additive ion into a semiconductor substrate, which comprises amorphizing an ion-implanted region of the semiconductor substrate by reaching a critical dose. 3. The method of implanting additive ions into a semiconductor substrate according to claim 2, wherein the temperature of the semiconductor substrate is equal to or lower than a temperature corresponding to 15% of the melting point of the semiconductor expressed in absolute temperature, and the liquid. The method is characterized in that the self-ions and the additive ions are implanted while controlling the temperature to be a constant temperature higher than the temperature of nitrogen. 4. After depositing the electrode metal on the semiconductor substrate, the temperature of the semiconductor substrate is not higher than the temperature corresponding to 15% of the melting point of the semiconductor expressed in absolute temperature and higher than the temperature of liquid nitrogen. A method for forming an electrode on a semiconductor substrate, which comprises irradiating mixing ions and performing mixing while controlling the temperature to a constant temperature within a temperature range. 5. A supporting device for supporting the semiconductor substrate, an ion accelerator for irradiating the semiconductor substrate with additive ions, a vacuum container accommodating these, and a cooling provided in the supporting device for cooling the semiconductor substrate. A device, a temperature measuring device for measuring the temperature of the semiconductor substrate, and a temperature of the semiconductor substrate higher than the temperature of liquid nitrogen and expressed as an absolute temperature based on the measurement result of the temperature measuring device at the time of the additive ion implantation. An additive ion implantation device for a semiconductor substrate, comprising: a controller for controlling the cooling device so as to maintain a constant temperature within a temperature range equal to or lower than 15% of a melting point of the semiconductor. 6. A support device for supporting the semiconductor substrate, an ion accelerator for irradiating the semiconductor substrate with semiconductor self ions, an ion accelerator for irradiating the semiconductor substrate with additive ions, and a vacuum container accommodating these. An additive ion implanter for a semiconductor, which is characterized by being provided. 7. A cooling device provided in the supporting device for cooling the semiconductor substrate, a temperature measuring device for measuring the temperature of the semiconductor substrate, and a measurement result of the temperature measuring device during self-ion and additive ion implantation. The cooling device is controlled so as to keep the temperature of the semiconductor substrate higher than the temperature of liquid nitrogen and within a temperature range equal to or lower than the temperature corresponding to 15% of the melting point of the semiconductor expressed in absolute temperature. 7. A device for implanting an additive ion to a semiconductor substrate according to claim 6, further comprising: 8. A support device for supporting a semiconductor substrate, a vapor deposition device for vapor-depositing a metal for an electrode on the semiconductor substrate, an ion accelerator for irradiating the semiconductor substrate with mixing ions, a vacuum container accommodating these, and a semiconductor substrate. A cooling device provided in the supporting device for cooling the temperature of the semiconductor substrate, a temperature measuring device for measuring the temperature of the semiconductor substrate, and the temperature of the semiconductor substrate based on the measurement result of the temperature measuring device at the time of ion implantation for mixing. Control device for controlling the cooling device so that the cooling device is maintained at a constant temperature within a temperature range which is higher than the temperature of 15% and which corresponds to 15% of the melting point of the semiconductor expressed in absolute temperature. An electrode forming device for a characteristic semiconductor substrate. 9. An apparatus for implanting additive ions to a semiconductor according to claim 5 or 7, or an apparatus for forming electrodes on a semiconductor substrate according to claim 8, wherein the cooling device is a cooling device using liquid nitrogen. A semiconductor substrate heating device is further provided in addition to the cooling device, and the control device controls the semiconductor heating device instead of the cooling device so that the temperature of the semiconductor substrate is maintained at the constant temperature. .