JPH0637024A - Compound semiconductor single-crystal substrate - Google Patents

Compound semiconductor single-crystal substrate

Info

Publication number
JPH0637024A
JPH0637024A JP4033693A JP4033693A JPH0637024A JP H0637024 A JPH0637024 A JP H0637024A JP 4033693 A JP4033693 A JP 4033693A JP 4033693 A JP4033693 A JP 4033693A JP H0637024 A JPH0637024 A JP H0637024A
Authority
JP
Japan
Prior art keywords
substrate
surface roughness
wafer
measured
liquid phase
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP4033693A
Other languages
Japanese (ja)
Other versions
JP2642031B2 (en
Inventor
Tetsuya Inoue
哲也 井上
Makoto Otsuki
誠 大槻
Tetsukazu Yokota
哲一 横田
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Sumitomo Electric Industries Ltd
Original Assignee
Sumitomo Electric Industries Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
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Application filed by Sumitomo Electric Industries Ltd filed Critical Sumitomo Electric Industries Ltd
Priority to JP4033693A priority Critical patent/JP2642031B2/en
Publication of JPH0637024A publication Critical patent/JPH0637024A/en
Priority to TW083101677A priority patent/TW230822B/zh
Priority to KR1019940003946A priority patent/KR0156486B1/en
Priority to US08/400,271 priority patent/US5514903A/en
Priority to US08/451,572 priority patent/US5639299A/en
Application granted granted Critical
Publication of JP2642031B2 publication Critical patent/JP2642031B2/en
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Abstract

PURPOSE:To prevent a substrate from sliding during transportation by measuring surface roughness for a point of a specific length in every specified area on a substrate surface and limiting the measured values on a line of a specified measuring length to a specified range of values. CONSTITUTION:A GaAs single-crystal ingot, grown by a boat method, is sliced to obtain wafers of 530 pro in thickness. Each wafer is processed into a circular substrate in 76mm in dia. for liquid phase epitaxial growth. An inner diameter saw wheel having ordinary diamond abrasive grains electrodeposited is used for the slicing; however, the surface roughness is improved by improving the mechanical accuracy of each part of the slicer and further optimizing the size and shape of diamond grain. The surface roughness of a sliced wafer is measured on a line of 1mm in length in almost every area of 1cm<2> on the wafer surface. The surface roughness shall be within the range of from 1-4mum to 20mum at 50% or more of the measured points.

Description

【発明の詳細な説明】Detailed Description of the Invention

【0001】[0001]

【産業上の利用分野】この発明は液相エピタキシャル成
長に用いる化合物半導体単結晶基板に関するものであ
る。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a compound semiconductor single crystal substrate used for liquid phase epitaxial growth.

【0002】[0002]

【従来の技術】従来化合物半導体のエピタキシャル成長
用基板としては、表面を鏡面状に研磨したものが使用さ
れている。その表面の粗さは、1mm線上毎に1μm未
満が一般的である。このような鏡面状または鏡面に近い
基板は、単結晶インゴットをスライスした後必要により
円形加工し、その表面をラッピングおよび必要によりポ
リッシュ加工することにより得られる。基板の表面を鏡
面または鏡面に近い面に仕上げることは当業者において
常識とされていた。理由は、その上に成長するエピタキ
シャル層の平坦性、厚みの均一性、電気的光学的特性の
安定性等の重要な特性を損なわないためである。
2. Description of the Related Art Conventionally, a substrate having a mirror-polished surface has been used as a substrate for epitaxial growth of compound semiconductors. The surface roughness is generally less than 1 μm per 1 mm line. Such a mirror-like or near-mirror-like substrate can be obtained by slicing a single crystal ingot, then circularly processing if necessary, and lapping the surface thereof and polishing if necessary. It has been common knowledge in the art to finish the surface of the substrate to a mirror surface or a surface close to the mirror surface. The reason is that important characteristics such as flatness, thickness uniformity, and stability of electro-optical characteristics of the epitaxial layer grown thereon are not impaired.

【0003】エピタキシャル成長の方法は気相成長、液
相成長、分子線エピタキシャル成長等種々あるが、従来
どの成長手法においても鏡面または鏡面に近い表面を有
する基板が使用されている。実際に、発光ダイオード用
液相エピタキシャルウエハの基板としても、表面粗さの
粗いものを使うという発想は従来なかったということが
できる。
There are various epitaxial growth methods such as vapor phase growth, liquid phase growth, and molecular beam epitaxial growth. In any conventional growth method, a substrate having a mirror surface or a surface close to a mirror surface is used. Actually, it can be said that the idea of using a substrate having a rough surface as a substrate for a liquid phase epitaxial wafer for a light emitting diode has not been conventionally known.

【0004】[0004]

【発明が解決しようとする課題】このような従来の鏡面
状または鏡面に近い基板は、スライス、ラップ、ポリッ
シュという加工工程が必要であるため、製造に時間と手
間を要しコストが高いという問題があった。また、Ga
As基板のサイズが直径76mm、厚み600μm程度
のものでは重量が1枚当たり約14gとなり、表面が鏡
面状であると輸送の際に滑って落下しやすいという問題
もあった。この発明は上記の問題点を解決し、比較的安
価でかつ輸送の際の滑りも少ない実用的に優れた液相エ
ピタキシャル成長用化合物半導体単結晶基板を提供する
ことを目的とする。
Such a conventional mirror-like or near-mirror-like substrate requires processing steps such as slicing, lapping, and polishing, so that it takes time and labor to manufacture, and the cost is high. was there. Also, Ga
When the As substrate has a diameter of 76 mm and a thickness of about 600 μm, the weight is about 14 g per sheet, and if the surface is a mirror surface, there is a problem that the substrate slips and drops during transportation. An object of the present invention is to solve the above problems and to provide a compound semiconductor single crystal substrate for liquid phase epitaxial growth, which is relatively inexpensive and has little slippage during transportation and is excellent in practical use.

【0005】[0005]

【課題を解決するための手段】この発明の液相エピタキ
シャル成長用化合物半導体単結晶基板は、表面の粗さが
1mm線上毎に1μm以上20μm以下、好ましくは1
mm線上毎に1μm以上10μm以下であることを特徴
とする。また、その基板がGaAsであることを特徴と
する。さらに、赤外線または可視光の発光ダイオード用
エピタキシャルウエハの基板として使用されることを特
徴とする。ここで表面粗さとは、先端の曲率半径が1〜
50μmの触針を基板の表面に当てて、1mmの長さの
線上を測定したとき、この間の最高部と最低部との高さ
の差である。
The compound semiconductor single crystal substrate for liquid phase epitaxial growth according to the present invention has a surface roughness of 1 μm or more and 20 μm or less per 1 mm line, preferably 1 μm or less.
It is characterized in that it is 1 μm or more and 10 μm or less for each mm line. The substrate is GaAs. Furthermore, it is characterized by being used as a substrate of an epitaxial wafer for infrared or visible light emitting diodes. Here, the surface roughness means that the radius of curvature of the tip is 1 to
When a 50 μm stylus is applied to the surface of the substrate and a line having a length of 1 mm is measured, the height difference is between the highest part and the lowest part.

【0006】表面粗さは、基板表面上でほぼ1cm2
とに1点ずつ測定し、各測定点での測定値のうちの50
%以上が、1μm以上20μm以下好ましくは1μm以
上10μm以下である。
The surface roughness is measured on the surface of the substrate at a point of about 1 cm 2 and 50% of the values measured at each point are measured.
% Or more is 1 μm or more and 20 μm or less, preferably 1 μm or more and 10 μm or less.

【0007】[0007]

【作用】基板の表面粗さが1mm線上毎に1μm以上2
0μm以下好ましくは1μm以上10μm以下であるか
ら、製造工程においてラッピングおよびポリッシュが不
要である。したがって、製造に要する時間と手間を少な
くすることができ、比較的安価に基板を得ることが出来
る。また鏡面状の基板に比べて表面が粗いので、輸送の
際の滑りの問題も軽減される。この発明の半導体単結晶
基板は、赤外線または可視光の発光ダイオード用エピタ
キシャルウエハ、特にGaAs単結晶基板において有用
である。
[Function] Substrate surface roughness is 1 μm or more per 1 mm line 2
Since it is 0 μm or less, preferably 1 μm or more and 10 μm or less, lapping and polishing are unnecessary in the manufacturing process. Therefore, the time and effort required for manufacturing can be reduced, and the substrate can be obtained at a relatively low cost. Further, since the surface is rougher than that of the mirror-like substrate, the problem of slippage during transportation is reduced. INDUSTRIAL APPLICABILITY The semiconductor single crystal substrate of the present invention is useful as an infrared or visible light emitting diode epitaxial wafer, particularly a GaAs single crystal substrate.

【0008】これらの発光ダイオードに用いられるエピ
タキシャル層は通常10μm以上の厚みを有する。この
ような厚みを有するエピタキシャル層を液相成長法によ
って成長する場合に、基板結晶の表面は鏡面または鏡面
に近い状態である必要はないことを本発明者は見いだし
たのである。液相エピタキシャル成長法において適切な
成長条件を設定することにより、この発明の基板を効果
的に使用することが出来る。ちなみに、気相成長法や分
子線エピタキシャル成長法により成長される電子デバイ
ス用等のエピタキシャル層の厚みは10μm未満が一般
的であって、しかもこれらの成長法では基板表面の凹凸
が忠実にエピタキシャル成長層の表面に反映する傾向が
ある。したがって、気相成長法や分子線エピタキシャル
成長法には表面粗さの粗い基板を使用することは出来な
い。
The epitaxial layers used in these light emitting diodes usually have a thickness of 10 μm or more. The present inventor has found that when the epitaxial layer having such a thickness is grown by the liquid phase epitaxy method, the surface of the substrate crystal does not need to be a mirror surface or a state close to a mirror surface. The substrate of the present invention can be effectively used by setting appropriate growth conditions in the liquid phase epitaxial growth method. By the way, the thickness of an epitaxial layer for an electronic device or the like grown by a vapor phase growth method or a molecular beam epitaxial growth method is generally less than 10 μm. Tends to reflect on the surface. Therefore, a substrate having a rough surface cannot be used for the vapor phase growth method or the molecular beam epitaxial growth method.

【0009】[0009]

【実施例】【Example】

(実施例1) ボート法により成長したGaAs単結晶
インゴットをスライスして厚み530μmのウエハを切
り出した。各ウエハを直径76mmの円形に加工して液
相エピタキシャル成長用基板を得た。スライスには、通
常のダイヤモンド砥粒を電着した内周刃砥石を使用し
た。ただし、スライサ各部の機械的精度を改善するとと
もに、ダイヤモンド砥粒の粒度および形状を最適化する
ことにより、表面粗さを改善した。スライス後のウエハ
の表面粗さを、ウエハ表面のほぼ1cm2毎に1点ずつ
1mmの長さの線上で測定した。測定点のうち50%以
上で表面粗さは1〜4μmであった。表面粗さの測定結
果の一例を図1に示す。
Example 1 A GaAs single crystal ingot grown by the boat method was sliced to cut a wafer having a thickness of 530 μm. Each wafer was processed into a circle having a diameter of 76 mm to obtain a substrate for liquid phase epitaxial growth. For the slicing, an inner peripheral edge grindstone in which ordinary diamond abrasive grains were electrodeposited was used. However, the surface roughness was improved by improving the mechanical accuracy of each part of the slicer and optimizing the grain size and shape of the diamond abrasive grains. The surface roughness of the sliced wafer was measured on a line having a length of 1 mm, one point for each approximately 1 cm 2 of the wafer surface. The surface roughness was 1 to 4 μm at 50% or more of the measurement points. An example of the measurement results of the surface roughness is shown in FIG.

【0010】このGaAs単結晶基板の上に、赤外線発
光ダイオード用のSiドープGaAsエピタキシャル層
を液相成長法により形成した。エピタキシャル層の厚み
はp型層、n型層合計で180μmで、厚みの均一性は
ウエハ面内およびウエハ間で±5%以内であった。また
エピタキシャル層の表面は異常成長等のない良好な状態
であった。成長を開始する前には基板の表面をメルトバ
ックする(原料溶液中に基板表面を一部溶解させる)こ
とが好ましい。メルトバックの条件を最適化することに
よって表面が平坦で厚みの均一なエピタキシャル層を得
ることが出来る。このエピタキシャルウエハから作製し
た発光ダイオードは、良好な電気的、光学的特性を有し
ていた。
An Si-doped GaAs epitaxial layer for an infrared light emitting diode was formed on this GaAs single crystal substrate by a liquid phase growth method. The total thickness of the epitaxial layer was 180 μm for the p-type layer and the n-type layer, and the thickness uniformity was within ± 5% within the wafer surface and between the wafers. The surface of the epitaxial layer was in a good state without abnormal growth. Before the growth is started, it is preferable to melt back the surface of the substrate (partially dissolve the surface of the substrate in the raw material solution). By optimizing the meltback conditions, an epitaxial layer having a flat surface and a uniform thickness can be obtained. The light emitting diode manufactured from this epitaxial wafer had good electrical and optical characteristics.

【0011】(実施例2) ボート法により成長したG
aAs単結晶インゴットをスライスして厚み370μm
のウエハを切り出した。各ウエハを直径50mmの円形
に加工して液相エピタキシャル成長用基板を得た。スラ
イスには、通常のダイヤモンド砥粒を電着した内周刃砥
石を使用した。ただし、スライサ各部の機械的精度を改
善するとともに、ダイヤモンド砥粒の粒度および形状を
最適化することにより、表面粗さを改善した。スライス
後のウエハの表面粗さを、ウエハ表面のほぼ1cm2
に1点ずつ1mmの長さの線上で測定した。測定点のう
ち50%以上で表面粗さは5〜13μmであった。
Example 2 G grown by the boat method
Sliced aAs single crystal ingot and thickness 370μm
The wafer was cut out. Each wafer was processed into a circle having a diameter of 50 mm to obtain a substrate for liquid phase epitaxial growth. For the slicing, an inner peripheral edge grindstone in which ordinary diamond abrasive grains were electrodeposited was used. However, the surface roughness was improved by improving the mechanical accuracy of each part of the slicer and optimizing the grain size and shape of the diamond abrasive grains. The surface roughness of the sliced wafer was measured on a line having a length of 1 mm, one point for each approximately 1 cm 2 of the wafer surface. The surface roughness was 5 to 13 μm at 50% or more of the measurement points.

【0012】このGaAs単結晶基板の上に、赤外線発
光ダイオード用のSiドープGaAsエピタキシャル層
を液相成長法により形成した。エピタキシャル層の厚み
はp型層、n型層合計で180μmで、厚みの均一性は
ウエハ面内およびウエハ間で±5%以内であった。また
エピタキシャル層の表面は異常成長等のない良好な状態
であった。成長を開始する前には基板の表面をメルトバ
ックする(原料溶液中に基板表面を一部溶解させる)こ
とが好ましい。メルトバックの条件を最適化することに
よって表面が平坦で厚みの均一なエピタキシャル層を得
ることが出来る。このエピタキシャルウエハから作製し
た発光ダイオードは、良好な電気的、光学的特性を有し
ていた。
An Si-doped GaAs epitaxial layer for an infrared light emitting diode was formed on this GaAs single crystal substrate by liquid phase epitaxy. The total thickness of the epitaxial layer was 180 μm for the p-type layer and the n-type layer, and the thickness uniformity was within ± 5% within the wafer surface and between the wafers. The surface of the epitaxial layer was in a good state without abnormal growth. Before the growth is started, it is preferable to melt back the surface of the substrate (partially dissolve the surface of the substrate in the raw material solution). By optimizing the meltback conditions, an epitaxial layer having a flat surface and a uniform thickness can be obtained. The light emitting diode manufactured from this epitaxial wafer had good electrical and optical characteristics.

【0013】(実施例3) ボート法により成長したZ
nドープGaAs単結晶インゴットをスライスして厚み
600μmのウエハを切り出した。各ウエハを直径76
mmの円形に加工して液相エピタキシャル成長用基板を
得た。ウエハの表面粗さをウエハ表面のほぼ1cm2
に1点ずつ1mmの長さの線上で測定した。測定点のう
ち50%以上で表面粗さは5〜7μmであった。この基
板上に厚み10μmのAl0.65Ga0.35Asエピタキシ
ャル層を液相成長法により形成した。エピタキシャル層
の厚みの均一性はウエハ面内およびウエハ間で±3%以
内であった。またエピタキシャル層の表面は異常成長等
のない良好な状態であった。
(Example 3) Z grown by the boat method
An n-doped GaAs single crystal ingot was sliced to cut a wafer having a thickness of 600 μm. Each wafer has a diameter of 76
A substrate for liquid phase epitaxial growth was obtained by processing into a circle of mm. The surface roughness of the wafer was measured on a line having a length of 1 mm, one point for each approximately 1 cm 2 of the wafer surface. The surface roughness was 5 to 7 μm at 50% or more of the measurement points. An Al 0.65 Ga 0.35 As epitaxial layer having a thickness of 10 μm was formed on this substrate by liquid phase epitaxy. The uniformity of the thickness of the epitaxial layer was within ± 3% within the wafer surface and between the wafers. The surface of the epitaxial layer was in a good state without abnormal growth.

【0014】(実施例4) ボート法により成長したZ
nドープGaAs単結晶インゴットをスライスして厚み
370μmのウエハを切り出した。各ウエハを直径50
mmの円形に加工して液相エピタキシャル成長用基板を
得た。ウエハの表面粗さをウエハ表面のほぼ1cm2
に1点ずつ1mmの長さの線上で測定した。測定点のう
ち50%以上で表面粗さは9〜16μmであった。この
基板上に厚み10μmのAl0.65Ga0.35Asエピタキ
シャル層を液相成長法により形成した。エピタキシャル
層の厚みの均一性はウエハ面内およびウエハ間で±3%
以内であった。またエピタキシャル層の表面は異常成長
等のない良好な状態であった。
(Example 4) Z grown by the boat method
An n-doped GaAs single crystal ingot was sliced to cut a wafer having a thickness of 370 μm. 50 for each wafer
A substrate for liquid phase epitaxial growth was obtained by processing into a circle of mm. The surface roughness of the wafer was measured on a line having a length of 1 mm, one point for each approximately 1 cm 2 of the wafer surface. The surface roughness was 9 to 16 μm at 50% or more of the measurement points. An Al 0.65 Ga 0.35 As epitaxial layer having a thickness of 10 μm was formed on this substrate by liquid phase epitaxy. Epitaxial layer thickness uniformity is within ± 3% between wafer surfaces
It was within. The surface of the epitaxial layer was in a good state without abnormal growth.

【0015】上記の4つの実施例で、GaAsをエピタ
キシャル成長する場合に比べてAlGaAsを成長する
場合には基板の表面粗さは多少粗くてもよいという傾向
が見受けられた。AlGaAsの方がGaAsに比べて
成長表面が平坦になりやすいという性質によるものと推
定できる。
In the above four examples, it was found that the surface roughness of the substrate may be slightly rougher when growing AlGaAs than when epitaxially growing GaAs. It can be inferred that the growth surface of AlGaAs is flatter than that of GaAs.

【0016】(比較実験例1) 基板の表面粗さが1μ
m未満の各種のウエハについて、輸送時に落下した枚数
を調べた。表面粗さが0.2μmから2μmの間の6水
準について各1000枚のウエハを、樹脂性の先端部を
有するピンセットで保持・輸送した。結果は図2のとお
りで、表面粗さが1μm未満では3〜6枚の落下があっ
たが、1μm以上ではウエハの落下はなかった。
(Comparative Experimental Example 1) The surface roughness of the substrate is 1 μm.
With respect to various wafers of less than m, the number of wafers dropped during transportation was examined. 1000 wafers each of 6 levels having a surface roughness of 0.2 μm to 2 μm were held and transported by tweezers having a resinous tip. The results are as shown in FIG. 2. When the surface roughness was less than 1 μm, 3 to 6 sheets were dropped, but when the surface roughness was 1 μm or more, the wafer was not dropped.

【0017】(比較実験例2) 表面粗さが1μm〜3
0μmの各種のウエハを基板として用いて、厚み約20
μmのGaAsエピタキシャル層を成長させた。表面粗
さが1μmから30μmの間の10水準について各10
0枚の基板を使用し、基板の表面粗さと、成長したエピ
タキシャル層の表面異常の発生の程度との関係を調べ
た。結果は図3に示すとおりで、表面粗さが20μm以
下ではエピタキシャル層表面の異常発生は少なかった
が、20μmを越えると異常の発生が急増した。1μm
以上10μm未満の範囲では特に異常発生が少なかっ
た。
(Comparative Experimental Example 2) The surface roughness is 1 μm to 3 μm.
Using various types of 0 μm wafers as substrates, a thickness of about 20
A μm GaAs epitaxial layer was grown. 10 for each of 10 levels of surface roughness between 1 μm and 30 μm
Using 0 substrates, the relationship between the surface roughness of the substrate and the degree of occurrence of surface abnormality in the grown epitaxial layer was investigated. The results are shown in FIG. 3. When the surface roughness was 20 μm or less, the occurrence of abnormalities on the surface of the epitaxial layer was small, but when the surface roughness exceeded 20 μm, the occurrence of abnormalities increased rapidly. 1 μm
In the above range of less than 10 μm, the occurrence of abnormalities was particularly small.

【0018】[0018]

【発明の効果】この発明の化合物半導体単結晶基板は、
表面粗さが1μm以上20μm以下、好ましくは1μm
以上10μm以下であるので、製造工程においてラップ
およびポリッシュの工程が不要である。したがって基板
を輸送する際の滑りによる落下を防止できるとともに、
比較的安価に液相エピタキシャル成長用基板を提供する
ことが可能である。
The compound semiconductor single crystal substrate of the present invention is
Surface roughness is 1 μm or more and 20 μm or less, preferably 1 μm
Since it is 10 μm or less, the steps of lapping and polishing are unnecessary in the manufacturing process. Therefore, it is possible to prevent the substrate from dropping due to slippage during transportation,
It is possible to provide a liquid phase epitaxial growth substrate at a relatively low cost.

【図面の簡単な説明】[Brief description of drawings]

【図1】本発明の化合物半導体単結晶基板の表面粗さの
一例を示すグラフである。
FIG. 1 is a graph showing an example of surface roughness of a compound semiconductor single crystal substrate of the present invention.

【図2】基板の表面粗さと落下枚数の実験結果を示すグ
ラフである。
FIG. 2 is a graph showing experimental results of surface roughness of a substrate and the number of dropped substrates.

【図3】基板の表面粗さとエピタキシャル層表面の異常
発生枚数の関係を示すグラフである。
FIG. 3 is a graph showing the relationship between the surface roughness of the substrate and the number of abnormalities on the surface of the epitaxial layer.

Claims (4)

【特許請求の範囲】[Claims] 【請求項1】 基板表面のほぼ1cm2毎に1点ずつ表
面の粗さを1mm線上で測定し、各測定点での測定値の
うち50%以上が1μm以上で20μm以下の範囲にあ
ることを特徴とする液相エピタキシャル成長用化合物半
導体単結晶基板。
1. The surface roughness is measured on a line of 1 mm at every 1 cm 2 of the substrate surface, and 50% or more of the measured values at each measurement point are in the range of 1 μm or more and 20 μm or less. A compound semiconductor single crystal substrate for liquid phase epitaxial growth, characterized by:
【請求項2】 基板表面のほぼ1cm2毎に1点ずつ表
面の粗さを1mm線上で測定し、各測定点での測定値の
うち50%以上が1μm以上で10μm以下の範囲にあ
ることを特徴とする液相エピタキシャル成長用化合物半
導体単結晶基板。
2. The surface roughness is measured on a line of 1 mm for each approximately 1 cm 2 of the substrate surface, and 50% or more of the measured values at each measurement point are in the range of 1 μm or more and 10 μm or less. A compound semiconductor single crystal substrate for liquid phase epitaxial growth, characterized by:
【請求項3】 基板がGaAsであることを特徴とする
請求項1または2に記載の化合物半導体単結晶基板。
3. The compound semiconductor single crystal substrate according to claim 1, wherein the substrate is GaAs.
【請求項4】 赤外線または可視光の発光ダイオード用
エピタキシャルウエハの基板として使用される請求項3
に記載の化合物半導体単結晶基板。
4. A substrate for an epitaxial wafer for an infrared or visible light emitting diode.
The compound semiconductor single crystal substrate according to [4].
JP4033693A 1992-05-19 1993-03-02 Liquid phase epitaxial growth method of compound semiconductor and compound semiconductor single crystal substrate Expired - Lifetime JP2642031B2 (en)

Priority Applications (5)

Application Number Priority Date Filing Date Title
JP4033693A JP2642031B2 (en) 1992-05-19 1993-03-02 Liquid phase epitaxial growth method of compound semiconductor and compound semiconductor single crystal substrate
TW083101677A TW230822B (en) 1993-03-02 1994-02-28
KR1019940003946A KR0156486B1 (en) 1993-03-02 1994-03-02 Compound semiconductor single crystalline substrate for liquid phase epitaxial growth
US08/400,271 US5514903A (en) 1993-03-02 1995-03-03 Compound semiconductor single-crystalline substrate for liquid phase epitaxial growth
US08/451,572 US5639299A (en) 1993-03-02 1995-05-26 Method of making compound semiconductor single-crystalline substrate for liquid phase epitaxial growth

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
JP4-126079 1992-05-19
JP12607992 1992-05-19
JP4033693A JP2642031B2 (en) 1992-05-19 1993-03-02 Liquid phase epitaxial growth method of compound semiconductor and compound semiconductor single crystal substrate

Publications (2)

Publication Number Publication Date
JPH0637024A true JPH0637024A (en) 1994-02-10
JP2642031B2 JP2642031B2 (en) 1997-08-20

Family

ID=26379787

Family Applications (1)

Application Number Title Priority Date Filing Date
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Country Status (1)

Country Link
JP (1) JP2642031B2 (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2012500172A (en) * 2008-08-15 2012-01-05 バリアン・セミコンダクター・エクイップメント・アソシエイツ・インコーポレイテッド Sheet thickness control

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5051668A (en) * 1973-08-21 1975-05-08

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5051668A (en) * 1973-08-21 1975-05-08

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2012500172A (en) * 2008-08-15 2012-01-05 バリアン・セミコンダクター・エクイップメント・アソシエイツ・インコーポレイテッド Sheet thickness control

Also Published As

Publication number Publication date
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