JP2016074553A - Method for manufacturing group iii nitride semiconductor single crystal substrate - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a method for manufacturing a group III nitride semiconductor single crystal substrate, capable of obtaining a group III nitride semiconductor single crystal substrate having a reduced variation in in-plane crystal orientation from a group III nitride semiconductor single crystal layer grown using a group III nitride semiconductor single crystal substrate having a variation in in-plane crystal orientation as a base substrate.SOLUTION: A method for manufacturing a group III nitride semiconductor single crystal substrate comprises the steps of: forming grooves 11 in one surface of a base substrate 10 consisting of a group III nitride semiconductor single crystal; homo-epitaxially growing an epitaxial layer 12 consisting of a group III nitride semiconductor single crystal on the other surface of the base substrate 10 so as to be thicker than the base substrate 10; and cutting a group III nitride semiconductor single crystal substrate 13 out of the epitaxial layer 12.SELECTED DRAWING: Figure 2

Description

  The present invention relates to a method for producing a group III nitride semiconductor single crystal substrate.

  As a technique related to epitaxial growth of a group III nitride semiconductor crystal typified by gallium nitride, a technique for growing a group III nitride semiconductor crystal on a base substrate having a groove formed on the back surface is known (for example, Patent Documents 1 to 3). 4).

  In the technique disclosed in Patent Document 1, a notch groove serving as a fracture inducing portion is formed at a position corresponding to the position of the mask on the back surface of the base substrate on which an ELO (Epitaxial Lateral Overgrowth) growth mask is formed. Is provided. During the growth process of a GaN-based crystal, the base substrate is cracked from the fracture inducing portion to prevent warping that occurs in the entire stack, and the mask on the top surface of the base substrate ensures that the base substrate cracks reach the gallium nitride crystal. prevent.

According to the technique disclosed in Patent Document 2, a stripe-shaped groove is formed on the back surface of the base substrate, and Al _x Ga _y In _z N (x + y + z = 1, x is formed on the base substrate while heating the base substrate from the back surface. , Y, z ≧ 0) by growing the crystal, the distribution of dislocation density in the Al _x Ga _y In _z N crystal can be controlled according to the groove pattern on the back surface of the base substrate.

  According to the technique disclosed in Patent Document 3, grooves are formed at a predetermined interval on the back surface of a base substrate having a linear expansion coefficient different from that of the GaN-based crystal, and the GaN-based crystal is grown on the base substrate, thereby The stress caused by the difference in the linear expansion coefficient between the GaN-based crystal and the GaN-based crystal can be relaxed, and the warpage and cracking of the GaN-based crystal can be prevented.

  In the technique disclosed in Patent Document 4, a groove is formed along the cleavage direction on the back surface of a base substrate such as a sapphire substrate, and a nitride semiconductor crystal is grown on the base substrate. When the nitride semiconductor crystal is peeled from the base substrate, the base substrate is cleaved along the groove on the back surface, so that the impact accompanying the peeling can be absorbed and damage to the nitride semiconductor crystal can be prevented.

Japanese Patent Laid-Open No. 11-40849 JP 2001-261500 A JP 2004-273964 A JP 2008-308346 A

  One of the objects of the present invention is that a variation in in-plane crystal orientation is generated from a group III nitride semiconductor single crystal layer grown using a group III nitride semiconductor single crystal substrate having in-plane crystal orientation variation as a base substrate. It is an object of the present invention to provide a method for producing a group III nitride semiconductor single crystal substrate capable of obtaining a reduced group III nitride semiconductor single crystal substrate.

  In order to achieve the above object, one embodiment of the present invention provides a method for producing a group III nitride semiconductor single crystal substrate of [1] to [9].

[1] A step of forming a groove on one surface of a base substrate made of a group III nitride semiconductor single crystal, and an epitaxial layer made of a group III nitride semiconductor single crystal on the other surface of the base substrate A method for producing a group III nitride semiconductor single crystal substrate, comprising: homoepitaxial growth thicker than the substrate; and a step of cutting out a group III nitride semiconductor single crystal substrate from the epitaxial layer.

[2] The group III nitride semiconductor single layer according to [1], wherein the base substrate is a substrate obtained by processing a group III nitride semiconductor single crystal layer heteroepitaxially grown on a heterogeneous substrate by HVPE. A method for producing a crystal substrate.

[3] The III according to [1] or [2], wherein a difference between a maximum value and a minimum value of an angle between the c-axis and the surface of the base substrate in the plane of the base substrate is 0.1 ° or more. A method for manufacturing a group nitride semiconductor single crystal substrate.

[4] The method for producing a group III nitride semiconductor single crystal substrate according to any one of [1] to [3], wherein the epitaxial layer is grown to be thicker than twice the thickness of the base substrate.

[5] The difference between the maximum value and the minimum value of the angle between the c-axis and the surface of the group III nitride semiconductor single crystal substrate in the plane of the cut group III nitride semiconductor single crystal substrate is less than 0.1 ° The method for producing a group III nitride semiconductor single crystal substrate according to any one of [1] to [4].

[6] The other surface of the base substrate is a c-plane or a surface inclined at an angle within 5 ° from the c-plane, and the groove pattern is rotationally symmetric with the central axis of the base substrate as an axis of symmetry. The method for producing a group III nitride semiconductor single crystal substrate according to any one of [1] to [5], comprising:

[7] The groove pattern is composed of a line parallel to the a-axis or m-axis of the base substrate, and has three or six-fold rotational symmetry with the central axis of the base substrate as an axis of symmetry. 6] The method for producing a group III nitride semiconductor single crystal substrate according to [6].

[8] The group III nitride according to any one of [1] to [7], wherein a pitch of grooves in the same direction among the plurality of linear grooves constituting the groove is 100 μm or more and 10 mm or less. A method for manufacturing a semiconductor single crystal substrate.

[9] The group III nitride semiconductor unit according to any one of [1] to [8], wherein a warp in which the one surface is a concave surface occurs in the base substrate while the epitaxial layer is homoepitaxially grown. A method for producing a crystal substrate.

  According to the present invention, in-plane crystal orientation variation is reduced from a group III nitride semiconductor single crystal layer grown as a base substrate having a group III nitride semiconductor single crystal substrate having in-plane crystal orientation variation. A method for producing a group III nitride semiconductor single crystal substrate capable of obtaining a group III nitride semiconductor single crystal substrate can be provided.

1 (a) to 1 (c) show a process of forming a group III nitride semiconductor single crystal substrate having in-plane variation in crystal orientation, and a conventional group III nitride semiconductor single crystal substrate as a base substrate. 3 is a cross-sectional view schematically showing a process of growing a group III nitride semiconductor single crystal having in-plane crystal orientation variations by the method of FIG. FIGS. 2A to 2C are vertical sectional views schematically showing the manufacturing process of the group III nitride semiconductor single crystal substrate according to the first embodiment. FIGS. 3A, 3B, and 3C are plan views each showing an example of the pattern of the grooves 11 formed on the back surface of the base substrate.

Embodiment
According to the present embodiment, in-plane crystal orientation variations are reduced from a group III nitride semiconductor single crystal grown as a base substrate using a group III nitride semiconductor single crystal substrate having in-plane crystal orientation variations. In addition, a group III nitride semiconductor single crystal substrate can be obtained.

  1 (a) to 1 (c) show a process of forming a group III nitride semiconductor single crystal substrate having in-plane variation in crystal orientation, and a conventional group III nitride semiconductor single crystal substrate as a base substrate. 3 is a cross-sectional view schematically showing a process of growing a group III nitride semiconductor single crystal having in-plane crystal orientation variations by the method of FIG.

  FIG. 1A is a vertical sectional view schematically showing a state of a plate-like group III nitride semiconductor single crystal 1 grown on a different substrate. An arrow in FIG. 1A schematically represents the direction of the c-axis of the group III nitride semiconductor single crystal 1. As shown in FIG. 1A, the group III nitride semiconductor single crystal 1 has a warp, and its crystal orientation varies in the plane.

Here, the group III nitride semiconductor is a substance represented by a composition formula In _x Al _y Ga _(1-xy) N (0 ≦ x ≦ 1, 0 ≦ y ≦ 1, 0 ≦ x + y ≦ 1). Say. Further, the heterogeneous substrate refers to a substrate made of a material different from the group III nitride semiconductor single crystal.

  Unlike the III-V group compound semiconductor single crystal represented by GaAs, the III nitride semiconductor single crystal is difficult to grow a bulk crystal from the melt. For this reason, almost all Group III nitride semiconductor single crystal substrates in practical use are manufactured using Group III nitride semiconductor single crystals heteroepitaxially grown on heterogeneous substrates made of sapphire, Si or GaAs as starting crystals. ing.

  When a nitride semiconductor single crystal is heteroepitaxially grown on a heterogeneous substrate, crystal cooling during or after crystal growth is caused by a difference in lattice constant or linear expansion coefficient between the heterogeneous substrate and the nitride semiconductor single crystal. In the middle, the nitride semiconductor single crystal is warped. This warpage generally occurs so that the nitride semiconductor single crystal becomes concave toward the crystal growth direction.

  Further, when a nitride semiconductor single crystal is heteroepitaxially grown on a heterogeneous substrate by MOCVD (Metal Organic Chemical Vapor Deposition) method or HVPE (Hydride Vapor Phase Epitaxy) method, Growth proceeds in a three-dimensional island growth mode. Here, the initial growth nuclei of the crystal generated in an island shape are enlarged and associated, and in the process of finally flattening the crystal surface, distortion occurs in the crystal, and thus warps the crystal. A mechanism is suggested. Then, variation in crystal orientation corresponding to the warp (nonuniform distribution of tilt of crystal orientation) occurs inside the crystal.

  FIG. 1B is a vertical cross-sectional view of a group III nitride semiconductor single crystal substrate 2 obtained from the group III nitride semiconductor single crystal 1. The group III nitride semiconductor single crystal substrate 2 is obtained by polishing and planarizing the surface of the warped plate-like group III nitride semiconductor single crystal 1.

  As shown by the arrow in FIG. 1B, even if the surface of the group III nitride semiconductor single crystal 1 is flattened, the variation in crystal orientation does not change and remains in the group III nitride semiconductor single crystal substrate 2.

  FIG. 1C is a vertical sectional view of a group III nitride semiconductor single crystal layer 20 that is homoepitaxially grown using the group III nitride semiconductor single crystal substrate 2 as a base substrate.

  The group III nitride semiconductor single crystal layer 20 inherits the variation in crystal orientation remaining in the group III nitride semiconductor single crystal substrate 2. Therefore, the group III nitride semiconductor single crystal substrate cut out from group III nitride semiconductor single crystal layer 20 has variations in crystal orientation. When various semiconductor devices are manufactured using a group III nitride semiconductor single crystal substrate having such crystal orientation variations, variations in characteristics between the devices occur.

  In addition, since a stress is generated in the growing group III nitride semiconductor single crystal layer 20 to return the crystal orientation to the normal distribution form, the variation in crystal orientation is gradually reduced as the growth proceeds. As a result, stress remains in the group III nitride semiconductor single crystal layer 20. The stress remaining in the group III nitride semiconductor single crystal layer 20 causes frequent cracks when the group III nitride semiconductor single crystal layer 20 is subjected to slicing or polishing, and extremely reduces the manufacturing yield of the substrate. .

  Therefore, in the present embodiment, variation in crystal orientation of a group III nitride semiconductor single crystal layer homoepitaxially grown on a group III nitride semiconductor single crystal substrate having variation in crystal orientation is reduced, and distortion remains. By suppressing the above, a method for producing a group III nitride semiconductor single crystal substrate with little variation in crystal orientation with high yield is provided.

  FIGS. 2A to 2C are vertical sectional views schematically showing the manufacturing process of the group III nitride semiconductor single crystal substrate 13 according to the first embodiment. The arrows shown in FIGS. 2A to 2C indicate the c-axis direction of each crystal.

  First, as shown in FIG. 2A, the groove 11 is formed on the back surface of the base substrate 10 made of a group III nitride semiconductor single crystal. Next, as shown in FIG. 2B, an epitaxial layer 12 made of a group III nitride semiconductor single crystal is homoepitaxially grown on the surface of the base substrate 10. Next, as shown in FIG. 2C, the group III nitride semiconductor single crystal substrate 13 is cut out from the grown epitaxial layer 12. Hereinafter, details of each of these steps will be described.

  In the step shown in FIG. 2A, first, a base substrate 10 made of a III nitride semiconductor single crystal is prepared. The base substrate 10 is a substrate cut out from a III nitride semiconductor single crystal layer having a variation in crystal orientation heteroepitaxially grown on a heterogeneous substrate, and as indicated by an arrow in the c-axis direction in FIG. There is variation in crystal orientation.

  Specifically, the base substrate 10 is formed, for example, by growing a group III nitride semiconductor single crystal on a heterogeneous substrate such as a sapphire substrate by a HVPE method or the like, and then peeling from the heterogeneous substrate so that the front and back surfaces are mirror surfaces. It is produced by processing. Such a manufacturing method is described in, for example, Japanese Patent No. 3631724.

  For example, the base substrate 10 is a self-supporting substrate having a diameter of 58 mm and a thickness of 400 μm. If the thickness is too small, cracking may occur at the time of handling, at the time of forming the groove 11, at the time of raising the temperature when growing the epitaxial layer 12, etc. For example, the thickness when the diameter is 50 mm is 300 μm. The above is preferable.

  The group III nitride semiconductor single crystal constituting base substrate 10 may be an undoped crystal or a crystal doped with impurities. When the epitaxial layer 12 doped with impurities is grown on the base substrate 10, the base substrate 10 preferably contains the same impurity having the same concentration as the epitaxial layer 12. If only one of them contains impurities, or if both contain different impurities, or if the impurity concentration difference is large, there is a possibility that crystal defects or cracks may occur in the growing epitaxial layer 12.

  In the case where the base substrate 10 is a substrate cut from a group III nitride semiconductor single crystal formed by a HVPE method on a dissimilar substrate, variation in crystal orientation in the base substrate 10 becomes large. The form is particularly effective. In particular, when the difference between the maximum value and the minimum value of the angle between the c-axis and the surface of the base substrate 10 in the plane of the base substrate 10 is 0.1 ° or more, the effect of the present embodiment is remarkably obtained. It is done.

  Next, the groove 11 is formed on the back surface of the base substrate 10. A commercially available laser beam machine, dicer, electric discharge machine or the like can be used to form the groove 11, but a thin groove can be machined with high positional accuracy and damage to the group III nitride semiconductor single crystal. Therefore, it is preferable to use a laser processing machine. For example, a laser beam machine having a wavelength of 532 nm, 355 nm, 266 nm, 213 nm or the like using the harmonics of a commercially available Nd: YAG laser can be used.

  After the grooves 11 are formed by the laser processing machine, powdery processing scraps of a group III nitride semiconductor may adhere inside or around the grooves 11. In order to remove this, it is preferable to ultrasonically clean the base substrate 10 after forming the grooves 11 in an organic solvent or pure water.

  Similar to the group III nitride semiconductor single crystal layer 20 grown on the group III nitride semiconductor single crystal substrate 2 described above, when the epitaxial layer 12 is homoepitaxially grown on the underlying substrate 10 having a variation in crystal orientation, A stress is generated in the epitaxial layer 12 to repair the crystal orientation variation. At this time, the groove 11 on the back surface of the base substrate 10 assists the deformation of the base substrate 10, warping occurs in the base substrate 10 and the epitaxial layer 12 so that the back surface is concave, and variations in crystal orientation of the epitaxial layer 12 are alleviated. The

  Here, the base substrate 10 is a substrate obtained by polishing a warped c-plane substrate grown on a heterogeneous substrate, and thus has approximately six-fold symmetry anisotropy with the central axis as the symmetry axis. . For this reason, in order to deform the base substrate 10 more efficiently by the stress generated in the epitaxial layer 12, the pattern of the groove 11 has rotational symmetry with the central axis of the base substrate 10 as the symmetry axis. Is preferable, and it is more preferable to have three or six rotational symmetry with the central axis of the base substrate 10 as the axis of symmetry.

  FIGS. 3A, 3 </ b> B, and 3 </ b> C are plan views illustrating examples of patterns of the grooves 11 formed on the back surface of the base substrate 10. 3A, 3B, and 3C are plan views in the case where the base substrate 10 has a c-plane, and the c-axis of the base substrate 10 is oriented perpendicular to the paper surface.

  The grooves 11 shown in FIG. 3A have a lattice pattern in which equilateral triangles are arranged. When the groove 11 is formed so that the center of one equilateral triangle included in the lattice pattern is located on the central axis of the base substrate 10, the pattern of the groove 11 shown in FIG. Has three-fold rotational symmetry with the central axis of the base substrate 10 as the axis of symmetry. When the grooves 11 are formed so that the vertices of equilateral triangles are located on the central axis of the base substrate 10, the pattern of the grooves 11 shown in FIG. 3A is symmetric with respect to the central axis of the base substrate 10. Has 6-fold rotational symmetry.

  The grooves 11 shown in FIG. 3B have a lattice pattern in which regular hexagons and regular triangles are arranged. When the grooves 11 are formed so that the center of one regular hexagon included in the lattice pattern is located on the central axis of the base substrate 10, the pattern of the grooves 11 shown in FIG. Has six-fold rotational symmetry with the central axis of the base substrate 10 as the axis of symmetry. When the groove 11 is formed so that the center of the equilateral triangle is located on the central axis of the base substrate 10, the pattern of the groove 11 shown in FIG. It has three-fold rotational symmetry as an axis.

  The grooves 11 shown in FIG. 3C have a lattice pattern in which regular hexagons are arranged. When the groove 11 is formed so that the center of one regular hexagon included in the lattice pattern is located on the central axis of the base substrate 10, the pattern of the groove 11 shown in FIG. Has six-fold rotational symmetry with the central axis of the base substrate 10 as the axis of symmetry. When the groove 11 is formed so that the regular hexagonal apex is positioned on the central axis of the base substrate 10, the pattern of the groove 11 shown in FIG. It has three-fold rotational symmetry as an axis.

  The pattern of the groove 11 shown in FIGS. 3A, 3B, and 3C is configured by a combination of lines parallel to the a-axis of the base substrate 10 (perpendicular to the m-axis). For example, it may be configured by a combination of lines parallel to the m-axis (perpendicular to the a-axis). Moreover, as an example of the pattern of the other groove | channel 11, the rhombus lattice pattern, the concentric pattern, the radial pattern, the pattern which combined them, etc. can be considered.

  Of the plurality of linear grooves constituting the groove 13, the distance (pitch) between the centers of the grooves in the same direction is preferably 100 μm or more and 10 mm or less. If the pitch is narrower than 100 μm, the base substrate 10 may break during the growth of the epitaxial layer 12, which may adversely affect the quality of the epitaxial layer 12. On the other hand, if the pitch is wider than 10 mm, the deformation of the base substrate 10 during the growth of the epitaxial layer 12 may be reduced. For example, the width of the straight groove constituting the groove 13 can be 40 μm, the depth can be 60 μm, and the pitch can be 1 mm.

  Moreover, it is preferable that the width | variety of the some linear groove | channel which comprises the groove | channel 13 is 10 micrometers or more and 200 micrometers or less. If the width of the groove is smaller than 10 μm, the deformation (deflection) of the base substrate 10 may not be sufficiently assisted. On the other hand, if the width of the groove is larger than 200 μm, the temperature distribution of the underlying substrate 10 during the growth of the epitaxial layer 12 becomes uneven, which may hinder uniform crystal growth.

  The depth of the plurality of linear grooves constituting the groove 13 is preferably 50 μm or more and T−200 μm or less, where T is the thickness of the base substrate 10. If the groove depth is smaller than 50 μm, the deformation of the base substrate 10 may not be sufficiently assisted. On the other hand, if the groove depth is larger than T-200 μm, cracks may occur at the bottom of the groove 13 of the base substrate 10.

  Moreover, the groove | channel 11 may be comprised by the aggregate | assembly of a discontinuous groove | channel, for example, many holes, instead of a continuous groove | channel. Further, the width and depth of the groove 11 may be changed within the substrate surface. Furthermore, grooves can be formed not only on the back surface of the base substrate 10 but also on the front surface (surface on which the epitaxial layer 12 is grown).

  Next, as shown in FIG. 2B, the epitaxial layer 12 is thickly epitaxially grown on the surface of the base substrate 10 in which the grooves 11 are formed on the back surface. As the growth of the epitaxial layer 12 proceeds, the base substrate 10 and the epitaxial layer 12 are deformed as described above, and the variation in crystal orientation in the epitaxial layer 12 is alleviated.

  In order to grow the epitaxial layer 12 thick, it is preferable to use the HVPE method having a high crystal growth rate. Further, in the HVPE method, since the reactor having a hot wall structure is used, the base substrate 10 and the epitaxial layer 12 are heated from the entire circumference. For this reason, even in the base substrate 10 in which the grooves 11 are formed, temperature distribution in the substrate surface during crystal growth is unlikely to occur, and a uniform epitaxial layer 12 is easily grown.

  Regarding the growth technique of the group III nitride semiconductor single crystal by the HVPE method, for example, Japanese Patent No. 3535583 discloses a growth technique of the GaN single crystal by the HVPE method. Japanese Patent No. 3279528 discloses a technique of doping Si when growing a GaN single crystal by the HVPE method.

  Further, the epitaxial layer 12 may be grown by a liquid phase growth method such as a flux method or an ammonothermal method.

  In order to effectively deform the base substrate 10 due to stress generated during the growth of the epitaxial layer 12, it is required to grow the epitaxial layer 12 thicker than the base substrate 10. Furthermore, in order to more effectively deform the base substrate 10 and alleviate the variation in crystal orientation in the epitaxial layer 12, the epitaxial layer 12 is grown to a thickness of twice or more the thickness of the base substrate 10. It is preferable to grow it to a thickness of 10 times or more.

  When the thickness of the epitaxial layer 12 exceeds twice the thickness of the base substrate 10, the deformation rate of the base substrate 10 gradually decreases, and when it exceeds 10 times the thickness of the base substrate 10, the base substrate 10. The deformation of ceases and the effect of relaxing the variation in crystal orientation is saturated. However, by further increasing the thickness, the crystal defect (dislocation) density can be reduced, and the number of obtained group III nitride semiconductor single crystal substrates 13 from the epitaxial layer 12 can be increased.

The epitaxial layer 12 is, for example, a Si-doped gallium nitride single crystal layer having a thickness of 5 mm. The group III nitride semiconductor single crystal constituting the epitaxial layer 12 may be an undoped crystal or a crystal doped with impurities. When various devices are manufactured using the epitaxial layer 12, it may be required to intentionally dope the epitaxial layer 12 with impurities in order to control conductivity. As impurities doped into the epitaxial layer 12, Si, S, Se, Ge, O, Fe, Mg, Zn or the like is often used. In addition, when the epitaxial layer 12 is doped with impurities, the impurity concentration in the epitaxial layer 12 is usually 5 × 10 ¹⁷ cm ⁻³ or more, and in the case of being large, it is 1 × 10 ¹⁸ cm ⁻³ or more.

  Next, as shown in FIG. 2C, the group III nitride semiconductor single crystal substrate 13 is cut out from the epitaxial layer 12.

  For example, six Group III nitride semiconductor single crystal substrates 13 having a thickness of 500 μm are cut out from the epitaxial layer 12 having a thickness of 5 mm. Then, chamfering is performed on the outer peripheral portion of the cut group III nitride semiconductor single crystal substrate 13, and mirror polishing is performed on the front and back surfaces to finally finish the substrate with a diameter of 50.8 mm and a thickness of 400 μm.

  For cutting the epitaxial layer 12, a multi-wire saw generally used for cutting Si or GaAs crystals can be used. For example, JP2013-032278A discloses a cutting technique using a multi-wire saw of a GaN single crystal that is a group III nitride semiconductor single crystal. In addition, a cutting technique using an inner peripheral blade slicer, an outer peripheral blade slicer, a wire electric discharge machine, or the like can be used for cutting the epitaxial layer 12. Since the surface of the group III nitride semiconductor single crystal substrate 13 cut out using these cutting techniques generally has saw marks and processing strains in many cases, the polishing process for removing these is performed on the front and back surfaces. It is preferable to apply.

  In addition, in order to suppress cracking of the epitaxial layer 12 when the group III nitride semiconductor single crystal substrate 13 is cut out, a region having a thickness of 5 mm or more of the crystal outer peripheral portion including the non-c-plane growth region is removed prior to the cutting process. It is preferable to do. When the epitaxial layer 12 having a c-plane surface is grown, the surface of the epitaxial layer 12 also becomes the c-plane, but an inclined surface (non-c-plane growth region) that is not the c-plane is formed in the boundary region between the surface and the side surface. . This non-c-plane growth region is known to have a difference in impurity atom incorporation efficiency compared to a region where the growth interface grows on the c-plane, and the interface between the non-c-plane growth region and the c-plane growth region In the vicinity, distortion due to the difference in impurity concentration in each region occurs. For this reason, prior to the step of cutting the group III nitride semiconductor single crystal substrate 13 from the epitaxial layer 12, it is possible to remove the regions having different impurity concentrations and the strain-accumulated regions on the outer periphery of the crystal to have uniform in-plane characteristics This is effective for obtaining a group III nitride semiconductor single crystal substrate 13 having high properties, and is effective for preventing the occurrence of cracks when slicing the epitaxial layer 12. By removing the region of the outer peripheral portion of the epitaxial layer 12 having a thickness of 5 mm or more, the strain accumulated region can be effectively removed. As a method for removing the outer peripheral portion of the epitaxial layer 12, a method such as grinding or electric discharge machining can be used. When removing a region having a thickness of 5 mm or more on the outer peripheral portion of the epitaxial layer 12, it is required to use the base substrate 10 having a diameter 10 mm or more larger than the diameter of the group III nitride semiconductor single crystal substrate 13. For example, the technique disclosed in International Application No. PCT / JP2014 / 051806 can be used to remove such a crystal outer periphery.

  As described above, a plurality of group III nitride semiconductor single crystal substrates 13 can be cut out from the epitaxial layer 12. Further, the group III nitride semiconductor single crystal substrate 13 with an offset angle can be easily obtained by intentionally inclining and cutting the cut surface from a plane perpendicular to the crystal growth orientation. In order to obtain a group III nitride semiconductor single crystal substrate 13 with an offset angle, it is possible to use a base substrate 10 with an offset angle, but considering the symmetry of the epitaxial layer 12 during growth, The epitaxial layer 12 is preferably grown on the c-plane on the underlying substrate 10 having the c-plane as the main surface. In addition, after the epitaxial layer 12 grown on the c-plane is cut at the c-plane, it can be processed obliquely in the polishing step to give an offset angle. However, a large processing cost is required for the epitaxial layer 12. ineffective. If the epitaxial layer 12 grown on the c-plane is cut obliquely, a plurality of group III nitride semiconductor single crystal substrates 13 having an offset angle can be cut out from one epitaxial layer 12 according to demand, and the waste of crystals can be reduced. Does not appear. In this case, cutting a plurality of group III nitride semiconductor single crystal substrates 13 in parallel from one epitaxial layer 12 is the least wasteful method, but the angle of cutting can be changed for each substrate as necessary. It is. For example, it is also possible to use a method in which a group III nitride semiconductor single crystal substrate 13 used as a seed crystal from the epitaxial layer 12 is cut out at the c-plane and then the remaining portion is sliced with an offset angle. is there.

  Further, when the group III nitride semiconductor single crystal substrate 13 having the upper surface (as-grown growth interface) of the epitaxial layer 12 in an unpolished state is cut out and used as a seed crystal for the next crystal growth, waste of material due to polishing is lost. Can be suppressed. In addition, since the uneven shape of the as-grown growth interface is a shape unique to the crystal growth furnace and has reproducibility, the crystallinity can be obtained by using the group III nitride semiconductor single crystal substrate 13 having the as-grown growth interface as a seed crystal. High homoepitaxial growth can be realized.

  Since the group III nitride semiconductor single crystal substrate 13 is cut out from the epitaxial layer 12 in which the variation in crystal orientation is relaxed in the step shown in FIG. 2B, the variation in crystal orientation is significantly smaller than that of the base substrate 10. It has become. Further, according to the present embodiment, the difference between the maximum value and the minimum value of the angle between the c-axis and the substrate surface in the substrate plane can be made less than 0.1 °.

  2B, since the residual stress in the epitaxial layer 12 is reduced, cracks in the slice processing of the epitaxial layer 12 and the polishing processing of the group III nitride semiconductor single crystal substrate 13 are achieved. And cracking are suppressed, and the processing yield is improved.

  As shown in FIG. 2B, the base substrate 10 after the epitaxial layer 12 is grown is warped. However, this warpage is elastic deformation, and after cutting the group III nitride semiconductor single crystal substrate 13 from the epitaxial layer 12, the external force received from the epitaxial layer 12 disappears and returns to the original flat state. Therefore, the base substrate 10 can be used repeatedly by applying a mirror finish to the surface.

(Effect of embodiment)
According to the above embodiment, the variation in crystal orientation of the group III nitride semiconductor single crystal layer homoepitaxially grown on the group III nitride semiconductor single crystal substrate having the variation in crystal orientation is reduced, and the residual strain is reduced. By suppressing, a group III nitride semiconductor single crystal substrate with little variation in crystal orientation can be manufactured with high yield.

  In addition, according to the conventional method, a large-diameter group III nitride semiconductor single crystal substrate having a diameter of 75 mm or more can be manufactured with good yield, which has a large variation in crystal position or is easily cracked and has a low production yield. Further, a group III nitride semiconductor single crystal substrate having a diameter of 100 mm or more, and a group III nitride semiconductor single crystal substrate having a diameter of 150 mm or more can be obtained.

  If a group III nitride semiconductor single crystal substrate with little variation in crystal orientation is obtained, variation in characteristics of devices fabricated thereon is reduced, and device manufacturing yield is improved. Moreover, since the residual stress is reduced in the group III nitride semiconductor single crystal substrate obtained by this Embodiment, generation | occurrence | production of the crack in a device manufacturing process can be suppressed significantly.

  Since the group III nitride semiconductor single crystal substrate obtained by the present embodiment is cut out from a homoepitaxially grown crystal, a conventional substrate cut out from a heteroepitaxially grown crystal by a growth method using a mask typified by the ELO method. Compared with the above, the dislocation density in the substrate surface is low, and the defect density such as dislocations and the variation in the in-plane distribution of electrical characteristics are small.

  This embodiment can be carried out using a conventional crystal growth technique and processing technique, and the cost burden for the obtained effect is very small.

  The results of manufacturing and evaluating a group III nitride semiconductor single crystal substrate based on the above embodiment will be described below.

(Example)
First, a gallium nitride single crystal c-plane substrate having a diameter of 65 mm and a thickness of 400 μm prepared by a VAS (Void-Assisted Separation) method was prepared as the base substrate 10. The angle formed by the c-axis and the substrate surface at the center of the gallium nitride single crystal substrate in advance was measured by an X-ray diffraction method and found to be 0.04 °. The same measurement was performed at a total of 8 points in increments of ± 5 mm from the center on the diameter of the gallium nitride single crystal substrate, and when the dispersion of the measurement results at 9 points was examined, the variation was large and the maximum value And the difference between the minimum values was 0.54 °.

Next, a groove 11 was formed on the N face side of the gallium nitride single crystal substrate. For the formation of the groove 11, a YVO ₄ pulse laser processing machine having a commercially available wavelength of 532 nm and a rated output of 5 W was used. The pattern of the grooves 11 was as shown in FIG. The width of the linear groove constituting the groove 11 was 40 μm, the depth was 60 μm, and the pitch (distance between the centers of adjacent linear grooves) was 1 mm. Thereafter, in order to remove dirt during groove processing, the gallium nitride single crystal substrate was thoroughly washed with flowing pure water, ultrasonically washed in methyl alcohol, and then dried.

  Next, a Si-doped gallium nitride single crystal having a thickness of 5 mm as the epitaxial layer 12 was homoepitaxially grown on the Ga surface of the gallium nitride single crystal substrate by the HVPE method.

This Si-doped gallium nitride single crystal uses GaCl and NH ₃ produced by bringing HCl gas into contact with metal Ga heated to 800 ° C. as a source gas, and SiH ₂ Cl ₂ gas diluted with hydrogen as a dopant gas. It was supplied and grown on a gallium nitride single crystal substrate heated to 1050 ° C. The furnace pressure during growth was normal pressure, the carrier gas composition was 50% nitrogen and 50% hydrogen, and the V / III ratio of the source gas was 4. During the growth, the gallium nitride single crystal substrate was rotated at 5 rpm, and the crystal growth rate was 250 to 300 μm / h. The target carrier concentration of the grown crystal was 2 × 10 ¹⁸ cm ⁻³ .

  When the Si-doped gallium nitride single crystal thus grown was taken out of the furnace after cooling, it was confirmed that the gallium nitride single crystal had a thickness of about 5.0 mm at the center. From the appearance, it can be seen that the back side of the gallium nitride single crystal substrate as the base substrate 10 is warped concavely, but there is no appearance of cracks or abnormal growth, and the ungrown regions and pits are also seen. I couldn't.

  Next, a gallium nitride single crystal substrate as a group III nitride semiconductor single crystal substrate 13 was cut out from the Si-doped gallium nitride single crystal having a thickness of about 5.0 mm as the obtained epitaxial layer 12.

  First, prior to cutting, the outer peripheral portion of the Si-doped gallium nitride single crystal was ground and removed using a cup-type diamond electrodeposition grindstone having an inner diameter of 52 mm. Next, the Si-doped gallium nitride single crystal having an outer diameter of 52 mm is attached to a pedestal for slicing and cut perpendicularly to the crystal growth direction using a multi-wire saw, and the gallium nitride single crystal substrate having a thickness of about 500 μm Acquired. In the process of removing and cutting the periphery of the crystal, no crack was generated in the crystal, and thus six gallium nitride single crystal substrates were obtained.

  Thereafter, an orientation flat (OF) and an index flat (IF) were formed on the outer periphery of the gallium nitride single crystal substrate using a beveling apparatus, and chamfered and shaped to give a diameter of 50.8 mm. Furthermore, lapping and polishing were performed on the front and back surfaces, and finally a mirror-finished substrate having a thickness of 400 μm was finished. Even in the polishing process, no defects such as cracks were found in the gallium nitride single crystal substrate.

  The angle formed by the c-axis and the substrate surface at the center of the gallium nitride single crystal substrate as the group III nitride semiconductor single crystal substrate 13 thus obtained was 0.04 °. Further, on the diameter of this gallium nitride single crystal substrate, the same measurement was performed at a total of 8 points in increments of ± 5 mm from the center, and when the dispersion of the measurement results of 9 points was examined, the dispersion was very small. The difference between the maximum value and the minimum value was 0.08 °.

Furthermore, when the dislocation density of this gallium nitride single crystal substrate was evaluated by the dark spot density observed by the cathodoluminescence method, the average value of 9 points in the plane was 9.7 × 10 ⁵ cm ⁻² .

(Comparative example)
First, a gallium nitride single crystal substrate manufactured under the same conditions as in the above example was prepared as a base substrate. The angle formed by the c-axis and the substrate surface at the center of the gallium nitride single crystal substrate in advance was measured by the X-ray diffraction method and found to be 0.04 °, which was the same as that of the example. However, when the same measurement was performed at a total of 8 points in increments of ± 5 mm from the center on the diameter of the gallium nitride single crystal substrate, and the variation in the measurement results at 9 points was examined, the difference between the maximum value and the minimum value was Was 0.52 °, which was almost the same as that of the example.

  Next, without forming the grooves 11 in the gallium nitride single crystal substrate, a Si-doped gallium nitride single crystal layer having a thickness of 5 mm was grown on the Ga surface under the same conditions as in the above example.

  When the grown Si-doped gallium nitride single crystal was taken out of the furnace and observed after cooling, it was observed that the back side of the gallium nitride single crystal substrate as the underlying substrate was warped, but the degree of warpage was It was considerably less than the examples. In addition, no cracks or abnormal growth was observed, and no ungrown regions or pits were observed.

  Next, the outer peripheral portion of the Si-doped gallium nitride single crystal was removed, sliced, and polished under the same conditions as in the example, and six gallium nitride single crystal substrates were obtained.

  When the angle formed by the c-axis and the substrate surface at the center of the substrate thus obtained was examined by X-ray diffraction, it was 0.04 °. Further, on the diameter of this gallium nitride single crystal substrate, the same measurement was performed for a total of 8 points in increments of ± 5 mm from the center, and when the variation of the measurement results of the total 9 points was examined, the variation was Although much improved over the gallium nitride single crystal substrate, the difference between the maximum value and the minimum value was 0.38 °.

  Although the embodiments and examples of the present invention have been described above, the present invention is not limited to the above-described embodiments and examples, and various modifications can be made without departing from the spirit of the invention.

  For example, instead of the epitaxial layer 12 for cutting out the group III nitride semiconductor single crystal substrate 13, a multilayer structure of a nitride semiconductor single crystal for device fabrication may be epitaxially grown.

  The embodiments and examples described above do not limit the invention according to the claims. It should be noted that not all combinations of features described in the embodiments and examples are necessarily essential to the means for solving the problems of the invention.

10 Substrate 11 Groove 12 Epitaxial Layer 13 Group III Nitride Semiconductor Single Crystal Substrate

Claims (9)

Forming a groove on one surface of a base substrate made of a group III nitride semiconductor single crystal;
Homoepitaxially growing an epitaxial layer made of a group III nitride semiconductor single crystal on the other surface of the base substrate to be thicker than the base substrate;
Cutting a group III nitride semiconductor single crystal substrate from the epitaxial layer;
A method for producing a group III nitride semiconductor single crystal substrate, comprising: The base substrate is a substrate obtained by processing a group III nitride semiconductor single crystal layer heteroepitaxially grown on a heterogeneous substrate by HVPE.
A method for producing a group III nitride semiconductor single crystal substrate according to claim 1. The difference between the maximum value and the minimum value of the angle between the c-axis and the surface of the base substrate in the plane of the base substrate is 0.1 ° or more.
A method for producing a group III nitride semiconductor single crystal substrate according to claim 1 or 2. Growing the epitaxial layer to be thicker than twice the thickness of the underlying substrate;
The manufacturing method of the group III nitride semiconductor single-crystal substrate of any one of Claims 1-3. The difference between the maximum value and the minimum value of the angle between the c-axis and the surface of the group III nitride semiconductor single crystal substrate in the plane of the cut group III nitride semiconductor single crystal substrate is less than 0.1 °.
The manufacturing method of the group III nitride semiconductor single-crystal substrate of any one of Claims 1-4. The other surface of the base substrate is a c-plane or a surface inclined at an angle of 5 ° or less from the c-plane,
The groove pattern has rotational symmetry with the central axis of the base substrate as an axis of symmetry.
The manufacturing method of the group III nitride semiconductor single-crystal substrate of any one of Claims 1-5. The groove pattern is composed of a line parallel to the a-axis or m-axis of the base substrate, and has three or six times rotational symmetry with the central axis of the base substrate as the symmetry axis.
A method for producing a group III nitride semiconductor single crystal substrate according to claim 6. Among the plurality of linear grooves constituting the groove, the pitch of the same groove in the direction is 100 μm or more and 10 mm or less.
The manufacturing method of the group III nitride semiconductor single-crystal substrate of any one of Claims 1-7. While the epitaxial layer is homoepitaxially grown, a warp in which the one surface is a concave surface occurs in the base substrate.
The manufacturing method of the group III nitride semiconductor single-crystal substrate of any one of Claims 1-8.

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