JP2018104231A - MANUFACTURING METHOD OF SiC WAFER AND SiC WAFER - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a manufacturing method for manufacturing a SiC wafter having a less warpage.SOLUTION: This manufacturing method of a SiC wafer includes a single crystal growth step where a SiC ingot is produced by growing a SiC single crystal on a seed crystal, and a slicing step where the SiC ingot is cut to produce a SiC wafer. The SiC ingot has a high penetration dislocation density region and a low penetration dislocation density region within a growth surface. In the high penetration dislocation density region, a part of a highest penetration dislocation density is located outside a plane view center of the SiC ingot. In the slicing step, the SiC ingot is cut from a low penetration dislocation density side to a high penetration dislocation density side in a first direction connecting the part of the highest penetration dislocation density and the center.SELECTED DRAWING: Figure 3

Description

  The present invention relates to a method for manufacturing a SiC wafer and a SiC wafer.

  Silicon carbide (SiC) has a dielectric breakdown electric field one order of magnitude larger than silicon (Si) and a band gap three times larger. Silicon carbide (SiC) has characteristics such as about three times higher thermal conductivity than silicon (Si). Therefore, silicon carbide (SiC) is expected to be applied to power devices, high frequency devices, high temperature operation devices, and the like.

  In practical application of SiC devices using SiC, it is required to increase the diameter of SiC wafers. The SiC device is obtained by forming an epitaxial film on a SiC wafer and turning the formed SiC epitaxial wafer into chips. Therefore, in order to obtain a large number of semiconductor devices from a single substrate, a large diameter SiC wafer is required.

  At the same time as increasing the diameter, reduction of crystal defects in the SiC wafer is also required. Among crystal defects, penetration defects penetrating in the growth direction have been found to deteriorate the performance of SiC devices, and reduction is particularly required.

  In recent years, SiC wafers with reduced dislocation density in crystals have been obtained by using repeated a-plane growth (RAF method) (for example, Patent Document 1). When crystal growth is performed using a seed crystal with a reduced dislocation density, there is a problem that heterogeneous polymorphism occurs due to insufficient screw dislocations.

  Patent Documents 1 and 2 disclose a method for suppressing the occurrence of heterogeneous polymorphism by using a seed crystal provided with a screw dislocation generation region (artificial defect) in which a defect is artificially introduced in an upstream portion in the offset direction. Is described. By generating a screw dislocation having a predetermined density from the screw dislocation generation region and supplying the screw dislocation into the c-plane facet, the occurrence of heterogeneous polymorphism due to the lack of the screw dislocation in the c-plane facet is suppressed. .

  Further, the SiC wafer is required to have flatness. For this reason, warpage or the like of the SiC wafer is a target to be suppressed. SiC single crystal is an extremely hard material. Therefore, wire cutting using diamond abrasive grains or the like is used in the slicing step of cutting into a circular substrate (wafer).

  In the slicing step, a strong force may be locally applied to the SiC ingot or the wire, and the warp of the SiC wafer is likely to occur in the slicing step. When warping occurs in the slicing process, it is difficult to reduce this warping in the subsequent polishing process. Even if the surface of the substrate, which has been warped in the slicing step, is flattened by polishing or the like, the surface orientation of the wafer varies and stress remains. As a result, deformation or the like may occur during the subsequent heat treatment. Therefore, in order to obtain a SiC wafer with a small warp, it is important to reduce the warp that occurs at the stage of the slicing process.

  Patent Document 3 describes a method for obtaining a wafer having a small warpage. In Patent Document 3, the angle between the crystal orientation <11-20> direction or the crystal orientation <1-100> direction and the cut surface is 15 ± 5 ° in an orthogonal projection onto the {0001} plane. A method of cutting is described.

  In Patent Document 4, the <1-100> direction of the ingot is projected onto the ingot cutting surface of the wire saw, and the wire saw is cut so that the traveling direction of the wire saw is within ± 5 ° with respect to the <1-100> orthogonal projection. How to do is described. These are cutting methods that pay attention to the fact that the crystal plane of SiC that is easy to cleave is the (11-20) plane.

JP 2013-116840 A JP 2012-116676 A JP2013-89937A Japanese Patent Laying-Open No. 2015-222766

  However, as the size and quality of SiC wafers have increased, a problem has arisen that it is difficult to suppress warping with a SiC wafer having a low dislocation density and a large diameter.

  For example, when a SiC ingot having a region with a low dislocation density described in Patent Document 1 is sliced, it is difficult to sufficiently reduce the warp by the cutting methods described in Patent Document 3 and Patent Document 4. The SiC ingot described in Patent Document 1 is a SiC ingot produced by using a single crystal of low dislocation density produced by repeated a-plane growth (RAF method) as a seed crystal and providing the seed crystal with a screw dislocation generation region. It is.

  Warped SiC wafers create various problems in the fabrication process when fabricating SiC devices. For example, there arises a problem that the SiC wafer is easily damaged when the SiC wafer is transported, and a problem that the layer thickness becomes nonuniform in the surface of the SiC wafer when a desired layer is epitaxially grown on the SiC wafer. Such a problem causes a decrease in yield of the SiC device and a decrease in reliability of the SiC device.

  The present invention has been made in view of the above problems, and an object thereof is to provide a manufacturing method for obtaining a SiC wafer having a large diameter and a region having a small dislocation density and having a small amount of warpage. To do. It is another object of the present invention to provide a SiC wafer with a small amount of warpage produced by this method for producing a SiC wafer.

  As a result of intensive studies, the present inventors have found that the dislocation density non-uniformity in the SiC wafer plane is one of the causes of warpage.

Even when a SiC ingot having a diameter larger than a desired size having a low dislocation density region and a low dislocation density region in the wafer surface is low, the distribution of the threading dislocation density is obtained. Accordingly, it has been found that a SiC wafer with a small amount of warpage can be obtained by cutting the SiC ingot in a predetermined direction. Moreover, the SiC wafer obtained by the manufacturing method had a large diameter, a low dislocation density, and a small amount of warpage.
That is, this invention provides the following means in order to solve the said subject.

(1) The SiC wafer manufacturing method according to the first aspect includes a single crystal growth step of growing a SiC single crystal on a seed crystal to produce a SiC ingot, and cutting the SiC ingot to produce a SiC wafer. The SiC ingot has a region having a high threading dislocation density and a region having a low threading dislocation density in a growth plane, and the portion having the highest threading dislocation density in the region having a high threading dislocation density is Positioned outside the center of the SiC ingot in plan view, in the slicing step, the SiC ingot is moved from the low threading dislocation density side to the high side in the first direction connecting the center with the portion having the highest threading dislocation density. Cut towards.

(2) In the SiC wafer manufacturing method according to the above aspect, the main surface of the seed crystal is a (0001) plane having an offset angle in the <11-20> direction, and the first direction is <11-20>. It may be.

(3) In the SiC wafer manufacturing method according to the above aspect, a maximum diameter of a cut surface of the SiC ingot cut in the slicing step may be 150 mm or more.

(4) In the SiC wafer manufacturing method according to the above aspect, the thickness of the SiC wafer cut in the slicing step may be 800 μm or less.

(5) In the SiC wafer manufacturing method according to the above aspect, a threading dislocation density in a region of the SiC single crystal having a low threading dislocation density may be 2.5 × 10 ³ / cm ² or less.

(6) In the SiC wafer manufacturing method according to the above aspect, a screw dislocation generation region may be provided on the seed crystal in the single crystal growth step.

(7) In the SiC wafer according to the first aspect, the difference between the maximum threading dislocation density and the minimum threading dislocation density is 1.0 × 10 ² / cm ² or more, and the amount of warpage is 200 μm or less.

(8) In the SiC wafer according to the above aspect, a straight line connecting a portion where the maximum threading dislocation density is measured and a portion where the minimum threading dislocation density is measured passes through the center of the SiC wafer in parallel with the offset direction. May match.

(9) The SiC wafer according to the above aspect may have an average threading dislocation density of 3.0 × 10 ³ cm ² or less.

(10) The SiC wafer according to the above aspect may have a diameter of 150 mm or more.
(11) The SiC wafer according to the above aspect may have a thickness of 800 μm or less.

  According to the SiC wafer manufacturing method according to the above aspect, a SiC wafer including a region having a low dislocation density and having a small amount of warpage can be obtained.

  According to the SiC wafer which concerns on the said aspect, generation | occurrence | production of the various problems which arise at the time of SiC device manufacture resulting from the curvature of a wafer can be suppressed, and the yield and quality of a SiC device can be improved.

It is a schematic diagram for demonstrating the SiC single crystal which grows a crystal | crystallization at a single crystal growth process in the manufacturing method of the SiC wafer concerning this embodiment. It is a cross-sectional schematic diagram for demonstrating the amount of curvature. It is a schematic diagram for demonstrating a cutting direction.

  Hereinafter, the SiC wafer manufacturing method and the SiC wafer according to the present embodiment will be described in detail with reference to the drawings as appropriate. In the drawings used in the following description, in order to make the characteristics of the present invention easier to understand, there are cases where the characteristic parts are enlarged for the sake of convenience, and the dimensional ratios of the respective components are different from actual ones. is there. The materials, dimensions, and the like exemplified in the following description are examples, and the present invention is not limited to them, and can be appropriately modified and implemented without changing the gist thereof.

"Manufacturing method of SiC wafer"
<First Embodiment>
The SiC wafer manufacturing method according to the first embodiment includes a single crystal growth step for producing a SiC ingot by growing a SiC single crystal on a seed crystal, a slicing step for producing a SiC wafer by cutting the SiC ingot, Have

(Seed crystal preparation process)
First, the seed crystal preparation step before the single crystal growth step is described. In the seed crystal preparation step, a seed crystal serving as a reference for producing an SiC ingot is prepared. The seed crystal greatly contributes to the state of the manufactured SiC ingot. In order to obtain a predetermined SiC ingot, a predetermined seed crystal is prepared.

  As the seed crystal, a crystal having a low dislocation density is used. The SiC ingot that grows on the seed crystal inherits many of the dislocations of the seed crystal. Therefore, in order to obtain a SiC ingot having a low dislocation density, a seed crystal having a low dislocation density is used.

  A single crystal having a low dislocation density can be obtained by a RAF (Repeated a-face) method. The RAF method is a method of performing c-plane growth after performing a-plane growth at least once. When the RAF method is used, a SiC single crystal having almost no screw dislocations and stacking faults can be produced. This is because the defects of the SiC single crystal after the a-plane growth are defects in the basal plane direction and cannot be inherited in the c-plane growth. Details of the RAF method are described in, for example, Japanese Patent Application Laid-Open No. 2003-321298.

  Further, a crystal grown by the RAF method as a reference, and a crystal further grown by c-plane ((0001) plane) may be used as a seed crystal. Through further c-plane growth, threading dislocations can be further reduced. When crystal growth proceeds sufficiently in the c-plane direction, coalescence of threading dislocations occurs and the threading dislocation density decreases. As a result, the number of threading dislocations can be further reduced during the crystal growth process, and a seed crystal having a low dislocation density can be obtained.

As described above, the dislocation density of the seed crystal is desirably low, and in particular, the threading dislocation density is desirably low. Threading dislocation density is preferably 5000 cm ^-2 or less of the seed crystal, more preferably 3000 cm ^-2 or less, more preferably 1000 cm ^-2 or less. The dislocation density here means an in-plane average value of dislocations exposed on the surface of the seed crystal.

  Further, threading dislocations are representative of threading screw dislocations and threading edge dislocations, and include complex dislocations. These dislocations extend in the growth direction when grown with the c-plane ((0001) plane) as the principal plane, and are often handed over from the seed crystal to the SiC ingot. Threading dislocations can be identified and counted by known etch pit measurement or X-ray topographic measurement.

  When SiC having a low dislocation density (small) is used as a seed crystal, a SiC ingot having a low dislocation density can be obtained. However, seed crystals with a low dislocation density have few screw dislocations, so there are few step sources to transfer the seed crystal polymorph into the grown crystal. Therefore, different types of polymorphic crystals and different orientation crystals are easily formed, and it is difficult to stably grow a good single crystal. Therefore, as described in Patent Document 1, it is preferable to intentionally introduce artificial defects into a part of the seed crystal to form a screw dislocation generation region with many screw dislocations as a step supply source. As a method of forming the screw dislocation generation region, a method as described in Patent Document 2 can be used.

  In the growth using the c-plane ((0001) plane) of SiC as a main surface, step flow growth using a seed crystal provided with an offset angle (hereinafter referred to as an off angle) is used to obtain a stable polymorph. It is done. The off-angle is often about 2 to 8 °, and a seed crystal whose offset direction (hereinafter referred to as off-direction) is in the <11-20> direction is used.

  The artificial defect that becomes the screw dislocation generation region is locally provided on the upstream side in the off direction. Here, the “upstream side in the off direction” refers to a side opposite to the side on which the tip of the vector projected on the (0001) plane of the normal vector of the growth surface (seed crystal surface) faces. As a method for producing the artificial defect, a method as described in Patent Document 1 can be employed. For example, an artificial defect can be produced by artificially scratching or straining.

  In this way, when an artificial defect is provided upstream in the off direction from the center of the seed crystal in plan view, even if a seed crystal having a low dislocation density is used, the SiC single crystal can be stably formed without generating heterogeneous polymorphism. A SiC ingot that can be grown and has a low dislocation density and few different polymorphs can be obtained.

(Single crystal growth process)
Next, the single crystal growth process will be described. In the single crystal growth step, a SiC ingot is produced based on the seed crystal produced in the seed crystal preparation step. A well-known method can be used for the manufacturing method of a SiC ingot. For example, as described above, a sublimation method using a sublimation gas from a raw material powder can be used.

  A known SiC single crystal growth apparatus can be used. For example, a SiC single crystal growth apparatus provided with a crucible having a lid and heating means on the outer periphery thereof can be used. The seed crystal produced in the seed crystal preparation step is arranged in a seed crystal installation part provided in the lid, and the SiC raw material is arranged in the crucible bottom part facing the seed crystal. When the crucible is heated by the heating means, the SiC raw material is sublimated and an SiC single crystal grows on the seed crystal. When the growth of the SiC single crystal reaches a predetermined amount, the crystal growth is stopped and the grown SiC ingot is taken out.

  The amount of crystal growth in the single crystal growth step is preferably 10 mm or more, more preferably 15 mm or more, and further preferably 25 mm or more. If the crystal growth amount is not less than the above range, for example, even when a large SiC wafer of 6 inches or more is obtained, defects are sufficiently flowed downstream of the offset, and a large number of SiC wafers with low defect density and low warpage are obtained. be able to.

  FIG. 1 is a schematic diagram for explaining a SiC single crystal that is crystal-grown in a single crystal growth step in the SiC wafer manufacturing method according to the present embodiment. In FIG. 1, the left side is upstream in the off direction, and the right side is downstream in the off direction.

  The seed crystal 1 shown in FIG. 1 has an artificial defect (spiral dislocation generation region) 1a. Therefore, the occurrence of heterogeneous polymorphism when a SiC single crystal grows from seed crystal 1 is suppressed. That is, the SiC ingot has a low dislocation density.

  The SiC ingot 2 formed on the seed crystal 1 having the artificial defect (helical dislocation generation region) 1a has a region having a low threading dislocation density and a region having a high density in the growth surface, that is, the main surface.

  The SiC ingot 2 takes over the screw dislocation of the seed crystal 1. Therefore, the region where the crystal has grown from the artificial defect 1a in the vicinity of the artificial defect 1a of the SiC ingot 2 has a high screw dislocation density. Further, since the artificial defect 1a is introduced, a stacking fault or the like is likely to occur in that portion. Some of these are converted into threading dislocations TD such as threading edge dislocations. Therefore, the upstream side in the off direction of the SiC ingot 2 is a region having a high threading dislocation density.

  The threading dislocation TD grows while extending almost perpendicular to the growth surface (main surface). Therefore, the threading dislocation density near the portion grown from the artificial defect 1a is increased. The threading edge dislocation may be converted into a basal plane dislocation BPD or the like, or may be converted from a basal plane dislocation BPD or the like into a threading dislocation TD. Therefore, a region having a high threading dislocation TD is formed around a portion of the seed crystal 1 where the artificial defect 1a is provided. The dislocation density leads to a low dislocation density region having a low dislocation density through a connection region where the density gradually decreases from the region.

  On the other hand, since the downstream portion in the off direction grows without such threading dislocations, the threading dislocation density is small. That is, the downstream side in the off direction of the SiC ingot 2 is a region having a low threading dislocation density.

  Therefore, the SiC ingot 2 has a region having a high threading dislocation density and a region having a low threading dislocation density in plan view from the stacking direction, and these are distributed asymmetrically with respect to the center in plan view (see FIG. 3).

  The seed crystal 1 used in the single crystal growth step has a c-plane ((0001) plane) having an off angle as a growth plane (main plane). And the artificial defect 1a is locally provided in the upstream. The artificial defect 1a is provided on a straight line passing through the center in the off direction in consideration of symmetry. The growth on the artificial defect portion 1a extends and grows in the growth direction, but its center remains on a straight line passing through the center in the off direction.

  That is, the threading dislocation density distribution in the direction orthogonal to the off direction has symmetry with respect to the center, and the threading dislocation density decreases as the distance from the center increases. In a SiC ingot obtained by single crystal growth, the threading dislocation density on the growth surface is asymmetric in the off direction, and is symmetric in the direction orthogonal thereto.

(Slicing process)
In the slicing step, the SiC ingot obtained in the single crystal growth step is sliced to obtain the thickness of the SiC wafer. A known method can be used for the slicing step. For example, it can be cut using a wire saw or the like.

FIG. 3 is a schematic diagram for explaining the high dislocation density region formed above the spiral dislocation generation region of the seed crystal and the cutting direction. As shown in FIG. 3, the SiC ingot 2 is cut from the low threading dislocation density side to the high side in the first direction connecting the center C with the portion having the highest threading dislocation density in the high dislocation density region 2a. (Shown arrow D _C ).

  In slicing with a wire saw, the linear wire is moved in one direction, the wire is brought into contact with the outer periphery of the fixed ingot, and then the wire is moved in one direction relative to the inner direction of the ingot and cut. That is, there is a direction in which cutting is advanced and a direction in which cutting is advanced. The direction of cutting is expressed as a cutting direction and a cutting direction. The cut wafer is subjected to a polishing process by cutting, lapping, or the like after being cut with a wire saw to become a SiC single crystal wafer.

  As a wire saw, there are a fixed abrasive method in which abrasive grains are attached in advance to the surface of the wire and a free abrasive method in which slicing is performed while applying a slurry containing abrasive particles to the wire. There is also a multi-wire saw that slices multiple sheets at the same time. The SiC wafer manufacturing method according to the present embodiment can be applied to both a fixed abrasive type multi-wire saw and a free abrasive type multi-wire type. In a multi-wire saw, the warpage of wafers cut at the same time has a similar shape, and there is a tendency that a wafer having the same degree of warpage can be obtained.

  The non-target of the threading dislocation density distribution of the SiC ingot is one factor that causes the warpage of the wafer. The fact that the difference in the dislocation density in the SiC ingot is one factor that causes the warpage of the SiC wafer can be found only after the threading dislocation density in the SiC ingot is reduced. When the threading dislocation density in the SiC ingot is large throughout, it is difficult to find out that the difference in the threading dislocation density in the plane is buried in the data as a slight difference and is one factor of warpage. In other words, the SiC ingot obtained from the seed crystal produced by using the RAF method means that the difference in threading dislocation density in the plane appears remarkably. That is, when a SiC ingot is produced using a seed crystal produced using the RAF method, warping of the SiC wafer can be suppressed by using the SiC wafer production method according to the present embodiment.

  In the slicing step, the thickness to be sliced is preferably 800 μm or less, more preferably 600 μm or less, and further preferably 400 μm or less. By reducing the thickness of the SiC wafer, the SiC device can be made thinner. On the other hand, when the slice thickness is reduced, the SiC wafer is likely to warp. That is, the SiC wafer is warped unless it is cut according to predetermined conditions described later.

Before the slicing step, an outer periphery grinding step for performing outer periphery grinding of the ingot may be provided. In the outer periphery grinding process, the wafer acquisition region _Sw is selected. Wafer acquisition area S _w, avoiding the vicinity of the high dislocation density region 2a grown on screw dislocation generation region (artificial defect), may be cut into a cylindrical shape. Even in such a case, since there exists a connection region in which the dislocation density gradually decreases between the high dislocation density region 2a and the low dislocation density region, the region having a high threading dislocation density and the threading dislocation density in the cut wafer surface. There is a low area.

  In the slicing step, the cutting direction and direction (azimuth) are set according to the threading dislocation density of the SiC ingot to be cut. The cutting direction is a direction in which the portion having the highest threading dislocation density is connected to the center of the SiC ingot in plan view.

  When the SiC ingot is cut as it is without performing peripheral grinding or cutting, the portion with the highest threading dislocation density in the SiC ingot matches the portion with the highest threading dislocation density in the high dislocation density region. When the portion where the threading dislocation density of the high dislocation density region is maximized is removed by providing the peripheral grinding step and the cutting step, the region having the highest threading dislocation density in the remaining high dislocation density region and connection region is selected. The threading dislocation density is the maximum.

  In the SiC ingot 2 obtained from the seed crystal provided with the artificial defect 1a on the upstream side in the off direction, the threading dislocation density is asymmetric in the off direction and symmetric in the direction orthogonal to the growth surface as described above. . Therefore, the direction in which the threading dislocation density is maximum with respect to the center coincides with the offset direction. In such a case, the cutting direction can be determined without measuring the dislocation density distribution of the SiC ingot in advance.

  Next, when the cutting direction is determined, the cutting direction (azimuth) is determined. The direction of cutting means from which side the cutting is performed along the cutting direction. In the slicing step according to this embodiment, cutting is performed in a direction from a relatively low threading dislocation density toward a relatively high side.

  In the case of a wire saw, the position where the ingot and the wire first contact is the end portion of the ingot opposite to the portion where the threading dislocation density is maximum. When an off angle is provided in the <11-20> direction, cutting is started from the <11-20> direction and downstream in the off direction. That is, the cutting direction is a direction in which cutting is advanced from the downstream side in the off direction to the upstream side. The wire saw may swing the angle of the wire with respect to the SiC ingot within a range of a minute angle that is symmetric with respect to the direction in which cutting is advanced. In this case, the cutting direction with respect to the direction in which cutting is advanced is the cutting direction described above.

  When cutting is performed in such a direction and direction, cutting proceeds from a portion having a low threading dislocation density toward a portion having a high threading dislocation density. When cutting is performed in such a direction and direction, even a SiC ingot having a threading dislocation density distribution in the plane can reduce the warpage of the wafer at the wafer slicing stage.

  Such reduction of the warpage of the wafer is assumed as follows. The crystal hardness changes with the generation of dislocations. Generally, when the dislocation density is high, the crystal becomes hard. The more a hard object is cut, the greater the degree of wear of the wire, and the load on the wire increases. The wear and load of the wire tends to cause a shift in the wire traveling direction. As a result, it is considered that warping increases when cutting from the side where dislocations are high along the cutting direction. As described above, in the SiC ingot 2, the threading dislocation density on the growth surface is symmetric in the direction orthogonal to the offset direction, but is asymmetric in the offset direction. For this reason, when the cutting direction deviates from the offset direction, an asymmetric load is easily applied to the wire during cutting.

  The size of the SiC wafer to be obtained is not particularly limited, but it is preferably 6 inches or more in view of the recent demand for a large diameter. Further, as the size of the SiC wafer increases, the influence of warpage increases, and warpage tends to occur. Therefore, the SiC wafer manufacturing method according to the present embodiment can be particularly suitably used when manufacturing a large-diameter SiC wafer.

  The thickness of the obtained SiC wafer is preferably 800 μm or less, more preferably 600 μm or less, and even more preferably 400 μm or less, similar to the thickness cut in the slicing step. As the thickness of the SiC wafer is reduced, the influence of the warpage is increased accordingly. Therefore, the method for manufacturing the SiC wafer according to the present embodiment can be particularly preferably used when manufacturing a thin SiC wafer.

  As described above, according to the method for manufacturing an SiC wafer according to the present embodiment, a SiC wafer having a low dislocation density and a region having a high threading dislocation density and a region having a low threading dislocation density in the plane is obtained by reducing the warpage of the wafer. Can be sliced. As a result, a SiC wafer having a small in-plane dislocation density difference and a small amount of warpage can be obtained.

  As described above, according to the SiC wafer according to the present embodiment, it is possible to suppress the occurrence of various problems that occur at the time of manufacturing the SiC device, and it is possible to increase the yield and quality of the SiC device.

  The preferred embodiments of the present invention have been described in detail above. However, the present invention is not limited to the specific embodiments, and various modifications can be made within the scope of the gist of the present invention described in the claims. Can be modified or changed.

  Hereinafter, the effect of the present invention will be specifically described with reference to examples. The present invention is not limited to these examples.

"Example 1"
First, a seed crystal was produced using the RAF method. The diameter of the seed crystal was 6.5 inches, and a screw dislocation generation region was provided by machining processing at a position 8 mm inside from the off-upstream end.

  Then, a SiC single crystal was grown on a seed crystal (offset angle 4 °) having a screw dislocation generation region by using a sublimation method, thereby producing a SiC ingot. The thickness of the growth region grown from the seed crystal in the SiC ingot was 20 mm. The offset direction was the <11-20> direction.

  First, in order to investigate the distribution of threading dislocation density (total density of screw dislocations and threading edge dislocations) of the obtained SiC ingot, one wafer was cut out from the upper part of the SiC ingot with a wire saw. The threading dislocation density was measured by measuring the density of etch pits generated by molten KOH etching after polishing the wafer after cutting.

As a result, the threading dislocation density on the growth surface of the SiC ingot showed the maximum at a position 72 mm upstream from the center, and the threading dislocation density was 3.5 × 10 ³ cm ⁻² . On the other hand, the threading dislocation density showed the minimum at a position 72 mm downstream from the center, and the threading dislocation density was 2.1 × 10 ³ cm ⁻² . It was also confirmed that the method of connecting the maximum and minimum threading dislocation density was consistent with the off direction as planned.

Next, the remaining SiC ingot was sliced using a fixed-abrasive multi-wire saw. The slicing was performed from the downstream side in the off direction toward the upstream side. The thickness of the SiC wafer sliced from the adjacent position about 2 mm from the wafer evaluated above is 0.65. mm. The amount of warpage of the SiC wafer was 80 μm. As shown in FIG. 2, when the SiC wafer 10 is placed on the flat surface f, the amount of warpage is a vertical line that drops from the highest position of the surface 10a on the flat surface f side of the SiC wafer 10 to the flat surface f. Length h.

Further, a 6-inch wafer was cut out from the obtained wafer as shown in FIG. 3 so as to avoid the maximum dislocation density. The maximum threading dislocation density of this 6-inch wafer was 2.9 × 10 ³ / cm ² , the difference in minimum threading dislocation density was 1.1 × 10 ³ / cm ² , and the amount of warpage was 60 μm.

"Examples 2 to 5"
In Examples 2 to 5, SiC ingots grown on a seed crystal having a low dislocation density were prepared, and the cutting methods were compared. As in Example 1, the offset direction of the seed crystal is the <11-20> direction. As in Example 1, a SiC single crystal was grown on a seed crystal (offset angle of 4 °) provided with a screw dislocation generation region using a sublimation method to produce a SiC ingot. The crystal growth method of the SiC ingot was performed in the same manner as in Example 1, and the growth length was set to about 20 mm.

  After slicing with a multi-wire saw under the same conditions as in Example 1, a 6-inch wafer was cut out in the same manner. Wafers were cut out from 15 to 22 wafers from one ingot, and the warpage was measured. The threading dislocation density was measured for the wafer with the largest warpage among the measured wafers. The results are shown in Table 1. In the table, “TD low → high” means that the threading dislocation density is cut from the lower one to the higher one, and “TD high → low” means the opposite.

"Comparative Examples 1-4"
Moreover, as Comparative Examples 1-4, it sliced by changing the cutting direction and cutting direction with respect to the same SiC ingot. The cut wafer was measured, and the threading dislocation density was measured for the wafer with the smallest warpage among the measured wafers. Comparative Example 1 and Comparative Example 2 were cut in the direction from the off upstream side to the downstream side in the <11-20> direction and having a high threading dislocation density. Comparative Example 3 was cut in the <1-100> direction orthogonal to the direction from the off upstream side to the downstream side. The comparative example 4 cut | disconnected in the direction rotated 120 degree | times with respect to Example 1. FIG. The results are shown in Table 2.

  In Tables 1 and 2, in Examples 1 to 5 and Comparative Examples 1 to 4, the in-plane maximum value, in-plane minimum value and in-plane height difference of threading dislocation density (TD) in the evaluation wafer in each ingot are described. did. Each ingot used in the study has different average dislocation density values because the dislocation density of the low dislocation density seed crystal used for crystal growth is different. Further, the part having a high threading dislocation density and the part having a low threading dislocation density are located in the offset direction, and coincided with the direction expected from the set offset direction and the position of the screw dislocation generation region.

As shown in Table 1, in Examples 1 to 5, even when the difference between the maximum threading dislocation density and the minimum threading dislocation density is 1.0 × 10 ² / cm ² or more, the warpage amount is within 200 μm, and the threading dislocations. A wafer with low density and low warpage was obtained. On the other hand, in Comparative Examples 1 to 4, warpage was large. When the cutting direction is opposite to that of the embodiment and the threading dislocation density is cut from the higher side to the lower side, or the cutting direction is different from the embodiment as a direction rotated 120 degrees from <1-100> or <11-20>. In some cases, the warping was large.

DESCRIPTION OF SYMBOLS 1 ... Seed crystal, 1a ... Artificial defect, 2 ... SiC ingot, TD ... Threading dislocation, BPD ... Basal plane dislocation, 10 ... SiC wafer, 10a ... surface, f ... Flat surface

Claims (11)

A single crystal growth step of producing a SiC ingot by growing a SiC single crystal on a seed crystal;
Slicing the SiC ingot to produce a SiC wafer, and
The SiC ingot has a region having a high threading dislocation density and a region having a low threading dislocation density in a growth plane, and a portion where the threading dislocation density is maximum in the region having a high threading dislocation density is outside the center in plan view of the SiC ingot. Located in
A method of manufacturing a SiC wafer, wherein, in the slicing step, the SiC ingot is cut from a low threading dislocation density side to a high side in a first direction connecting the center having the highest threading dislocation density and the center.   2. The method of manufacturing an SiC wafer according to claim 1, wherein a main surface of the seed crystal is a (0001) plane having an offset angle in a <11-20> direction, and the first direction is <11-20>. .   The manufacturing method of the SiC wafer of Claim 1 or 2 whose maximum diameter of the cut surface of the said SiC ingot cut | disconnected by the said slice process is 150 mm or more.   The manufacturing method of the SiC wafer as described in any one of Claims 1-3 whose thickness of the SiC wafer cut | disconnected in the said slice process is 800 micrometers or less. The manufacturing method of the SiC wafer as described in any one of Claims 1-4 whose threading dislocation density of the area | region with a low threading dislocation density of the said SiC single crystal is 2.5 * 10 < ³ > / cm < ² > or less.   The manufacturing method of the SiC wafer as described in any one of Claims 1-5 which provides a screw dislocation generation area | region on the said seed crystal in the said single crystal growth process. A SiC wafer having a difference between a maximum threading dislocation density and a minimum threading dislocation density of 1.0 × 10 ² / cm ² or more and a warpage amount of 200 μm or less.   8. The SiC wafer according to claim 7, wherein a straight line connecting a portion where the maximum threading dislocation density is measured and a portion where the minimum threading dislocation density is measured coincides with a line passing through the center of the SiC wafer in parallel with the offset direction. . The SiC wafer according to claim 7 or 8, wherein an average threading dislocation density is 3 x 10 ³ cm ² or less.   The SiC wafer as described in any one of Claims 7-9 whose diameter is 150 mm or more.   The SiC wafer as described in any one of Claims 7-10 whose thickness is 800 micrometers or less.

Images