JPH0636932A - Inductor for integrated circuit use - Google Patents

Abstract

PURPOSE:To realize an inductor for integrated circuit use, which is capable of obtaining a large inductance value in spite of its small area and at the same time, has little effect to high-frequency characteristics. CONSTITUTION:An inductor for integrated circuit use consists of a lower layer wiring 2 having a plurality of strips 2a, which are slanted in the same direction and are arranged at equal intervals, and an upper layer wiring 4 having a plurality of strips 4a, which are slanted in the reverse direction to the direction of the strips 2a and are arranged at equal intervals, the end parts of the strips of both layers are connected to each other through a connection wiring 5 and a cylindrical solenoid-shaped structure is presented.

Description

Detailed Description of the Invention

[0001]

FIELD OF THE INVENTION The present invention relates to an inductor for an integrated circuit. More specifically, it relates to an inductor for an integrated circuit having a small area and a large inductance value.

[0002]

2. Description of the Related Art A GaAs analog integrated circuit is used as an integrated circuit (IC) for high-frequency signal processing in the VHF band and above, particularly in the microwave and millimeter wave regions. In this integrated circuit, a GaAs FET, a diode, a capacitor, an inductor and the like are integrated, and as the inductor, a spiral one as shown in FIG. 4 has been conventionally used.

[0003]

However, in order to increase the inductance value in the spiral inductor as shown in FIG. 4, it is necessary to increase the number of turns N or the outer diameter d ₂ (see FIG. 4). In either case, there is a problem that the shape suddenly becomes large and the area becomes large. That is, for example, when the number of turns N is increased, the outermost circumference is increased, and the area is increased very rapidly.

In view of the above circumstances, it is an object of the present invention to provide an inductor for an integrated circuit which can obtain a large inductance value despite its small area.

[0005]

An inductor for an integrated circuit (hereinafter, simply referred to as an inductor) of the present invention comprises a lower layer wiring having a plurality of strips inclined in the same direction and arranged at equal intervals, and Is an upper layer wiring having a plurality of strips which are inclined in opposite directions and are arranged at equal intervals, and an interlayer insulating film is provided between the lower layer wiring and the upper layer wiring, and the strip of the lower layer wiring is provided. And an end portion of the strip of the upper layer wiring are connected by a connecting wiring to form a cylindrical solenoid structure.

[0006]

The inductor of the present invention has a cylindrical solenoidal structure, and its inductance value L (H) can be expressed by equation (1).

L = λμSN ² / D (1) where λ is the Nagaoka coefficient and μ is the magnetic permeability (H /
m) and S are cross-sectional areas (m ² ) and D is length (m).

On the other hand, the inductance value L (nH) of the conventional spiral inductor can be expressed by the equation (2).

L = KAN ^5/3 ln (8A / C) (2) However, K is a constant that varies depending on the shape (in the case of a square, K
= 2.41 × 10 ^-3 ), N is the number of turns, A and C are inner diameters d ₁ ,
Each outer diameter as _{d 2 (d 2 -d 1)} / 4 and (d ₂ -d ₁₎ is a value calculated by / 2.

As can be seen by comparing equations (1) and (2), in the case of equation (1), it is effective to increase the number of turns N in order to increase the inductance value.
The inductance value increases in proportion to the square of. On the other hand, in the case of the formula (2), the number of turns N increases only in proportion to the 5/3 power.

On the other hand, in the present invention, the area required to increase the number of turns may be increased by increasing the number of units indicated by U in FIG. 1, but in the case of the conventional spiral inductor, the number of turns is as described above. The larger the number, the larger the outer circumference, and the area increases rapidly.

Further, although the series resistance naturally increases as the number of turns increases, this series resistance causes deterioration of high-frequency characteristics, so it is preferable to make it as small as possible. Also in this respect, the inductor of the present invention is effective because the increase in the wiring length due to the increase in the number of turns can be small.

[0013]

DESCRIPTION OF THE PREFERRED EMBODIMENTS Next, the inductor of the present invention will be described in detail with reference to the accompanying drawings.

FIG. 1 is an explanatory plan view of an embodiment of the inductor of the present invention, FIG. 2 is a sectional view taken along the line AA of FIG. 1, and FIG. 3 is a sectional view taken along the line BB of FIG.

2 to 3, reference numeral 1 denotes a substrate. As the substrate 1, an insulating film made of SiO ₂ , SiN, Al ₂ O ₃ or the like is formed on an ordinary semiconductor substrate such as a semi-insulating GaAs substrate or silicon. What was done can be used. The insulating film may have a single layer structure or a multilayer structure in which two or more kinds of films are laminated.

A lower layer wiring 2 is formed on a substrate 1, and an upper layer wiring 4 is formed above the lower layer wiring 2 with an interlayer insulating film 3 interposed therebetween.

The lower layer wiring 2 has a plurality of strips 2a inclined in the same direction and arranged at equal intervals.
On the other hand, the upper layer wiring 4 has a plurality of strips 4a that are inclined in a direction opposite to the inclination direction of the strips of the lower layer wiring 2 and are arranged at equal intervals. The number of strips 2a and 4a may be appropriately selected according to the required inductance value.

The width W of the strip is not particularly limited, but is usually 5 to 10 μm, and the interval P between adjacent strips is also 5 to 10 μm. The length E of the strip in the inclined state is generally about 10 μm to 100 μm.

The number of strips may be appropriately selected according to the required inductance value, but in the case of an inductor up to several nH, it is usually up to about 10.

As the material of the lower layer wiring 2 and the upper layer wiring 4, Au, Ag, Cu or the like having a large electric conductivity can be used. The thickness is not particularly limited in the present invention, but is usually in the range of 2 to 10 μm in order to reduce the resistance value. For the lower layer wiring 2 and the upper layer wiring 4, (1) a resist pattern is formed after vapor deposition of a wiring material,
Unnecessary parts are removed by etching such as RIE, ion milling, and wet etching, and then the resist is peeled off, or (2) a resist pattern is formed and then a wiring material is evaporated, and then the resist film is removed by lift-off. And the like.

An interlayer insulating film 3 is formed on the substrate 1 after the lower layer wiring 2 is formed. The interlayer insulating film 3 is preferably formed of a material having a particularly low dielectric constant. For example, the same material as the insulating film formed on the substrate 1 described above can be used to form the interlayer insulating film 3 by a plasma CVD method or the like. Although the thickness of the interlayer insulating film 3 is not particularly limited, it is usually in the range of 2 to 100 μm in consideration of the ease of manufacture and the fact that it is brought closer to a solenoid having a more cylindrical shape.

A contact hole or a via hole is formed in the interlayer insulating film 3, and a contact metal or a via metal is buried in the contact hole to form the connection wiring 5 described above. There is. As the contact metal, it is preferable to use a metal having a high electric conductivity like the material for the lower or upper wiring. The contact holes are formed, for example, by performing dry etching such as RIE or wet etching after forming the resist pattern. Then, a contact metal can be embedded in the obtained hole by vapor deposition or the like, and then the resist can be removed by lift-off to form the connection wiring 5.

In this way, the ends of the strips 2a of the lower layer wiring 2 and the ends of the strips 4a of the upper layer wiring 4 are connected by the connection wirings 5, and these wirings have a cylindrical solenoid structure. . Therefore, in order to increase the inductance value, the number of units indicated by U in FIG. 1 may be increased, and the area does not suddenly increase unlike the conventional spiral wiring.

When a compound semiconductor substrate such as a GaAs substrate is used as a substrate, high mobility of electrons can be obtained and a high frequency FET or a diode as a high frequency amplifier can be formed, and the above-mentioned inductor can be formed in a small area on the compound semiconductor substrate. Thus, a high-frequency integrated circuit can be formed on a single substrate together with a high-frequency FET, a diode, a capacitor, etc. in a small area.

[0025]

As described above, since the inductor of the present invention has the cylindrical solenoid-like structure in which the upper wiring and the lower wiring are connected by the connecting wiring, the inductance value can be increased only by increasing the number of units. Well, there is no sudden increase in area. Further, the increase rate of the series resistance is small, and the influence on the high frequency characteristics can be small.

[Brief description of drawings]

FIG. 1 is an explanatory plan view of an embodiment of an inductor of the present invention.

FIG. 2 is a sectional view taken along the line AA of FIG.

FIG. 3 is a sectional view taken along line BB of FIG.

FIG. 4 is a plan view of a conventional inductor.

[Explanation of symbols]

 1 substrate 2 lower layer wiring 3 interlayer insulating film 4 upper layer wiring 5 connection wiring 2a lower layer wiring strip 4a upper layer wiring strip

Claims (1)

[Claims] 1. A lower layer wiring having a plurality of strips inclined in the same direction and arranged at equal intervals, and an upper layer having a plurality of strips inclined in a direction opposite to the direction and arranged at equal intervals to each other. And an interlayer insulating film is provided between the lower layer wiring and the upper layer wiring, and the end portion of the strip of the lower layer wiring and the end portion of the strip of the upper layer wiring are connected by a connection wiring. An inductor for an integrated circuit, which has a cylindrical solenoidal structure.