JPH0635664Y2 - Dummy load circuit for DC switching power supply - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION <Industrial Application Field> The present invention relates to a dummy load circuit used in a DC switching power supply, and more particularly to reduction of loss in the dummy load circuit.

<Prior art> In a DC switching power supply, the pulse width is controlled according to the load current. Therefore, although the pulse width is narrow in the light load state, there is a problem that the controllability becomes unstable and the output voltage cannot be sufficiently stabilized in such a state. Therefore, a dummy load circuit is provided to allow a constant load current to flow even in a light load state to stabilize the output voltage.

FIG. 4 is an explanatory diagram of a conventional dummy load circuit, in which (A) shows a fixed type and (B) shows a variable type. In the figure, the output A is the main output and the output B is the sub output. In the fixed type, the dummy resistor R _d1 is connected between the output A and the common, and the dummy resistor R _d2 is connected between the output B and the common. In the variable type, the dummy resistor R _d1 is connected between the output A or B and the common via the switching element Q, and the comparator U1 compares the current flowing through the sense resistor R _s1 with the reference voltage Vref. When the light load state is determined, the switching element Q is turned on and the dummy current is supplied.

<Problems to be Solved by the Invention> However, in the fixed type, there is a problem that the dummy current is lost as it is in a normal load state and the efficiency is reduced.

Further, in the variable type, since two outputs independently have a dummy circuit, both dummy circuits are operating when both outputs are in a light load state. However, when both outputs are in a dependent relationship of main output and sub output and both outputs are in a light load state, it is sufficient to operate the dummy circuit of the main output, and the operation on the sub output side becomes a light load. It is enough if you do.

The present invention solves such a problem, and in a DC switching power supply in which a plurality of outputs have a dependency relationship,
An object is to provide a low-loss dummy load circuit.

<Means for Solving the Problems> FIG. 1 is a configuration block diagram for explaining the present invention. In the figure, a dummy load circuit of a DC switching power supply having a dummy circuit (50) commonly connected to each output of a DC power supply having a main output and a sub output, having the following configuration.

That is, on the main output side, the means (10) for detecting the load current of the main output is compared with the value detected by the main output load current detecting means and the threshold value corresponding to the light load state, and the value is low. Comparing means for outputting operation signal in case (20)
And a main switch circuit (40) for connecting the main output and the dummy circuit according to the operation signal output by the main comparing means.

Further, on the sub output side, means (11) for detecting the load current of the sub output, and a value detected by the sub output load current detection means and a threshold value corresponding to a light load state are compared,
Comparing means (21) for outputting an operation signal when it is low, and a sub switch circuit (41) for connecting the sub output and the dummy circuit according to the operation signal output by the sub comparing means.
And are provided.

When the operation of the main switch circuit and the operation of the sub switch circuit compete with each other, a switch arbitration means (30) for giving priority to the operation of the main switch circuit is provided.

<Operation> Each component of the present invention has the following operation. The main output load current detection means, the main comparison means, and the main switch circuit connect a dummy circuit to the main output when the main output is in a light load state. The sub output load current detection means, the sub comparison means, and the sub switch circuit connect the dummy circuit to the sub output when the sub output circuit is in the light load state.

The switch arbitration means connects the dummy circuit only to the main output when both the main and sub outputs are in a light load state, and prevents the dummy circuit from being simultaneously connected to both outputs.

<Example> The present invention will be described below with reference to the drawings.

FIG. 2 is a circuit diagram showing an embodiment of the present invention. The second
In the figure, parts having the same functions as those in FIG. In the figure, the DC converter 60 has a positive voltage main output A and a negative voltage sub output B
Has an output. The structure is the primary winding of the power transformer T
A DC voltage Vm is applied to n1 and the switching element Q3 turns it on and off. Then, since a switching signal is induced in the secondary winding n2 having the center tap, the main output A is obtained between the center tap and one end of the secondary winding n2, and between the center tap and the other end of the secondary winding n2. The sub output B is obtained. Main output A sends switching signal to diode D
It is obtained by rectifying with 1, D2, removing high frequency voice part with choke coil L1, and smoothing with capacitor C1. The sub output B is obtained by rectifying the switching signal with the diodes D3 and D4 connected with the opposite polarity to the diodes D1 and D2, removing the high frequency voice part with the choke coil L2, and smoothing it with the capacitor C2.
The center tap is connected to the ground GND. One end of the dummy resistor Rd is connected to this ground GND, and is also connected to the main output A via the switching element Q _A and to the sub output B via the switching element Q _B.

The main output load current detecting means 10 corresponds to a current transformer or a current detecting resistor provided in the main output A.
The sub output load current detecting means 11 is provided on the sub output B, and corresponds to the current transformer and the current detecting resistor like the main output load current detecting means 10.

The main comparison means 20 is a comparator U20 as a main element,
The output of the main output load current detecting means 10 is connected to the negative terminal, and the threshold voltage Vref corresponding to the light load state is connected to the positive terminal. The comparator U21 is a main element of the sub-comparison means 21, the output of the sub-output load current detection means 11 is connected to the negative terminal, and the threshold voltage Vref corresponding to the light load state is connected to the positive terminal, and the output From the terminal, an operation signal that is H in the light load state and L in the normal load state is output.

The main switch circuit 40 is a transistor Q41 that drives ON / OFF of the switching element QA and a transistor Q41 when the comparator U21 outputs H indicating a light load state.
A transistor Q42 that suppresses the drive of Q41 is provided, and this transistor Q42 also functions as a timer circuit that prevents the switching elements Q _A and Q _B from turning on at the same time.
The transistor Q43 inputs the operation signal of the comparator U21, amplifies this signal, and is used as a drive signal of the transistor Q42.

The sub switch circuit 41 includes a transistor Q46 that drives ON / OFF of the switching element QB and a transistor Q4 when the comparator 20 outputs H indicating a light load state.
A transistor Q47 that suppresses the drive of 6 is provided, and this transistor Q47 also functions as a timer circuit that prevents the switching elements Q _A and Q _B from turning on at the same time. Transistor Q48 inputs the operation signal of comparator U21,
This signal is amplified and used as a drive signal for the transistor Q47.

The switch arbitration means 30 includes a transistor Q30 as an element giving priority to the main output A, and in order to prevent a situation in which the main output A and the sub output B are simultaneously connected to the dummy resistor Rd, the transistor Q4 which constitutes the timer circuit described above.
2, Q47 is provided. Transistor Q30 inputs comparator U20, and when this signal is H, transistor Q30
41 is driven to connect the main output A to the dummy resistor Rd, and the transistor Q47 is turned on.
It prevents the situation where 46 turns on, and thus prevents the sub output B from being connected to the dummy resistor Rd.

The operation of the apparatus thus configured will be described below. Third
The figure is a waveform diagram for explaining the operation of the circuit of FIG. 2, where (A) is the load current I _A of the main output A, (B) is the dummy current I _DA of the main output A, and (C) is the sub output B. Load current I _B ,
(D) is the dummy current I _DB of the sub output B. I in the figure
_AON is the threshold voltage at which switching element Q _A turns on, I
_AOFF is a voltage to turn off, and a hysteresis is provided to prevent hunting. I _BON and I _BOFF are related to the switching element Q _B and are similar. The case will be described separately.

I _A ＞ I _{AOFF and} I _B ＞ I _BOFF .

Since the switching elements Q _A and Q _B are both off, neither of the dummy currents I _DA and I _DB flow.

I _A <I _{AON and} I _B <I _BON .

Since the switching elements Q _A and Q _B are both in the ON state, the switch arbitration unit 30 acts and the dummy current I _DA flows but the dummy current I _DB does not flow.

The following will be described with reference to FIG.

State (b): Even if switching element Q _A is on and switching element Q _B is on, the state of the dummy current does not change, so dummy current I _DA flows, but dummy current I
_DB does not flow.

State (b): When the switching element Q _B is off and the switching element Q _A is off, the state of the dummy current changes, the dummy current I _{DA stops} flowing, and the dummy current I _DA
DB is still flowing.

State (c): When the switching element Q _A is off and the switching element Q _B is off, the dummy current state changes and the dummy current I _DA does not flow, but the dummy current I _DB It comes to flow.

State (d): When the switching element Q _A is off and the switching element Q _B is off, the dummy current state changes, and the dummy current I _DA does not flow, but the dummy current I _DB is It stops flowing.

State (e): When the switching element Q _B is off and the switching element Q _A is on, the state of the dummy current changes and the dummy current I _DA starts to flow, but the dummy current I _DB does not flow. There is.

State (f): When switching element Q _A is on and switching element Q _B is on, the dummy current state does not change and dummy current I _DA flows, but dummy current I _DB
Does not flow.

State (g) ... When the switching element Q _B is on and the switching element Q _A is off, the state of the dummy current changes and the dummy current I _{DA stops} flowing, but the dummy current I _DB starts flowing.

State (h): When switching element Q _B is on and switching element Q _A is on, the dummy current state changes and dummy current I _DA begins to flow, but dummy current I _{DA
DB stops} flowing.

<Effect of Device> As described above, the present invention has the following practical effects.

Since a single dummy circuit is shared by the main output A and the sub output B, the number of parts is reduced.

Since the single dummy circuit is used by switching between the main output A and the sub output B, the dummy circuits do not operate at the same time, the loss is reduced and the energy efficiency is improved.

[Brief description of drawings]

FIG. 1 is a block diagram illustrating the present invention, FIG. 2 is a circuit diagram showing an embodiment of the present invention, FIG. 3 is a waveform diagram explaining the operation of the circuit of FIG. 2, and FIG. It is an explanatory view of a device. 10 ... Main output load current detection means, 11 ... Sub output load current detection means, 20 ... Main comparison means, 21 ... Sub comparison means, 30 ... Switch arbitration means, 40 ... Main switch circuit, 41 ... … Sub switch circuit, 50… Dummy circuit.

Claims (1)

[Scope of utility model registration request] 1. A dummy load circuit of a DC switching power supply, comprising a dummy circuit commonly connected to each output of a DC power supply having a main output and a sub output, comprising means for detecting a load current of the main output. , Comparing the value detected by the main output load current detecting means with the threshold value corresponding to the light load state, and outputting an operation signal when the value is low, and comparing the operation signal output by the main comparing means with the operation signal. Main switch circuit for connecting the main output and the dummy circuit, means for detecting the load current of the sub output, a value detected by the sub output load current detection means and a threshold value corresponding to a light load state. And comparing means for outputting an operation signal when it is low, and a sub means for connecting the sub output and the dummy circuit in accordance with the operation signal outputted by the sub comparing means. A switch circuit and a switch arbitration unit that prioritizes the operation of the main switch circuit when the operations of the main switch circuit and the sub switch circuit compete with each other. .