JPH06349998A - Manufacture of molded semiconductor element - Google Patents
Manufacture of molded semiconductor elementInfo
- Publication number
- JPH06349998A JPH06349998A JP13224993A JP13224993A JPH06349998A JP H06349998 A JPH06349998 A JP H06349998A JP 13224993 A JP13224993 A JP 13224993A JP 13224993 A JP13224993 A JP 13224993A JP H06349998 A JPH06349998 A JP H06349998A
- Authority
- JP
- Japan
- Prior art keywords
- solder
- film
- semiconductor element
- lead frame
- frame
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Landscapes
- Die Bonding (AREA)
- Lead Frames For Integrated Circuits (AREA)
Abstract
Description
【0001】[0001]
【産業上の利用分野】本発明は、金属基板上に固定され
た半導体素体を樹脂で被覆し、その半導体素体表面上の
電極に接続された端子導体を樹脂より露出させたモール
ド型半導体素子の製造方法に関する。BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a mold type semiconductor in which a semiconductor element body fixed on a metal substrate is covered with a resin, and terminal conductors connected to electrodes on the surface of the semiconductor element body are exposed from the resin. The present invention relates to a method of manufacturing an element.
【0002】[0002]
【従来の技術】モールド型トランジスタのようなモール
ド型半導体素子は、成形樹脂により半導体素体を封止し
ているので、安価に製造できる利点がある。モールド型
半導体素子には、端子のみが樹脂外に露出しているフル
モールド品と、放熱を良好にするために金属基板の裏面
も露出させたものとがある。金属基板および端子は、銅
からなるリードフレームのマウント部および外部リード
部であり、露出した銅の表面の酸化あるいは腐食を避け
るためニッケルめっきが施される。2. Description of the Related Art A molded semiconductor element such as a molded transistor has an advantage that it can be manufactured at low cost because a semiconductor body is sealed with a molding resin. There are two types of mold type semiconductor elements, a full mold type in which only the terminals are exposed to the outside of the resin, and a type in which the back surface of the metal substrate is also exposed in order to improve heat dissipation. The metal substrate and the terminals are the mount portion and the external lead portion of the lead frame made of copper, and are nickel-plated to avoid the oxidation or corrosion of the exposed copper surface.
【0003】[0003]
【発明が解決しようとする課題】リードフレームにNiめ
っきを施すことには次の理由でコストのかなりの増加を
招くという問題がある。 (1)3μmの厚さのNiめっきのために7〜10分の処理時
間を要するなど工数の増加を招く。The Ni plating on the lead frame has a problem that the cost is considerably increased for the following reason. (1) It takes 7 to 10 minutes to process Ni plating having a thickness of 3 μm, resulting in an increase in man-hours.
【0004】(2)Niめっき中にりんが含まれることによ
りはんだのぬれ性ガ低下するため、端子部にはんだ浴浸
漬によりはんだ皮膜を形成する際にフラックスを用いな
ければならず、そのあと洗浄する工程も必要となる。 本発明の目的は、このような問題のあるNiめっきを必要
としないモールド型半導体素子の製造方法を提供するこ
とにある。(2) Since the wettability of the solder decreases due to the inclusion of phosphorus in the Ni plating, flux must be used when the solder film is formed by dipping the solder in the solder bath at the terminal part, and then cleaning. A step to do is also required. It is an object of the present invention to provide a method for manufacturing a mold type semiconductor device which does not require such problematic Ni plating.
【0005】[0005]
【課題を解決するための手段】上記の目的を達成するた
めに、本発明は、Cu系材料からなるリードフレームのマ
ウント部に半導体素体を固着し、少なくともリードフレ
ームの外部リード部の先端を露出させて樹脂により封止
するモールド型半導体素子の製造方法において、リード
フレームの表面に銀シアン化カリウムおよび親水性有機
物の含まれる水を接触させ、表面皮膜を形成したのち、
リードフレームのマウント部にはんだにより半導体素体
を固着する工程を含むものとする。そして、半導体素体
を固着する工程のあとに、半導体素体表面上の電極とリ
ードフレームの外部リード部を導線のボンディングによ
り接続する工程、半導体素体表面上に接合被覆樹脂を塗
布する工程および封止樹脂を成形する工程を含むことが
有効である。さらに、封止樹脂より露出している外部リ
ード部をはんだ浴に浸漬する工程を含むことも有効であ
る。In order to achieve the above object, the present invention secures a semiconductor element body to a mount portion of a lead frame made of a Cu-based material, and fixes at least the tip of the outer lead portion of the lead frame. In the method for producing a mold-type semiconductor element that is exposed and sealed with a resin, water containing silver potassium cyanide and a hydrophilic organic substance is brought into contact with the surface of the lead frame to form a surface film,
It includes a step of fixing the semiconductor element body to the mount portion of the lead frame with solder. Then, after the step of fixing the semiconductor element body, the step of connecting the electrode on the surface of the semiconductor element body and the external lead portion of the lead frame by bonding of the conductive wire, the step of applying the bonding coating resin on the surface of the semiconductor element body, and It is effective to include a step of molding the sealing resin. Further, it is also effective to include a step of immersing the external lead portion exposed from the sealing resin in a solder bath.
【0006】[0006]
【作用】リードフレームを銀シアン化カリウム (K〔 A
g(CN) 2 〕) および親水性有機物の含まれる水に接触
させると、Cuの表面にAgが置換されると共に、その多孔
質Ag膜が有機皮膜により覆われる。有機皮膜の有機鎖は
Cu表面のAgと結合して強度の強い皮膜を形成し、酸化を
防止するが、溶融はんだの接触時には、有機皮膜が親水
性であるためはんだをはじくことがなく、はんだの熱に
より有機皮膜が分解され、はんだはAg膜によく濡れて、
空孔のないはんだ皮膜の形成ないしはんだ付けが行われ
る。上記の酸化防止作用により、Ag置換、有機皮膜形成
後、ある程度熱履歴を経ても、フラックスなしではんだ
皮膜の形成ないしはんだ付けが可能である。そして、基
板裏面を露出させたモールド型素子でも、露出面の酸化
による変色がない。[Function] The lead frame is replaced with silver potassium cyanide (K [A
When contacted with water containing g (CN) 2 ]) and a hydrophilic organic substance, Ag is substituted on the surface of Cu and the porous Ag film is covered with the organic film. The organic chains of the organic film
Bonds with Ag on the Cu surface to form a strong film and prevents oxidation, but when the molten solder comes into contact, the organic film is hydrophilic and does not repel the solder. It was disassembled and the solder wets the Ag film well,
Forming or soldering of void-free solder film is performed. Due to the above-mentioned antioxidation effect, it is possible to form a solder film or solder without a flux even after a certain amount of heat history after Ag substitution and organic film formation. Even in the mold-type element with the back surface of the substrate exposed, there is no discoloration due to oxidation of the exposed surface.
【0007】[0007]
【実施例】以下、図を引用して本発明の一実施例のモー
ルド型トランジスタの製造工程を説明する。Cu合金板か
ら打抜きにより作製されたリードフレームは、そのまま
では水ぬれ性が悪いため、図3に示すように各種脱脂、
中和および化学研磨を施したのち、K〔 Ag(CN) 2 〕
2〜5g/lのほか、例えば置換防止剤としての日本エ
レクトロプレイティング・エンジニヤース (株) 商品名
イートレックスW−AISのような特定の有機鎖をもつ
親水性有機物が含まれる純水中に30秒ないし1分程度浸
漬させて表面処理を行う。この時間は従来のNiめっき工
程の約1/10である。これにより図1に概念的に示すよ
うにCu合金リードフレーム1上にCuと置換されたAg2が
多孔質で付着し、Ag2に親水性有機鎖3が結合して皮膜
4を形成する。このあと水洗、乾燥ののち、図4に示す
組立工程に入る。DESCRIPTION OF THE PREFERRED EMBODIMENTS The manufacturing process of a molded transistor according to an embodiment of the present invention will be described below with reference to the drawings. Since the lead frame produced by punching from the Cu alloy plate has poor wettability as it is, various degreasing treatments are performed as shown in FIG.
After neutralization and chemical polishing, K [Ag (CN) 2 ]
In addition to 2 to 5 g / l, for example, in a pure water containing a hydrophilic organic substance having a specific organic chain such as Nippon Electroplating Engineers Co., Ltd. trade name Etrex W-AIS as a substitution preventing agent Surface treatment is carried out by immersing for about 30 seconds to 1 minute. This time is about 1/10 of the conventional Ni plating process. As a result, as conceptually shown in FIG. 1, Ag 2 substituted with Cu adheres to the Cu alloy lead frame 1 in a porous form, and the hydrophilic organic chain 3 is bonded to Ag 2 to form the film 4. After this, after washing with water and drying, the assembly process shown in FIG. 4 is started.
【0008】別の製造工程で、シリコンウエーハにnp
nあるいはpnpの構造の形成後、切断して得たトラン
ジスタチップをリードフレームのマウント部にはんだに
よるダイボンディングを行う。溶融したはんだにより35
0 ℃の程度に加熱されるため、はんだをはじかない親水
性の表面の有機皮膜4が熱分解され、図2に示すように
Siチップ5は、表面に置換Ag2が付着したリードフレー
ム1とはんだ6により接合される。この際、リードフレ
ーム1の表面はりんを含有せず、置換Ag2が存在するた
め、はんだ6のぬれ性は良好で、はんだボイドの生成が
少ない。それ以後、ワイヤボンディング、接合被覆樹脂
(JCR) 塗布、そのJCRのキュア、樹脂モールドの
各工程を行うが、ダイボンディング時ほどの熱は加わら
ないため、置換Ag2および有機皮膜4により酸化が防止
される。従って、リードフレーム切断後、端子となる外
部リード部をはんだ浴に浸漬してはんだ皮膜を形成する
際にもフラックスを使用する必要はなく、従来技術のよ
うに洗浄工程を必要としない。In another manufacturing process, np is applied to a silicon wafer.
After forming the n or pnp structure, the transistor chip obtained by cutting is die-bonded to the mount portion of the lead frame by soldering. 35 by molten solder
Since it is heated to about 0 ° C., the organic film 4 on the hydrophilic surface that does not repel solder is thermally decomposed, and as shown in FIG.
The Si chip 5 is joined by the solder 6 to the lead frame 1 having the substitution Ag 2 attached on its surface. At this time, since the surface of the lead frame 1 does not contain phosphorus and the substitution Ag2 exists, the wettability of the solder 6 is good and the generation of solder voids is small. After that, wire bonding, joint coating resin
(JCR) coating, curing of the JCR, and resin molding are performed. However, since the heat is not applied as much as during die bonding, the substitution Ag2 and the organic film 4 prevent oxidation. Therefore, after cutting the lead frame, it is not necessary to use the flux when immersing the external lead portion to be the terminal in the solder bath to form the solder film, and the washing step unlike the prior art is not required.
【0009】[0009]
【発明の効果】本発明は、モールド型半導体素子の露出
Cu面の酸化防止などのために行っていたNiめっきの代わ
りに、AgによるCuとの置換とそのAgと結合する親水性有
機鎖による有機皮膜を用いることにより次のような低コ
スト化の効果が得られた。 (1) Niめっきよりも処理時間が大幅に短縮される。INDUSTRIAL APPLICABILITY The present invention is intended to expose a mold type semiconductor device.
Instead of Ni plating, which was used to prevent oxidation of the Cu surface, etc., the following cost reduction effect is achieved by using Ag to replace Cu with Cu and using an organic film with a hydrophilic organic chain that binds to Ag. was gotten. (1) Processing time is significantly shortened compared to Ni plating.
【0010】材料費も、K〔 Ag(CN) 2 〕を使用する
が2〜5g/l程度の量であること、Niめっき液の場合
りん濃度上昇による全液更新が必要なことを考えれば、
大幅な増加はない。 (2) Niめっきの際にめっき層に含有されるりんがはんだ
ぬれ性に影響を与えたが、無りん化と置換Agによりはん
だぬれ性が向上し、はんだのボイドが低減するため歩留
まりが向上する。Regarding the material cost, K [Ag (CN) 2 ] is used, but considering that it is an amount of about 2 to 5 g / l, and in the case of the Ni plating solution, it is necessary to renew the entire solution by increasing the phosphorus concentration. ,
There is no significant increase. (2) Phosphorus contained in the plating layer affected the solder wettability during Ni plating, but the solder wettability is improved by non-phosphorization and substitution Ag, and the solder voids are reduced, improving the yield. To do.
【0011】(3) 端子部のはんだ皮膜を形成する場合、
フラックスを用いる必要がないため、洗浄工程を省略で
きる。(3) When forming a solder film on the terminals,
Since it is not necessary to use the flux, the cleaning process can be omitted.
【図1】本発明による製造工程の表面処理後におけるリ
ードフレーム表面の概念的断面図FIG. 1 is a conceptual cross-sectional view of a lead frame surface after surface treatment in a manufacturing process according to the present invention.
【図2】図1の部分のダイボンディング後の概念的断面
図2 is a conceptual cross-sectional view of the portion of FIG. 1 after die bonding.
【図3】本発明の一実施例におけるリードフレーム処理
の工程図FIG. 3 is a process diagram of lead frame processing in one embodiment of the present invention.
【図4】本発明の一実施例における素子組立の工程図FIG. 4 is a process diagram of element assembly in one embodiment of the present invention.
1 リードフレーム 2 置換Ag 3 親水性有機鎖 4 皮膜 5 Siチップ 6 はんだ 1 Lead frame 2 Substituted Ag 3 Hydrophilic organic chain 4 Coating 5 Si chip 6 Solder
Claims (3)
ト部に半導体素体を固着し、少なくともリードフレーム
の外部リード部の先端を露出させて樹脂により封止する
モールド型半導体素子の製造方法において、リードフレ
ームの表面に銀シアン化カリウムおよび親水性有機物の
含まれる水を接触させ、表面皮膜を形成したのち、リー
ドフレームのマウント部にはんだにより半導体素体を固
着する工程を含むことを特徴とするモールド型半導体素
子の製造方法。1. A method of manufacturing a mold-type semiconductor element, comprising: fixing a semiconductor element body to a mount portion of a lead frame made of a copper-based material; exposing at least the tip of an external lead portion of the lead frame and sealing with a resin. A mold comprising a step of contacting the surface of the lead frame with water containing potassium potassium cyanide and a hydrophilic organic substance to form a surface film, and then fixing the semiconductor element body to the mount portion of the lead frame with solder. Manufacturing method of semiconductor device.
体素体表面上の電極に外部リード部を導線のボンディン
グにより接続する工程、半導体素体表面上に接合被覆樹
脂を塗布する工程および封止樹脂を成形する工程を含む
請求項1記載のモールド型半導体素子の製造方法。2. A step of connecting an external lead portion to an electrode on the surface of the semiconductor element body by bonding a conductor after the step of fixing the semiconductor element body, a step of applying a bonding coating resin on the surface of the semiconductor element body, and The method for manufacturing a mold-type semiconductor element according to claim 1, including a step of molding a sealing resin.
はんだ浴に浸漬する工程を含む請求項1あるいは2記載
のモールド型半導体素子の製造方法。3. The method of manufacturing a mold type semiconductor device according to claim 1, further comprising the step of immersing the external lead portion exposed from the sealing resin in a solder bath.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP13224993A JPH06349998A (en) | 1993-06-03 | 1993-06-03 | Manufacture of molded semiconductor element |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP13224993A JPH06349998A (en) | 1993-06-03 | 1993-06-03 | Manufacture of molded semiconductor element |
Publications (1)
Publication Number | Publication Date |
---|---|
JPH06349998A true JPH06349998A (en) | 1994-12-22 |
Family
ID=15076860
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP13224993A Pending JPH06349998A (en) | 1993-06-03 | 1993-06-03 | Manufacture of molded semiconductor element |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPH06349998A (en) |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US5780931A (en) * | 1995-06-09 | 1998-07-14 | Mitsubishi Denki Kabushiki Kaisha | Surface mounting semiconductor device and semiconductor mounting component |
-
1993
- 1993-06-03 JP JP13224993A patent/JPH06349998A/en active Pending
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US5780931A (en) * | 1995-06-09 | 1998-07-14 | Mitsubishi Denki Kabushiki Kaisha | Surface mounting semiconductor device and semiconductor mounting component |
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