JPH06343177A - Driving circuit for matrix liquid crystal display - Google Patents

Abstract

PURPOSE:To provide a color display of high picture quality by providing a matrix circuit for selectively outputting the digital picture signals of three primary colors in the poststage of AD conversion circuits and rearranging colors corresponding to the arraying order of the primary colors made correspond to the picture elements of a matrix liquid crystal display. CONSTITUTION:Horizontal synchronizing signals and vertical synchronizing signals are received from a color television signal processing circuit 1 and a control circuit 6 generates the various kinds of timing signals. The timing signals include AD conversion clocks, the electrode selecting clock of a common electrode driving circuit 7, AC inversion signals, data write clocks to picture element electrode circuits 8-10, latch pulses, the AC inversion signals and the timing signals to the matrix circuit 5, etc. Then, the analog video signals of the three primary colors, RGB, are respectively connected to the AD conversion circuits 2, 3 and 4 and converted to digital signals at a prescribed clock timing. In this case, after AD conversion is performed in three systems, the video signals are rearranged by using the matrix circuit 5.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a liquid crystal color television and to its constitution.

[0002]

2. Description of the Related Art Conventionally, various types of liquid crystal have been put into practical use, such as guest-host type, color-polarizing type, and color-filter type, but for television display, high-density pixel technology, three primary color generation methods, and brightness There are problems such as improvement, and what has been attempted so far is a method of solving the problem by using an active matrix such as TFT.

[0003]

However, manufacturing a liquid crystal panel using an active matrix has drawbacks that it is difficult to reduce the cost, and it is difficult to make a large-sized panel. Is advantageous. However, colorization of the multi-matrix panel has not been put to practical use because signal processing and terminal processing are difficult. It is an object of the present invention to specifically propose a configuration, signal processing, and terminal processing of a liquid crystal color television using a multi-matrix panel.

[0004]

A color television signal processing circuit, an AD conversion circuit for digitizing a video signal, a matrix circuit for rearranging the digitized video signal as a display column, and a circuit for receiving each of the circuits in response to a television synchronizing signal. A control circuit that supplies signals necessary for controlling the operation timing, a pixel electrode drive circuit, a common electrode drive circuit,
It is composed of a dot matrix liquid crystal display, a cut filter, and a backlight, and the AD conversion circuit is an RGB
It is characterized in that three series are provided corresponding to the three primary colors.

[0005]

DESCRIPTION OF THE PREFERRED EMBODIMENTS The present invention will be described below with reference to the drawings.

FIG. 1 is a block diagram of the main components of the liquid crystal color television of the present invention. Portions not directly related to the present invention have been omitted or simply shown. Reference numeral 1 in FIG. 1 denotes a color television signal processing circuit which receives television radio waves, performs sync signal separation, color signal processing, etc., and generates RGB three primary color signals. The configuration itself of this color television signal processing circuit is a well-known technique. The analog video signals of the three primary colors of RGB are respectively connected to the AD conversion circuits 2, 3 and 4 and converted into digital signals at a predetermined clock timing. For television, 4-bit digitalization is sufficient. The frequency of the AD conversion clock changes depending on the number of horizontal pixels of the dot matrix liquid crystal display 11. In the case of a small-sized television, the number of pixels in the vertical and horizontal directions is half that of a normal home TV receiver in many cases, and at that time, the AD conversion clock is a clock of 4 to 5 MHz. A method of providing a matrix switching circuit after RGB analog output and using only one AD conversion circuit is conceivable, but an analog switch is required for the matrix switching circuit, and AD conversion is also required from the viewpoint of noise suppression.
This embodiment is more advantageous in that the video signals are rearranged by using the matrix circuit 5 after performing the system.

The control circuit 6 receives various horizontal synchronizing signals and vertical synchronizing signals from the color television signal processing circuit 1 to generate various timing signals. This includes an AD conversion clock, an electrode selection clock of the common electrode drive circuit 7, an AC inversion signal, a data writing clock to the pixel electrode circuits 8 to 10, a latch pulse, an AC inversion signal, a timing signal to the matrix circuit 5, and the like. included. The pixel electrode drive circuits 8 to 10 need to read 4-bit data output from the matrix circuit into a series shift register at a predetermined timing, and display the data in the memory by a rush pulse synchronized with the common electrode selection clock. It has a built-in data memory for frames. Conversion from 4-bit data to a drive signal of 16 gradations is also performed in the pixel electrode drive circuit. The dot matrix liquid crystal display 11 employs a pixel electrode structure having a triple inversion matrix structure as shown in FIG. 2 in the example of the present invention. However, in essence, it is not necessary to stick to the triple matrix. However, when signals are distributed in an array of three primary colors as in a color television, the triple matrix is easy in terms of circuit processing.

FIG. 2 shows how the pixel electrodes are arranged.
It is an example of a liquid crystal display used in the present invention. 12 to 1
Reference numeral 4 denotes a lead-out electrode terminal, and the rows of the terminals 12 and the rows of the terminals 14 are formed in different stages so that the connection terminal pitch is equivalently widened. As shown in the figure, the row of the terminals 12 extracts and displays the RGB RGB signal row from the first horizontal scanning signal, and further displays the sixth horizontal scanning signal BRGB.
The signal train of RG is taken out and displayed. Therefore, 4-bit data to the pixel electrode drive circuit 8 connected to the column of the terminal 12 is generated as a signal of the RGB column from the (1 + 6n) horizontal scanning signal in the matrix circuit. Here, n is 0 or an integer. The pixel electrode drive circuit 9 is the terminal row 1
4 is connected, but in this case, it is a BRG or RGB signal sequence. However, the pixel electrode drive circuit 10 connected to the terminal row 13 may be a signal row of only GBR. Here, it is important to note that the arrangement of RGB of the three primary colors is not limited to this row, and there are various arrangements. FIG. 2 shows a part of the pixel electrode. In reality, this arrangement is repeated to form 30,000 to 50,000 pixels or more. A color filter that generates the three primary colors of RBG is arranged corresponding to each pixel electrode. The display electrode only controls the degree of on-off of the liquid crystal, and the actual color is to see the light of the white backlight placed on the back through the color filter.

FIG. 3 is a logic diagram of a part of the structure of the matrix circuit, and shows a circuit for producing data to be supplied to the pixel electrode drive circuit 8. Reference numeral 15 is a 6-divided circuit, in which the horizontal synchronizing signal is input to the terminal 16 and
Six horizontal scanning periods of n + 3, 6n + 4, and 6n + 5 are formed so that they can be discriminated. That is, when the first horizontal synchronizing signal is input, the output 1 becomes high level, the other outputs are low level,
When the horizontal synchronizing signal is input, the output 2 is set to the high level and the other outputs are set to the low level. Reference numeral 17 is a circuit for dividing the AD conversion clock into three, and the AD conversion clock is input to the input 18. This clock has the same cycle as the clock for reading data into the pixel electrode drive circuit. This is R
Used for rearranging color signals such as GB. Reference numeral 19 is an AND circuit symbol, and 20 is an OR circuit symbol. R _{1 to} R ₈ are outputs of the AD conversion circuit 2 receiving a red signal, G _{1 to} G ₈ are outputs of the AD conversion circuit 3, and B _{1 to} B ₈ are outputs of the AD conversion circuit 4. As a result, the inputs D _{1 to} D ₈ to the pixel electrode drive circuit 8 are supplied with RG during the horizontal scanning period of 6n + 1.
BRGB signal train, BRGBRG in 6n horizontal scanning period
Signal sequence is generated. Other signal trains can be formed in the same manner. In this example, the drive signal for the common electrode is switched every three horizontal scanning periods, so that the clock can be generated using the output a of the three-division circuit 17 in FIG.

[0010]

As described above, according to the embodiments of the present invention, a liquid crystal display color television can be constructed without using an active matrix, which greatly contributes to the realization of a large-sized and inexpensive thin color television.

[Brief description of drawings]

FIG. 1 is a block diagram of main components of a liquid crystal color television of the present invention.

FIG. 2 is a diagram showing a part of how pixel electrodes are arranged.

FIG. 3 is a partial logic diagram of the configuration of a matrix circuit.

[Explanation of symbols]

 DESCRIPTION OF SYMBOLS 1 Color television signal processing circuit 2-4 AD conversion circuit 5 Matrix circuit 6 Control circuit 7 Common electrode drive circuit 8-10 Pixel electrode drive circuit 11 Dot matrix liquid crystal display body 12-14 Lead-out terminal part of pixel electrode 15 6 division circuit 17 3 division circuit 19 AND circuit symbol 20 OR circuit symbol

[Procedure amendment]

[Submission date] September 8, 1993

[Procedure Amendment 1]

[Document name to be amended] Statement

[Name of item to be amended] Title of invention

[Correction method] Change

[Correction content]

Driver circuit for matrix liquid crystal display

[Procedure Amendment 2]

[Document name to be amended] Statement

[Name of item to be amended] Claims

[Correction method] Change

[Correction content]

[Claims]

[Procedure 3]

[Document name to be amended] Statement

[Correction target item name] 0001

[Correction method] Change

[Correction content]

[0001]

The present invention relates to a matrix liquid crystal display body.
Regarding a drive circuit.

[Procedure amendment 4]

[Document name to be amended] Statement

[Name of item to be corrected] 0002

[Correction method] Change

[Correction content]

[0002]

2. Description of the Related Art Conventionally, a liquid crystal display of a guest host
Type, color polarizing plate type, color filter type
However, high-definition pixel technology and three primary colors are used for TV display.
There are challenges such as raw method and improvement of brightness, so far tried
It uses an active matrix such as TFT
This is the way to try.

[Procedure Amendment 5]

[Document name to be amended] Statement

[Name of item to be corrected] 0003

[Correction method] Change

[Correction content]

[0003]

Such a color liquid crystal
In the display, the analog video signals of the three primary colors are
Switch to rearrange and supply to the drive circuit
However, the switching noise of the analog switch
When mixed in the analog signal, the S / N ratio deteriorates and the image quality deteriorates.
Invite. The present invention solves such a problem and has a high S / N ratio.
And realize a drive circuit that enables high-quality color display.
aimed to.

[Procedure correction 6]

[Document name to be amended] Statement

[Correction target item name] 0004

[Correction method] Change

[Correction content]

[0004]

SUMMARY OF THE INVENTION A plurality of such inventions are provided.
Pixels are arranged in a matrix, and the column direction of the arrangement is predetermined
The unit is the N primary colors arranged in order, and the row direction is predetermined
With the M primary colors arranged in order as a unit,
Matrix in which three primary colors are repeatedly associated with pixels
A driving circuit for a liquid crystal display, which is an analog image of three primary colors
A signal processing circuit for outputting a signal, and the analogs of the three primary colors
Converting video signals to digital video signals of 3 primary colors 3
Series AD conversion circuit and the image of the matrix liquid crystal display
According to the arrangement order of the primary colors associated with the primes, the AD
Selects and outputs the digital video signal output from the conversion circuit.
And a matrix circuit that outputs from the matrix circuit
The matrix liquid crystal display according to the digital video signal
Outputs display signals that are supplied to the pixel electrodes of the pixels on each column of the body
And a matrix circuit for driving the matrix circuit.
N horizontal scans that scan the rows of the Trix liquid crystal display array
A first digital signal for repeatedly determining the inspection period,
Determine the arrangement order of M primary colors in each horizontal scanning period
And a second digital signal for
The digital signals of the three primary colors output from the AD conversion circuit.
That it is a digital circuit that selectively outputs digital video signals
Characterize.

[Procedure Amendment 7]

[Document name to be amended] Statement

[Correction target item name] 0006

[Correction method] Change

[Correction content]

FIG. 1 is a schematic diagram of a matrix liquid crystal display of the present invention.
It is a block diagram of a main component of a liquid crystal color television using a dynamic circuit . Portions not directly related to the present invention have been omitted or simply shown. Reference numeral 1 in FIG. 1 denotes a color television signal processing circuit which receives television radio waves, performs sync signal separation, color signal processing, etc., and generates RGB three primary color signals. The configuration itself of this color television signal processing circuit is a well-known technique. The analog video signals of the three primary colors of RGB are respectively connected to the AD conversion circuits 2, 3 and 4 and converted into digital signals at a predetermined clock timing. For television, 4-bit digitalization is sufficient. The frequency of the AD conversion clock changes depending on the number of horizontal pixels of the dot matrix liquid crystal display 11. In the case of a small-sized television, the number of pixels is half that of a normal home TV receiver in many cases.
The D conversion clock is a 4 to 5 MHz clock. RG
A method of providing a matrix switching circuit after the analog output of B and using only one AD conversion circuit is conceivable, but an analog switch is required for the matrix switching circuit, and after performing AD conversion with three systems from the viewpoint of noise suppression. The present embodiment in which the video signals are rearranged using the matrix circuit 5 is more advantageous.

[Procedure Amendment 8]

[Document name to be amended] Statement

[Correction target item name] 0009

[Correction method] Change

[Correction content]

FIG. 3 is a logic diagram of a part of the structure of the matrix circuit, and shows a circuit for producing data to be supplied to the pixel electrode drive circuit 8. Reference numeral 15 is a 6-divided circuit, and a horizontal synchronizing signal is input to the terminal 16 and
Six horizontal scanning periods of 3,6n + 4,6n and 5,6n + 6 are formed so that they can be discriminated. That is, when the first horizontal synchronizing signal is input, the output 1 is at a high level, the other output is at a low level, and when the second horizontal synchronizing signal is input, the output 2 is at a high level and the other output is at a low level. To do. Reference numeral 17 is a circuit that divides the AD conversion clock into three, and an AD is input 18
Enter the conversion clock. This clock has the same cycle as the clock for reading data into the pixel electrode drive circuit.
This is used for rearranging color signals such as RGB. 19
Is an AND circuit symbol, and 20 is an OR circuit symbol. R ₁ ~
R ₈ is the output of the AD conversion circuit 2 receiving the red signal, G ₁ ~
Similarly, G ₈ is the output of the AD conversion circuit 3, and B _{1 to} B ₈ are A
This is the output of the D conversion circuit 4. Thus, the input _D 1 to D ₈ to the pixel electrode driving circuit 8, 6n + 1 for RGBRGB signal sequence of the horizontal scanning period, the signal sequence of BRGBRG the horizontal scanning period of 6n + 6 occurs. Other signal trains can be formed in the same manner. In this example, the drive signal for the common electrode is switched every three horizontal scanning periods, so that the clock can be generated using the output a of the three-division circuit 17 in FIG.

[Procedure Amendment 9]

[Document name to be amended] Statement

[Correction target item name] 0010

[Correction method] Change

[Correction content]

[0010]

As described above, the matrix liquid of the present invention
The drive circuit of the crystal display is based on the array of matrix liquid crystal display.
It is possible to repeatedly determine N horizontal scanning periods for scanning a row.
For the first digital signal and M originals in each horizontal scanning period.
From the second digital signal for determining the color arrangement order
Based on the logic that is configured, the three primary color digital video signals
A matrix circuit consisting of digital circuits for selective output
Pixels of matrix liquid crystal display provided in the latter stage of the D conversion circuit
Rearrangement of colors according to the arrangement order of the primary colors associated with
It was done. According to the present invention, the digital image
The image signal is digital by the logic that consists of digital signals.
Since it is selected by the circuit, switching noise is added to the video signal.
Higher image quality with high S / N ratio
The image is obtained. Also, analog switches with excellent high-frequency characteristics
To reduce the size of the matrix circuit without using a switch
be able to.

[Procedure Amendment 10]

[Document name to be amended] Statement

[Name of item to be corrected] Brief description of the drawing

[Correction method] Change

[Correction content]

[Brief description of drawings]

FIG. 1 uses a drive circuit for a matrix liquid crystal display of the present invention.
It is a block diagram of the main constituent elements of the liquid crystal color television.

FIG. 2 is a diagram showing a part of how pixel electrodes are arranged.

FIG. 3 is a partial logic diagram of the configuration of a matrix circuit.

Claims (2)

[Claims] 1. A color television signal processing circuit, an AD conversion circuit for digitizing a video signal, a matrix circuit for rearranging the digitized video signal as a display column, and the operation timing of each circuit controlled by a television synchronizing signal. Control circuit that supplies the necessary signals to
It is characterized by comprising a pixel electrode drive circuit, a common electrode drive circuit, a dot matrix liquid crystal display, a cutter filter, and a backlight, and the AD conversion circuits are provided in three series corresponding to the three primary colors of RGB. LCD color TV. 2. When one selected from six permutations of the three primary colors is RGB, the matrix circuit is arranged so that the three A
The color display signal sequence of three kinds of permutations of RGB, GBR, and BRG is generated at the time timing corresponding to each pixel electrode by receiving the output of the D conversion circuit.
Liquid crystal display color television described.