JPH06342702A - Voltage dependent nonlinear resistor element and its manufacture - Google Patents

Voltage dependent nonlinear resistor element and its manufacture

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Publication number
JPH06342702A
JPH06342702A JP5130552A JP13055293A JPH06342702A JP H06342702 A JPH06342702 A JP H06342702A JP 5130552 A JP5130552 A JP 5130552A JP 13055293 A JP13055293 A JP 13055293A JP H06342702 A JPH06342702 A JP H06342702A
Authority
JP
Japan
Prior art keywords
voltage
oxide
porcelain
lead
bismuth oxide
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP5130552A
Other languages
Japanese (ja)
Inventor
Tetsuji Maruno
哲司 丸野
Nobuyoshi Shibata
信悦 柴田
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
TDK Corp
Original Assignee
TDK Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by TDK Corp filed Critical TDK Corp
Priority to JP5130552A priority Critical patent/JPH06342702A/en
Publication of JPH06342702A publication Critical patent/JPH06342702A/en
Pending legal-status Critical Current

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Abstract

PURPOSE:To obtain a voltage dependent nonlinear resistor different in a voltage- current curve, from the same process. CONSTITUTION:At least one kind out of bismuth oxide and lead oxide is made to exist in the state of diffusion or combination, on the interface of porcelain- electrode turning to a voltage dependent nonlinear resistor. The manufacturing method is as follows; after bismuth oxide or lead oxide is spread and baked on the surface of porcelain turning to a voltage dependent nonlinear resistor, conductive paste whose main component is metal powder glass frit is spread and baked on the above baked surface, thereby forming a metal electrode. Another method is as folows; conductive paste whose main component is metal powder glass frit and which contains bismuth oxide or lead oxide is spread and baked on the surface of the pocelain turning to the voltage dependent nonlinear resistor, thereby simultaneously performing the formation of metal electrode and the diffusion.combination of the porcelain surface of bismuth oxide or lead oxide. The conductive paste wherein bismuth oxide or lead oxide is fused in glass frit or added in the form of bismuth lead compound is used.

Description

【発明の詳細な説明】Detailed Description of the Invention

【0001】[0001]

【産業上の利用分野】本発明は、高電圧が印加されたと
きにその印加電圧により抵抗値が急速に低下する電圧非
直線抵抗体素子、いわゆるバリスタの構造及びその製造
方法に係るものである。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a structure of a voltage non-linear resistor element, a so-called varistor, whose resistance value is rapidly reduced by a high voltage applied, and a method of manufacturing the same. .

【0002】[0002]

【従来の技術】低電圧・微小電流で動作するICを多用
している最近の電子装置のノイズに対する耐性は低下し
ており、ノイズによる誤動作が多々見られる。特に、電
子装置の外部で発生した高電圧のパルスや静電気等の異
常インパルス電圧が機器内に侵入したときにはその異常
インパルス電圧により電子装置が誤動作したりあるいは
最悪の場合は破壊されてしまうことがある。また、逆に
整流子モータ等内部に接点を有する機器は接点において
火花放電を発生させており、この火花放電により生じる
インパルス電圧が外部に放射され、他の機器例えば電子
装置等に侵入し誤動作あるいは破壊等の悪影響を与える
ことがある。
2. Description of the Related Art The resistance to noise of a recent electronic device which makes heavy use of ICs that operate at low voltage and minute current has been reduced, and malfunctions due to noise are often seen. In particular, when an abnormal impulse voltage such as a high-voltage pulse or static electricity generated outside the electronic device enters the equipment, the abnormal impulse voltage may cause the electronic device to malfunction or be destroyed in the worst case. . On the contrary, a device having a contact inside the commutator motor or the like causes a spark discharge at the contact, and an impulse voltage generated by the spark discharge is radiated to the outside to invade another device such as an electronic device or malfunction or May cause adverse effects such as destruction.

【0003】このような問題に対処するために、電圧に
より抵抗値が急速に低下する電圧非直線抵抗体素子、い
わゆるバリスタを用いてインパルス電圧をバイパスさせ
てインパルス電圧の電子装置への侵入を防止、あるいは
インパルス電圧の機器害への放射を防止している。
In order to cope with such a problem, a voltage non-linear resistor element, which is a so-called varistor whose resistance value is rapidly decreased by voltage, is used to bypass the impulse voltage and prevent the impulse voltage from entering the electronic device. Or, the radiation of the impulse voltage to the equipment is prevented.

【0004】このバリスタには、特開昭57−2073
19号公報,特開昭60−206001号公報,特開昭
61−44405号公報等に記載されたセラミックの外
側にバリスタ層を形成したバリスタ及び特公昭43−2
9500,特開昭57−27001号公報等に記載され
たセラミック中の結晶粒界にバリスタ層を形成したバリ
スタがある。
This varistor is disclosed in JP-A-57-2073.
No. 19, JP-A-60-206001, JP-A-61-44405, and the like, and a varistor in which a varistor layer is formed on the outside of a ceramic, and JP-B-43-2.
9500, Japanese Patent Laid-Open No. 57-27001 and the like, there is a varistor in which a varistor layer is formed at a grain boundary in a ceramic.

【0005】これらの電圧非直線性抵抗体において、外
部との電気的接続を行うために電極を取り付けるが、そ
の場合にオーム接触を得るための材料としてAg−A
l,Ag−InGa,Ag−Zn等の電極材料が、非オ
ーム接触を得るための電極材料としてCu用いられる
が、金属粉末としてAgのみを含む電極材料の場合には
その焼き付け時に電極−磁器界面に形成される高抵抗層
の存在が特性変動の原因となるため、製造時にこの高抵
抗層をパルス電圧を印加することにより破壊する必要が
ある。
In these voltage non-linear resistors, electrodes are attached in order to make an electrical connection with the outside. In that case, Ag-A is used as a material for obtaining ohmic contact.
Although Cu is used as an electrode material for obtaining non-ohmic contact, an electrode material such as 1, Ag-InGa, Ag-Zn is used, but in the case of an electrode material containing only Ag as a metal powder, an electrode-porcelain interface is formed at the time of baking. Since the existence of the high resistance layer formed on the substrate causes characteristic fluctuation, it is necessary to destroy this high resistance layer by applying a pulse voltage during manufacturing.

【0006】また、電圧非直線抵抗体素子の電気特性は
電極材料の種類や形成方法によって大きく変化するが、
特に電圧非直線抵抗体素子の主要な電気特性である非直
線性はセラミック基体の組成や処理によって決定される
ため、同一工程から異なった電圧−電流カーブの電圧非
直線抵抗体を得ることができない。そのため、必要とさ
れる電圧−電流カーブ毎にセラミック基体の製造工程を
変更する必要がある。
The electrical characteristics of the voltage non-linear resistance element vary greatly depending on the type of electrode material and the forming method.
In particular, since the non-linearity which is the main electrical characteristic of the voltage non-linear resistance element is determined by the composition and treatment of the ceramic substrate, it is not possible to obtain voltage non-linear resistances with different voltage-current curves from the same process. . Therefore, it is necessary to change the manufacturing process of the ceramic substrate for each required voltage-current curve.

【0007】[0007]

【発明が解決しようとする課題】本発明は、希望する電
圧−電流カーブ毎にセラミック基体の製造工程を変更す
る必要があった上記従来の電圧非直線抵抗体に代えて、
同一工程から異なった電圧−電流カーブの電圧非直線抵
抗体を得ることができる電圧非直線抵抗体及び電圧非直
線抵抗体の製造方法を提供することを課題とする。
SUMMARY OF THE INVENTION The present invention replaces the above-mentioned conventional voltage non-linear resistor in which the manufacturing process of the ceramic substrate has to be changed for each desired voltage-current curve.
An object of the present invention is to provide a voltage non-linear resistor and a method for manufacturing the voltage non-linear resistor that can obtain voltage non-linear resistors having different voltage-current curves from the same process.

【0008】[0008]

【課題を解決するための手段】上記課題を解決するため
に、本願においてはセラミック基体−電極界面に酸化ビ
スマスあるいは鉛酸化が拡散層あるいは磁器表面と化合
物を形成した非直線抵抗体素子及びその製造方法の発明
すなわち「電圧非直線抵抗体となる磁器−電極界面にビ
スマス酸化あるいは酸化鉛の少なくとも一種類が拡散あ
るいは化合した状態で存在することを特徴とする電圧非
直線抵抗体素子」であることを構成とする発明及び「電
圧非直線抵抗体となる磁器表面に酸化ビスマスあるいは
酸化鉛を塗布焼き付けた後、その上に金属粉末ガラスフ
リットを主成分とする導電性ペーストを塗布・焼付して
金属電極を形成することを特徴とする電圧非直線抵抗体
素子の製造方法」、「電圧非直線抵抗体となる磁器表面
に金属粉末ガラスフリットを主成分とし酸化ビスマスあ
るいは酸化鉛を含有した導電性ペーストを塗布・焼付す
ることにより金属電極の形成と酸化ビスマスあるいは酸
化鉛の磁器表面の拡散・化合を同時に行うことを特徴と
する電圧非直線抵抗体素子の製造方法」、「酸化ビスマ
スあるいは酸化鉛はガラスフリットに溶融せしめたある
いはビスマス,鉛化合物の型で添加された導電性ペース
トを使用することを特徴とする電圧非直線抵抗体素子の
製造方法」であることを構成とする発明を提供する。
In order to solve the above-mentioned problems, in the present application, a non-linear resistor element in which bismuth oxide or lead oxide forms a compound with a diffusion layer or a porcelain surface at a ceramic substrate-electrode interface and its manufacture Invention of the method, that is, "voltage nonlinear resistor element characterized in that at least one kind of bismuth oxide or lead oxide is present in a diffused or combined state at the porcelain-electrode interface to be a voltage nonlinear resistor" And a bismuth oxide or lead oxide is applied and baked on the surface of the porcelain to be the voltage non-linear resistor, and then a conductive paste containing metal powder glass frit as a main component is applied and baked on the metal. Method for manufacturing voltage non-linear resistance element characterized by forming electrodes "," Metal powder glass on porcelain surface to be voltage non-linear resistance element " A non-voltage characteristic characterized by simultaneously forming and forming a metal electrode and diffusing / combining bismuth oxide or lead oxide on the porcelain surface by applying and baking a conductive paste containing lit as a main component and containing bismuth oxide or lead oxide. Method for manufacturing linear resistor element "," Bismuth oxide or lead oxide is a voltage non-linear resistor element characterized by using a conductive paste melted in glass frit or added in the form of bismuth, lead compound The manufacturing method of the invention is provided.

【0009】[0009]

【作用】上記構成を有する本願発明においては、拡散層
の厚み、酸化ビスマスあるいは酸化鉛濃度によって素子
の電圧非直線性が変化する。
In the present invention having the above structure, the voltage non-linearity of the element changes depending on the thickness of the diffusion layer and the concentration of bismuth oxide or lead oxide.

【0010】図及び表を用いて本願発明の実施例を説明
する。 第1実施例 図1に本願発明の製造方法の第1実施例工程図を示す。
Embodiments of the present invention will be described with reference to the drawings and tables. First Embodiment FIG. 1 shows a process chart of a first embodiment of the manufacturing method of the present invention.

【0011】(1) セラミック基体としてSrTiO
3セラミックを使用し、1480℃の中性雰囲気(N2
中で焼成を行ってセラミックを得た。
(1) SrTiO 3 as a ceramic substrate
3 Ceramics are used, 1480 ℃ neutral atmosphere (N 2 )
Firing was performed in it to obtain a ceramic.

【0012】(2) Bi23,Pb34それぞれ10
0部をビヒクル50部に分散させることにより第1ペー
ストを得る。
(2) 10 each of Bi 2 O 3 and Pb 3 O 4
A first paste is obtained by dispersing 0 parts in 50 parts vehicle.

【0013】(3) セラミック基体の表面にBi
23,Pb34それぞれ100部をビヒクル50部に分
散させて得られたペーストを0〜0.3mg/cm2の塗布量
で印刷塗布する。
(3) Bi on the surface of the ceramic substrate
A paste obtained by dispersing 100 parts of each of 2 O 3 and Pb 3 O 4 in 50 parts of a vehicle is applied by printing at a coating amount of 0 to 0.3 mg / cm 2 .

【0014】(4)800℃の大気中で安定させて20
分間熱処理して電圧非直線抵抗セラミックを得る。
(4) Stabilize in air at 800 ° C. to 20
Heat treatment for minutes to obtain a voltage non-linear resistance ceramic.

【0015】(5)Ag粉末100部とZnOを主成分
とするガラス3部を30部のビヒクルに分散させて第2
ペーストを得る。
(5) Second, by dispersing 100 parts of Ag powder and 3 parts of glass containing ZnO as a main component in 30 parts of a vehicle.
Get the paste.

【0016】(6)得られた第2ペーストをスクリーン
印刷によって電圧非直線抵抗セラミック表面に塗布、乾
燥する。
(6) The obtained second paste is applied to the surface of the voltage non-linear resistance ceramic by screen printing and dried.

【0017】(7)800℃の大気中で10分熱処理す
ることによりAg電極を形成する。
(7) An Ag electrode is formed by heat treatment at 800 ° C. for 10 minutes.

【0018】また、上記第1実施例(5),(6)及び
(7)のAg電極を形成する工程に代えて、Cu電極を
形成する第2実施例の工程、すなわち、 (5')Cu粉末100部とZnOを主成分とするガラ
ス3部を30部のビヒクルに分散させて第2ペーストを
得る。 (6')得られた第2ペーストをスクリーン印刷によっ
て塗布・乾燥する。 (7')800℃の中性雰囲気中で10分間の条件でC
u電極を形成する。との工程にすることも可能である。
Further, instead of the step of forming the Ag electrode of the first embodiment (5), (6) and (7), the step of the second embodiment of forming a Cu electrode, that is, (5 ') A second paste is obtained by dispersing 100 parts of Cu powder and 3 parts of glass containing ZnO as a main component in 30 parts of a vehicle. (6 ') The obtained second paste is applied and dried by screen printing. (7 ') C at 800 ° C in a neutral atmosphere for 10 minutes
The u electrode is formed. It is also possible to use the process of.

【0019】第1ペーストの塗布量を各々0.05mg
/cm2,0.1mg/cm2,0.2mg/cm2,0.3mg/
cm2とし、各々の電圧非直線抵抗体試料についてバリス
タ電圧E10、非直線係数α、半田耐熱後E10変化率及び
耐パルス後E10変化率について測定した結果を表1に示
す。
The coating amount of the first paste is 0.05 mg each
/ Cm 2 , 0.1 mg / cm 2 , 0.2 mg / cm 2 , 0.3 mg /
cm 2, and shows the varistor voltage E 10 for each of the voltage nonlinear resistor samples, nonlinearity coefficient alpha, the result of measurement for the solder heat after E 10 conversion and resistant pulses after E 10 change rate in Table 1.

【0020】これらのデータは次のようにして得たもの
である。 バリスタ電圧E10は、電圧非直線抵抗体に10mAの
電流を流すために必要な電圧値。 非直線係数αは、電圧非直線抵抗体に1mAの電流
を流すために必要な電圧値をE1としたときに1/(l
ogE10/E1)により求めた。 半田耐熱後E10変化率は、共晶半田を鏝先温度35
0℃で3秒間の半田付けを行った後のE10の変化率
(%)。 耐パルス後E10変化率は、30V及び60Vのパル
ス電圧を印加した後のE10の変化率(%)。
These data are obtained as follows. The varistor voltage E 10 is a voltage value required to flow a current of 10 mA through the voltage nonlinear resistor. The nonlinear coefficient α is 1 / (l when the voltage value required to flow a current of 1 mA through the voltage nonlinear resistor is E 1.
ogE 10 / E 1 ). E 10 rate of change after solder heat resistance is calculated by using eutectic solder with a tip temperature of 35
E 10 change rate (%) after soldering at 0 ° C. for 3 seconds. The E 10 change rate after the pulse resistance is the change rate (%) of E 10 after the pulse voltage of 30 V and 60 V was applied.

【0021】なお、比較例としてInGaアマルガム法
によって電極を形成したものの測定結果も同時に示し
た。その結果を表1に示す。
As a comparative example, measurement results of an electrode formed by the InGa amalgam method are also shown. The results are shown in Table 1.

【表1】 [Table 1]

【0022】表1から明らかなように、試料No.2〜1
9においては電極材料としてAgあるいはCuを用いて
いるにもかかわらず、Bi23あるいはPb34の塗布
量が増えるに従ってE10の変化量も実用可能なレベルと
なっている。
As is clear from Table 1, sample Nos. 2 to 1
In No. 9, although Ag or Cu is used as the electrode material, the change amount of E 10 is at a practical level as the coating amount of Bi 2 O 3 or Pb 3 O 4 increases.

【0023】第2実施例 第2実施例においては、第1実施例と同じ条件によって
工程(1)で得た磁器の表面に粒子径0.1〜0.3μm
のCu粉末100部とZnOを主成分とするガラス3部
とBi23,Pb34それぞれ0〜5部を30部のビヒ
クルに分散させペーストを塗布した後、800℃の中性
雰囲気中で10分間熱処理することによりCu電極を形
成した。
Second Example In the second example, the particle size was 0.1 to 0.3 μm on the surface of the porcelain obtained in the step (1) under the same conditions as in the first example.
Of Cu powder of 100 parts, 3 parts of glass containing ZnO as a main component, and 0 to 5 parts of Bi 2 O 3 and Pb 3 O 4 respectively are dispersed in 30 parts of a vehicle and a paste is applied, and then a neutral atmosphere at 800 ° C. A Cu electrode was formed by heat-treating for 10 minutes.

【0024】このようにして得られた第2実施例の電圧
非直線抵抗体試料について、第1実施例と同じ評価を行
った結果を表2に示す。
Table 2 shows the results of the same evaluation as that of the first embodiment performed on the voltage nonlinear resistor sample of the second embodiment thus obtained.

【表2】 [Table 2]

【0025】表2から、電極中へのBi23あるいはP
34の増加と共に表1と同様にバリスタ電圧およびα
の増加が見られることから、同一抵抗体によっても電極
材料によって電圧非直線性をコントロールすることがで
きることが明かである。
From Table 2, Bi 2 O 3 or P in the electrode
As shown in Table 1, the varistor voltage and α increase with increasing b 3 O 4.
It is clear that the voltage non-linearity can be controlled by the electrode material even with the same resistor, since the increase in the voltage is observed.

【0026】[0026]

【発明の効果】以上述べたように、本発明によって得ら
れた電圧非直線抵抗体素子は、同一のセラミック基体を
用いた場合であってもバリスタ特性を示す材料であるB
23あるいはPb34のセラミック基体表面における
拡散あるいは化合物の形成によって電圧非直線性をコン
トロールすることができる。なお、工業的には第2実施
例で示したように電極材料にBi23あるいはPb34
を添加する方法の方が適していると考えられる。
As described above, the voltage non-linear resistor element obtained by the present invention is a material which exhibits varistor characteristics even when the same ceramic substrate is used.
The voltage nonlinearity can be controlled by diffusion of i 2 O 3 or Pb 3 O 4 on the surface of the ceramic substrate or formation of a compound. Industrially, as shown in the second embodiment, Bi 2 O 3 or Pb 3 O 4 was used as the electrode material.
The method of adding is considered to be more suitable.

【図面の簡単な説明】[Brief description of drawings]

図1 本願発明の製造方法の第1実施例工程図工程図。 1 is a process diagram of a first embodiment of the manufacturing method of the present invention.

Claims (4)

【特許請求の範囲】[Claims] 【請求項1】 電圧非直線抵抗体となる磁器−電極界面
に酸化ビスマスあるいは酸化鉛の少なくとも一種類が拡
散、あるいは化合した状態で存在することを特徴とする
電圧非直線抵抗体素子。
1. A voltage non-linear resistance element, wherein at least one kind of bismuth oxide or lead oxide is present in a state of being diffused or combined at a porcelain-electrode interface to be a voltage non-linear resistance.
【請求項2】 電圧非直線抵抗体となる磁器表面に酸化
ビスマスあるいは酸化鉛を塗布焼き付けた後、その上に
金属粉末ガラスフリットを主成分とする導電性ペースト
を塗布・焼付して金属電極を形成することを特徴とする
電圧非直線抵抗体素子の製造方法。
2. A bismuth oxide or lead oxide is applied and baked on the surface of a porcelain which is a voltage non-linear resistor, and then a conductive paste containing metal powder glass frit as a main component is applied and baked on the porcelain to form a metal electrode. A method of manufacturing a voltage non-linear resistor element, which is characterized by being formed.
【請求項3】 電圧非直線抵抗体となる磁器表面に金属
粉末ガラスフリットを主成分とし酸化ビスマスあるいは
酸化鉛を含有した導電性ペーストを塗布・焼付すること
により金属電極の形成と酸化ビスマスあるいは酸化鉛の
磁器表面の拡散・化合を同時に行うことを特徴とする電
圧非直線抵抗体素子の製造方法。
3. The formation of a metal electrode and the formation of bismuth oxide or oxidation by applying and baking a conductive paste containing metal powder glass frit as a main component and containing bismuth oxide or lead oxide on the surface of a porcelain serving as a voltage nonlinear resistor. A method of manufacturing a voltage non-linear resistance element, which comprises simultaneously diffusing and compounding a surface of lead porcelain.
【請求項4】 前記酸化ビスマスあるいは酸化鉛はガラ
スフリットに溶融せしめたあるいはビスマス,鉛化合物
の型で添加された導電性ペーストを使用することを特徴
とする電圧非直線抵抗体素子の製造方法。
4. A method of manufacturing a voltage non-linear resistor element, wherein a conductive paste in which bismuth oxide or lead oxide is melted in a glass frit or added in the form of a bismuth or lead compound is used.
JP5130552A 1993-06-01 1993-06-01 Voltage dependent nonlinear resistor element and its manufacture Pending JPH06342702A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP5130552A JPH06342702A (en) 1993-06-01 1993-06-01 Voltage dependent nonlinear resistor element and its manufacture

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JP5130552A JPH06342702A (en) 1993-06-01 1993-06-01 Voltage dependent nonlinear resistor element and its manufacture

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Citations (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5266987A (en) * 1976-12-01 1977-06-02 Matsushita Electric Ind Co Ltd Manuacturing of symmetrical type voltage non-linear resistor
JPS5790931A (en) * 1980-11-27 1982-06-05 Matsushita Electric Ind Co Ltd Method of producing composite function element
JPS5812305A (en) * 1981-07-16 1983-01-24 株式会社東芝 Oxide voltage nonlinear resistor
JPS60165710A (en) * 1984-02-07 1985-08-28 株式会社村田製作所 Multifunction element
JPH0344002A (en) * 1989-07-11 1991-02-25 Matsushita Electric Ind Co Ltd Zinc oxide type varistor
JPH03159101A (en) * 1989-11-08 1991-07-09 Korea Advanced Inst Of Sci Technol Manufacture of high voltage zinc oxide varistor

Patent Citations (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5266987A (en) * 1976-12-01 1977-06-02 Matsushita Electric Ind Co Ltd Manuacturing of symmetrical type voltage non-linear resistor
JPS5790931A (en) * 1980-11-27 1982-06-05 Matsushita Electric Ind Co Ltd Method of producing composite function element
JPS5812305A (en) * 1981-07-16 1983-01-24 株式会社東芝 Oxide voltage nonlinear resistor
JPS60165710A (en) * 1984-02-07 1985-08-28 株式会社村田製作所 Multifunction element
JPH0344002A (en) * 1989-07-11 1991-02-25 Matsushita Electric Ind Co Ltd Zinc oxide type varistor
JPH03159101A (en) * 1989-11-08 1991-07-09 Korea Advanced Inst Of Sci Technol Manufacture of high voltage zinc oxide varistor

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