JPH06334015A - Method for evaluating insulating film of semiconductor device - Google Patents

Method for evaluating insulating film of semiconductor device

Info

Publication number
JPH06334015A
JPH06334015A JP11668693A JP11668693A JPH06334015A JP H06334015 A JPH06334015 A JP H06334015A JP 11668693 A JP11668693 A JP 11668693A JP 11668693 A JP11668693 A JP 11668693A JP H06334015 A JPH06334015 A JP H06334015A
Authority
JP
Japan
Prior art keywords
insulating film
electric field
measurement
evaluating
semiconductor device
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Withdrawn
Application number
JP11668693A
Other languages
Japanese (ja)
Inventor
Tomomoto Shigenobu
智基 重信
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Oki Electric Industry Co Ltd
Miyazaki Oki Electric Co Ltd
Original Assignee
Oki Electric Industry Co Ltd
Miyazaki Oki Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Oki Electric Industry Co Ltd, Miyazaki Oki Electric Co Ltd filed Critical Oki Electric Industry Co Ltd
Priority to JP11668693A priority Critical patent/JPH06334015A/en
Publication of JPH06334015A publication Critical patent/JPH06334015A/en
Withdrawn legal-status Critical Current

Links

Landscapes

  • Testing Of Individual Semiconductor Devices (AREA)
  • Testing Or Measuring Of Semiconductors Or The Like (AREA)

Abstract

PURPOSE:To provide a method for evaluating the insulating film of a semiconductor device, by which the lifetime of the insulating film can be estimated accurately, by correcting electric field applied to the insulating film of the semiconductor device. CONSTITUTION:In the method for evaluating the insulating film of a semiconductor device by which the intrinsic defective region of TDDB characteristics is estimated from TZDB measurement, Fowler-Nordheim formula is computed from the current/voltage characteristics of a low electric-field region applied to an oxide film at the time of the TZDB measurement (step S1) and the measured value of the current of a high electric-field region applied to the oxide film is obtained (step S2). An electric field, in which the measured value corresponds to the Fowler-Nordheim formula, is obtained (step S3), and corrected as the electric field applied to the oxide film (step S4).

Description

【発明の詳細な説明】Detailed Description of the Invention

【0001】[0001]

【産業上の利用分野】本発明は、MIS(Metal−
Insulator−Semiconductor)型
トランジスタ等の半導体素子の絶縁膜の評価方法、特に
その絶縁膜の寿命予測方法に関するものである。
BACKGROUND OF THE INVENTION The present invention relates to a MIS (Metal-
The present invention relates to a method for evaluating an insulating film of a semiconductor element such as an Insulator-Semiconductor type transistor, and particularly to a method for predicting the life of the insulating film.

【0002】[0002]

【従来の技術】従来、このような分野の技術としては、
例えば「Projecting Gate Oxide
Reliability and Optimizi
ngReliability Screens,REZ
A MOAZZAMI IEEE TRANSACTI
ONS ON ELECTRON DEVICES,V
OL.37,NO.7,JULY,p.1643,19
90」に開示されるものがあった。
2. Description of the Related Art Conventionally, as a technique in such a field,
For example, "Projecting Gate Oxide
Reliability and Optimize
ngReliability Screens, REZ
A MOAZZZAMI IEEE TRANSACTI
ONS ON ELECTRON DEVICES, V
OL. 37, NO. 7, JULY, p. 1643, 19
90 ”.

【0003】従来、絶縁膜の寿命を評価する方法として
は、例えば、TZDB(Time−zero−diel
ectric−breakdown)測定からTDDB
(Time−dependent−dielectri
c−breakdown)測定の寿命を予測する方法が
提案されている。ここで、TZDB測定は、ゲート電極
に印加する電圧を、ステップ又はランプ状に上げていっ
た時に、絶縁膜破壊が起こる破壊電界EBDを測定する方
法である。また、TDDB測定は、ゲート電極に一定の
電圧又は電流を印加した場合に、絶縁膜破壊が起こる破
壊時間tBDを測定する方法である。
A conventional method for evaluating the life of an insulating film is, for example, TZDB (Time-zero-diel).
ect-breakdown) measurement to TDDB
(Time-dependent-dilectri
A method of predicting the lifetime of c-breakdown) measurement has been proposed. Here, the TZDB measurement is a method of measuring the breakdown electric field E BD at which the insulation film breakdown occurs when the voltage applied to the gate electrode is increased in steps or ramps. The TDDB measurement is a method of measuring the breakdown time t BD at which the insulation film breakdown occurs when a constant voltage or current is applied to the gate electrode.

【0004】TZDB測定とTDDB測定を行う場合、
図3に示すように、評価対象となるMIS型トランジス
タ10により測定系を構成する。すなわち、MIS型ト
ランジスタ10は、半導体基板11、ゲート絶縁膜12
及びゲート電極13で構成されているが、その半導体基
板11と接地電位との間に電流計14を接続し、ゲート
電極13と接地電位との間に電源15を接続してその間
に電圧を印加する。
When performing TZDB measurement and TDDB measurement,
As shown in FIG. 3, the MIS transistor 10 to be evaluated constitutes a measurement system. That is, the MIS transistor 10 includes the semiconductor substrate 11 and the gate insulating film 12.
And a gate electrode 13, an ammeter 14 is connected between the semiconductor substrate 11 and the ground potential, and a power supply 15 is connected between the gate electrode 13 and the ground potential to apply a voltage therebetween. To do.

【0005】以下、絶縁膜の寿命予測方法を上記文献に
記載されている内容をもとに説明する。まず、絶縁膜破
壊のモデルについて説明する。絶縁膜を流れるホール電
流の総量が、ある一定量を越えた時に、絶縁膜の真性破
壊が起こると仮定すると、真性寿命tBDは以下の式で表
される。
Hereinafter, a method of predicting the life of the insulating film will be described based on the contents described in the above document. First, a model of insulation film breakdown will be described. Assuming that the intrinsic breakdown of the insulating film occurs when the total amount of hole currents flowing in the insulating film exceeds a certain amount, the intrinsic life t BD is expressed by the following formula.

【0006】 tBD=τO exp(G/EOX) =τO exp(GXOX/VOX) …(1) ここで、EOXは酸化膜(絶縁膜)にかかる電界、XOX
酸化膜厚、VOXは酸化膜にかかる電圧、τO ,Gは係数
である。しかしながら、この式では、初期・ランダム寿
命を示すことができない。
T BD = τ O exp (G / E OX ) = τ O exp (GX OX / V OX ) ... (1) where E OX is an electric field applied to an oxide film (insulating film), and X OX is an oxidation film. The film thickness, V OX is a voltage applied to the oxide film, and τ O and G are coefficients. However, this equation cannot show the initial and random lifetimes.

【0007】一般に、初期・ランダム不良は、図4に示
すような、Si基板21とゲート電極としての多結晶シ
リコン電極23との間のゲート絶縁膜22における
(a)薄いスポット(a thin spot)、
(b)ラフネス(roughness)、(c)欠陥ス
ポットの低い障壁高さ(lower barrier
height at the defect spo
t)、(d)増加したトラップ発生レート(incre
ased trap generation rat
e)により起こると言われている。
Generally, the initial and random defects are (a) thin spots in the gate insulating film 22 between the Si substrate 21 and the polycrystalline silicon electrode 23 as the gate electrode as shown in FIG. ,
(B) roughness, (c) lower barrier height of defect spots
height at the defect spo
t), (d) Increased trap generation rate (incre
based trap generation rat
It is said to be caused by e).

【0008】Hu氏のモデルでは、このような劣化原因
を全て“局所的な薄膜化ΔXeff ”に置き換えること
で、実際の酸化膜の寿命は、酸化膜厚XOXで決まるので
はなく、実効膜厚XOX−ΔXeff で決まると考えた。し
たがって、初期〜真性までの全ての寿命tBDは以下の式
で表わされる。 tBD=τO exp〔G(XOX−ΔXeff )/VOX〕 =τO exp(GXeff /VOX) …(2) ここで、Xeff は酸化膜の実効膜厚である。
In Hu's model, by replacing all such causes of deterioration with "local thinning ΔX eff ", the actual life of the oxide film is not determined by the oxide film thickness X OX , but is effective. It was considered that the film thickness was determined by X OX −ΔX eff . Therefore, the entire life t BD from the initial stage to the genuineness is expressed by the following equation. t BD = τ O exp [G (X OX −ΔX eff ) / V OX ] = τ O exp (GX eff / V OX ) ... (2) Here, X eff is the effective film thickness of the oxide film.

【0009】次に、TDDB測定による絶縁膜破壊につ
いて説明する。電流が酸化膜を介して流れることで、酸
化膜にダメージが蓄積されていき、このダメージ量が、
以下に示すようなある一定量Dに達すると、絶縁膜破壊
が起こると仮定すると、ダメージ量Dは(3) 式で表され
る。
Next, the breakdown of the insulating film by TDDB measurement will be described. As the current flows through the oxide film, damage is accumulated in the oxide film, and this damage amount is
Assuming that the insulating film is destroyed when a certain amount D as shown below is reached, the amount D of damage is expressed by equation (3).

【0010】[0010]

【数1】 [Equation 1]

【0011】ここで、V,T,Xeff はダメージを加速
する項として用いている。これを定電圧TDDBで考え
ると、定電圧TDDBは時間に対して一定のストレスを
かけるので、(3) 式は次式で表される。 D=g(VOX,T,Xeff )tBD ∴tBD=D/g(VOX,T,Xeff ) …(4) 上記(2) と上記(4) 式を比較すると、 tBD=τO (T)exp〔G(T)Xeff /VOX〕 =D/g(VOX,T,Xeff ) ∴g(VOX,T,Xeff ) =〔D/τO (T)〕exp〔−G(T)Xeff /V〕 …(5) ここで、τO (T),G(T)は係数である。
Here, V, T and X eff are used as terms for accelerating damage. Considering this with a constant voltage TDDB, the constant voltage TDDB exerts a constant stress with respect to time, and therefore the equation (3) is expressed by the following equation. D = g (V OX , T, X eff ) t BD ∴t BD = D / g (V OX , T, X eff ) ... (4) Comparing the above formula (2) with the above formula (4), t BD = Τ O (T) exp [G (T) X eff / V OX ] = D / g (V OX , T, X eff ) ∴g (V OX , T, X eff ) = [D / τ O (T )] Exp [−G (T) X eff / V] (5) where τ O (T) and G (T) are coefficients.

【0012】上記(5) 式を上記(3) 式に代入して、Substituting the above equation (5) into the above equation (3),

【0013】[0013]

【数2】 [Equation 2]

【0014】したがって、定電圧TDDBの絶縁膜破壊
は、上記(6) 式で表される。TZDB測定をランプ電圧
で行った場合、電圧と測定時間には、以下の関係が成り
立つ。 V(t) =R×t ここで、Rはランプレート(v/sec)、tは測定時
間である。
Therefore, the dielectric breakdown of the constant voltage TDDB is expressed by the above equation (6). When the TZDB measurement is performed with the lamp voltage, the following relationship holds between the voltage and the measurement time. V (t) = Rxt Here, R is a ramp rate (v / sec), and t is a measurement time.

【0015】これを上記(6) 式に代入して、Substituting this into the above equation (6),

【0016】[0016]

【数3】 [Equation 3]

【0017】VBD=RtBD,T(t) =Tvbd として、上
記(7) 式を解くと、
When V BD = Rt BD and T (t) = T vbd are solved, the above equation (7) is solved.

【0018】[0018]

【数4】 [Equation 4]

【0019】[0019]

【数5】 [Equation 5]

【0020】ここで、VBDは絶縁破壊電圧、tBDは絶縁
破壊寿命、G(Tvbd ),τO (T vbd )は係数であ
る。上記(9) 式を上記(2) 式に代入して、
Where VBDIs the breakdown voltage, tBDIs isolated
Breakdown life, G (Tvbd), ΤO(T vbd) Is a coefficient
It Substituting equation (9) into equation (2) above,

【0021】[0021]

【数6】 [Equation 6]

【0022】したがって、TDDB測定とTZDB測定
の関係は、上記(10)式で表されるため、この上記(10)式
を用いて絶縁膜の寿命予測を行う。ここで、上記(10)式
を用いて寿命予測を行うには、係数であるG(Tvbd
及びτO (Tvbd )と絶縁膜の実効膜厚Xeff を求める
必要がある。G(Tvbd )とτO (Tvbd )の算出方法
は、上記(1) 式の真性寿命を用いる。上記(1) 式の両対
数をとると、ln(tBD)と1/EOXの間に、次式のよ
うな直線関係が成り立つ。
Therefore, since the relationship between the TDDB measurement and the TZDB measurement is expressed by the above equation (10), the lifetime of the insulating film is predicted by using the above equation (10). Here, in order to predict the life using the above equation (10), a coefficient G (T vbd )
And τ O (T vbd ) and the effective film thickness X eff of the insulating film must be obtained. The method of calculating G (T vbd ) and τ O (T vbd ) uses the intrinsic life of the above equation (1). If the logarithm of the equation (1) is taken, a linear relationship as shown below is established between ln (t BD ) and 1 / E OX .

【0023】 ln(tBD)=G/EOX+ln(τO ) …(11) よって、G(Tvbd )とτO (Tvbd )は、この直線の
切片1n(τO )と、傾きGから算出できる。また、実
効膜厚Xeff は、TZDB測定により得られる絶縁破壊
電圧VBDと、係数G(Tvbd ),τO (Tvbd )を(8)
式に代入することで算出できる。
Ln (t BD ) = G / E OX + ln (τ O ) ... (11) Therefore, G (T vbd ) and τ O (T vbd ) are the intercept 1 n (τ O ) of this straight line and the slope. It can be calculated from G. Further, the effective film thickness X eff is obtained by dividing the dielectric breakdown voltage V BD obtained by the TZDB measurement and the coefficients G (T vbd ), τ O (T vbd ) into (8).
It can be calculated by substituting it in the formula.

【0024】[0024]

【発明が解決しようとする課題】しかしながら、上記し
た寿命予測方法では、次のような結果が得られる。図5
に、キャパシタ面積の0.42mm2 に、12MV/c
mの定電圧ストレスを印加した場合の予測値と実施値を
示す。なお、図5は、破壊時間(秒)tBDに対する累積
不良率(%)をワイブルプロットした結果で、予測値が
*印、実測値が□印である。
However, the following results are obtained by the above-described life prediction method. Figure 5
To 0.42 mm 2 of the capacitor area, 12 MV / c
The predicted value and the actual value when a constant voltage stress of m is applied are shown. Note that FIG. 5 is a result of Weibull plotting the cumulative defective rate (%) with respect to the breakdown time (seconds) t BD , and the predicted value is * and the measured value is □.

【0025】この図より、予測値と実測値は破壊時間1
00秒以上の領域で大きく異なることがわかる。これ
は、上記寿命予測方法に以下の問題点があるためであ
る。 (A)TZDB測定において、絶縁膜以外(ゲート電
極、半導体基板)の抵抗の影響を考慮していない。
From this figure, the predicted value and the measured value are the destruction time 1
It can be seen that there is a large difference in the region of 00 seconds or more. This is because the above life prediction method has the following problems. (A) In the TZDB measurement, the influence of the resistance other than the insulating film (gate electrode, semiconductor substrate) is not considered.

【0026】(B)TDDB測定において、絶縁膜の電
子トラッピングの影響を考慮していない。 本発明は、以上述べたように、正確に絶縁膜の寿命を予
測できないという問題点を解決するため、半導体素子の
絶縁膜に印加される電界を補正し、絶縁膜の正確な寿命
予測を行うことができる半導体素子の絶縁膜の評価方法
を提供することを目的とする。
(B) The TDDB measurement does not consider the influence of electron trapping of the insulating film. As described above, the present invention corrects the electric field applied to the insulating film of the semiconductor element to accurately predict the lifetime of the insulating film in order to solve the problem that the lifetime of the insulating film cannot be accurately predicted. It is an object of the present invention to provide a method for evaluating an insulating film of a semiconductor device that can be used.

【0027】[0027]

【課題を解決するための手段】本発明は、上記目的を達
成するために、TZDB測定からTDDB特性の真性不
良領域の予測を行う半導体素子の絶縁膜の評価方法にお
いて、TZDB測定時に絶縁膜に印加される低電界領域
の電流−電圧特性からファウラー−ノルドハイム(Fo
wler−Nordheim)式を算出し、前記絶縁膜
に印加される高電界領域の電流の実測値を求め、該実測
値が前記ファウラー−ノルドハイム式に該当する電界を
求め、該電界を前記絶縁膜に印加される電界として補正
するようにしたものである。
In order to achieve the above object, the present invention provides a method for evaluating an insulating film of a semiconductor device, which predicts an intrinsic defective region of TDDB characteristics from TZDB measurement. From the current-voltage characteristics of the applied low electric field region, Fowler-Nordheim (Fo
(Wler-Nordheim) equation is calculated to obtain an actual measurement value of a current in a high electric field region applied to the insulating film, an electric field corresponding to the actual measurement value of the Fowler-Nordheim equation is obtained, and the electric field is applied to the insulating film. The applied electric field is corrected.

【0028】また、TZDB測定からTDDB特性の全
ての領域の予測を行う半導体素子の絶縁膜の評価方法に
おいて、TDDB測定時に、絶縁膜に流れる電流を測定
し、絶縁膜破壊直前の電流値からファウラー−ノルドハ
イム式を用いて、前記絶縁膜に印加される電界を補正す
るようにしたものである。
Further, in the method for evaluating an insulating film of a semiconductor element for predicting all regions of TDDB characteristics from TZDB measurement, the current flowing through the insulating film is measured at the time of TDDB measurement, and the Fowler is calculated from the current value immediately before the insulating film is destroyed. -The Nordheim equation is used to correct the electric field applied to the insulating film.

【0029】[0029]

【作用】本発明によれば、上記したように、半導体素子
の絶縁膜の評価方法において、TZDB測定時にファウ
ラー−ノルドハイム(Fowler−Nordhei
m)電流を用いて電界補正を行う。したがって、絶縁膜
以外(ゲート電極、半導体基板)の抵抗の影響を考慮し
た絶縁膜の寿命予測を正確に行うことができる。
According to the present invention, as described above, in the method for evaluating an insulating film of a semiconductor device, Fowler-Nordheim (Fowler-Nordheim) is measured at the time of TZDB measurement.
m) Perform electric field correction using current. Therefore, it is possible to accurately predict the life of the insulating film considering the influence of the resistance other than the insulating film (gate electrode, semiconductor substrate).

【0030】また、TDDB測定において、I−t(電
流の時間変化)特性を別途測定して、ファウラー−ノル
ドハイム式を用いて電界補正を行う。したがって、絶縁
膜の電子トラッピングの影響を考慮した絶縁膜の寿命予
測を的確に行うことができる。
In the TDDB measurement, the It (time change of current) characteristic is measured separately, and the electric field is corrected by using the Fowler-Nordheim equation. Therefore, it is possible to accurately predict the life of the insulating film in consideration of the effect of electron trapping of the insulating film.

【0031】[0031]

【実施例】以下、本発明の実施例について図を参照しな
がら詳細に説明する。図1は本発明の第1の実施例を示
す半導体素子の絶縁膜の評価フローチャート、図2はF
−N(ファウラー−ノルドハイム)電流を示す図であ
る。ここでは、図3に示すような、半導体基板11、ゲ
ート絶縁膜(酸化膜)12及びゲート電極13で構成さ
れているMIS型トランジスタ10のTZDB測定にお
いて、F−N電流から電界補正を行うことにより、絶縁
膜以外の抵抗の影響を考慮できるよう構成する。
Embodiments of the present invention will be described in detail below with reference to the drawings. FIG. 1 is a flowchart for evaluating an insulating film of a semiconductor device according to the first embodiment of the present invention, and FIG.
FIG. 4 is a diagram showing −N (Fowler-Nordheim) current. Here, in the TZDB measurement of the MIS transistor 10 including the semiconductor substrate 11, the gate insulating film (oxide film) 12, and the gate electrode 13 as shown in FIG. 3, the electric field correction is performed from the FN current. Thus, the influence of the resistance other than the insulating film can be taken into consideration.

【0032】以下、本発明の第1の実施例の半導体素子
の絶縁膜の評価方法を図1,図2及び図3を用いて説明
する。まず、図1及び図2に示すように、TZDB測定
時に酸化膜12に印加される低電界領域aの電流−電圧
特性からファウラー−ノルドハイム(Fowler−N
ordheim)式を算出する(ステップS1)。
A method of evaluating an insulating film of a semiconductor device according to the first embodiment of the present invention will be described below with reference to FIGS. 1, 2 and 3. First, as shown in FIGS. 1 and 2, from the current-voltage characteristics of the low electric field region a applied to the oxide film 12 at the time of TZDB measurement, Fowler-Nordheim (Fowler-N)
ordheim) formula is calculated (step S1).

【0033】次に、前記酸化膜12に印加される高電界
領域の電流の実測値Aを求める(ステップS2)。次い
で、実測値Aが前記ファウラー−ノルドハイム式に該当
する電界Bを求める(ステップS3)。次に、その電界
Bを前記酸化膜12に印加される電界として補正し、寿
命を予測する(ステップS4)。
Next, the measured value A of the current in the high electric field region applied to the oxide film 12 is obtained (step S2). Next, an electric field B corresponding to the Fowler-Nordheim equation whose actual measured value A is obtained is obtained (step S3). Next, the electric field B is corrected as an electric field applied to the oxide film 12, and the life is predicted (step S4).

【0034】以下に、本発明の半導体素子の評価方法を
具体的に説明する。ここで、MIS型トランジスタ10
のゲート絶縁膜(酸化膜)12を流れる電流は、次式に
示すような、F−N(Fowler−Nordhei
m)電流で表される。 J=A・EOX 2 ・exp(B/EOX) …(12) ここで、Jは電流密度、EOXは酸化膜に印加される電
界、A,Bは定数である。
The method for evaluating a semiconductor device of the present invention will be described in detail below. Here, the MIS transistor 10
Current flowing through the gate insulating film (oxide film) 12 of FN (Fowler-Nordhei) as shown in the following equation.
m) Expressed in current. J = A · E OX 2 · exp (B / E OX) ... (12) where, J is the current density, the electric field E OX is applied to the oxide film, A, B are constants.

【0035】この上記(12)式の両対数をとると、次式が
得られる。 ln(J/EOX 2 )=B/(EOX+C) …(13) ここで、Cは定数である。したがって、酸化膜を流れる
F−N電流は、1/EOXとln(J/EOX 2 )の直線で
表される。
By taking the logarithm of the above equation (12), the following equation is obtained. ln (J / E OX 2 ) = B / (E OX + C) (13) Here, C is a constant. Therefore, the F-N current flowing through the oxide film is represented by a straight line of 1 / E OX and ln (J / E OX 2 ).

【0036】この上記(13)式を用いて、図2に示すよう
な電界補正を行う。ここで、図2の○印は、TZDB測
定から定めたF−N電流の実測値である。この実測値か
らわかるように、TZDB測定は酸化膜以外の抵抗の影
響を受けるため、電界が高くなるにつれて、F−N電流
からのズレが大きくなる。したがって、図に示すよう
に、低電界領域(ここでは、約12MV/cm以下の電
界)aから、理想的なF−Nプロットを求め、実測値と
同じ値Aとなる理想値のBを算出し、電界を補正した。
Electric field correction as shown in FIG. 2 is performed using the above equation (13). Here, the ◯ mark in FIG. 2 is the actual measurement value of the FN current determined from the TZDB measurement. As can be seen from this measured value, the TZDB measurement is affected by the resistance other than the oxide film, and thus the deviation from the FN current increases as the electric field increases. Therefore, as shown in the figure, an ideal F-N plot is obtained from a low electric field region (here, an electric field of about 12 MV / cm or less) a, and an ideal value B that is the same value A as the actual measurement value is calculated. Then, the electric field was corrected.

【0037】この方法により、TZDB測定における酸
化膜以外の抵抗の影響をも考慮できるようにした。次
に、本発明の第2の実施例について説明する。ここで、
図3に示すように、半導体基板11、ゲート絶縁膜(酸
化膜)12及びゲート電極13で構成されているMIS
型トランジスタ10のTDDB測定において、I−t特
性から電界の補正を行うことで、酸化膜12の電子トラ
ッピングの影響を考慮できるようにする。
By this method, the influence of the resistance other than the oxide film in the TZDB measurement can be taken into consideration. Next, a second embodiment of the present invention will be described. here,
As shown in FIG. 3, a MIS including a semiconductor substrate 11, a gate insulating film (oxide film) 12 and a gate electrode 13.
In the TDDB measurement of the transistor 10, the electric field is corrected from the It characteristic so that the influence of electron trapping of the oxide film 12 can be taken into consideration.

【0038】以下にこの方法を具体的に説明する。ゲー
ト絶縁膜(酸化膜)に定電圧ストレスを印加してTDD
B測定を行った場合、図6に示すように、I−t特性は
時間に対して一定の電流値を示すはずである。しかしな
がら、実際にTDDB測定を行うと、図7に示すよう
に、I−t特性は時間(秒)に対して一定ではなく、破
壊前に電流値の低下が起こる。つまり、ゲート絶縁膜の
電子トラッピングの影響により、ゲート絶縁膜に印加さ
れる電界が時間とともに変化することがわかる。
This method will be specifically described below. TDD by applying constant voltage stress to the gate insulating film (oxide film)
When the B measurement is performed, the It characteristic should show a constant current value with respect to time, as shown in FIG. However, when the TDDB measurement is actually performed, as shown in FIG. 7, the It characteristic is not constant with respect to time (seconds), and the current value decreases before the breakdown. That is, it is found that the electric field applied to the gate insulating film changes with time due to the influence of electron trapping of the gate insulating film.

【0039】したがって、次のような方法を用いて電界
補正を行う。まず、TDDB測定のI−t特性から、絶
縁膜破壊直前の電流値IBD(図7参照)を求める。次い
で、この絶縁膜破壊直前の電流値IBDを、第1の実施例
で求めた理想的なF−N(ファウラー−ノルドハイム)
直線に代入することで電界補正を行う。この方法によ
り、TDDB測定における絶縁膜の電子トラッピングの
影響を考慮できる。
Therefore, the electric field is corrected by using the following method. First, the current value I BD (see FIG. 7) immediately before the breakdown of the insulating film is obtained from the It characteristic of the TDDB measurement. Next, the current value I BD just before the breakdown of the insulating film is calculated as the ideal FN (Fowler-Nordheim) obtained in the first embodiment.
The electric field is corrected by substituting it into a straight line. By this method, the influence of electron trapping of the insulating film in the TDDB measurement can be considered.

【0040】図8は酸化膜の面積0.42mm2 のMI
S型トランジスタに、12MV/cmの定電圧ストレス
を印加した場合のTDDB測定結果(以後、実測値と呼
ぶ)を示す図である。なお、図中の□印が実測値、*印
が予測値である。図5に示す従来方法では、実測値と予
測値は大きく異なるのに対して、図8に示す本発明の第
1及び第2の実施例によると、実測値と予測値はよく一
致することがわかる。
FIG. 8 shows the MI having an oxide film area of 0.42 mm 2 .
It is a figure which shows the TDDB measurement result (henceforth an actual measurement value) at the time of applying a constant voltage stress of 12 MV / cm to an S-type transistor. In the figure, the □ mark is the actual measurement value, and the * mark is the predicted value. In the conventional method shown in FIG. 5, the actually measured value and the predicted value are significantly different, whereas according to the first and second embodiments of the present invention shown in FIG. 8, the actually measured value and the predicted value are in good agreement. Recognize.

【0041】したがって、本発明の第1及び第2の実施
例を用いることにより、絶縁膜(酸化膜)の、より正確
な寿命予測が可能である。なお、本発明は上記実施例に
限定されるものではなく、本発明の趣旨に基づき種々の
変形が可能であり、それらを本発明の範囲から排除する
ものではない。
Therefore, by using the first and second embodiments of the present invention, it is possible to more accurately predict the life of the insulating film (oxide film). It should be noted that the present invention is not limited to the above-described embodiments, and various modifications can be made based on the spirit of the present invention, and they are not excluded from the scope of the present invention.

【0042】[0042]

【発明の効果】以上、詳細に説明したように、本発明に
よれば、次のような効果を奏することができる。 (1)TZDB測定における絶縁膜以外(ゲート電極、
半導体基板)の抵抗の影響を、F−N電流を用いて電界
を補正することにより、考慮することができ、絶縁膜の
正確な寿命予測を行うことができる。
As described in detail above, according to the present invention, the following effects can be obtained. (1) Other than insulating film in TZDB measurement (gate electrode,
The influence of the resistance of the semiconductor substrate) can be taken into consideration by correcting the electric field using the F-N current, and the life expectancy of the insulating film can be accurately predicted.

【0043】(2)また、TDDB測定における絶縁膜
の電子トラッピングの影響をI−t特性を用いて電界補
正することで考慮することができる。 したがって、従来の絶縁膜の寿命予測方法より、更に正
確な寿命予測結果を得ることができる。
(2) Further, the influence of electron trapping of the insulating film in the TDDB measurement can be taken into consideration by correcting the electric field using the It characteristic. Therefore, it is possible to obtain a more accurate life prediction result than the conventional method for predicting the life of the insulating film.

【図面の簡単な説明】[Brief description of drawings]

【図1】本発明の第1の実施例を示す半導体素子の絶縁
膜の評価フローチャートである。
FIG. 1 is a flow chart for evaluating an insulating film of a semiconductor device showing a first embodiment of the present invention.

【図2】F−N(ファウラー−ノルドハイム)電流を示
す図である。
FIG. 2 is a diagram showing an FN (Fowler-Nordheim) current.

【図3】MIS型トランジスタの絶縁膜の測定系を示す
図である。
FIG. 3 is a diagram showing a measuring system of an insulating film of a MIS type transistor.

【図4】MIS型トランジスタの初期・ランダム不良を
示す図である。
FIG. 4 is a diagram showing initial and random defects of a MIS type transistor.

【図5】従来の方法による半導体素子の絶縁膜の寿命予
測結果を示す図である。
FIG. 5 is a diagram showing a result of life prediction of an insulating film of a semiconductor element by a conventional method.

【図6】理想的なI−t特性を示す図である。FIG. 6 is a diagram showing an ideal It characteristic.

【図7】実際のI−t特性を示す図である。FIG. 7 is a diagram showing actual It characteristics.

【図8】酸化膜の面積0.42mm2 のMIS型トラン
ジスタに、12MV/cmの定電圧ストレスを印加した
場合のTDDB測定結果を示す図である。
FIG. 8 is a diagram showing a TDDB measurement result when a constant voltage stress of 12 MV / cm was applied to a MIS transistor having an oxide film area of 0.42 mm 2 .

【符号の説明】[Explanation of symbols]

10 MIS型トランジスタ 11 半導体基板 12 ゲート絶縁膜(酸化膜) 13 ゲート電極 14 電流計 15 電源 21 Si基板 22 ゲート絶縁膜 23 多結晶シリコン電極 10 MIS type transistor 11 Semiconductor substrate 12 Gate insulating film (oxide film) 13 Gate electrode 14 Ammeter 15 Power supply 21 Si substrate 22 Gate insulating film 23 Polycrystalline silicon electrode

Claims (3)

【特許請求の範囲】[Claims] 【請求項1】 TZDB測定からTDDB特性の真性不
良領域の予測を行う半導体素子の絶縁膜の評価方法にお
いて、 (a)TZDB測定時に絶縁膜に印加される低電界領域
の電流−電圧特性からファウラー−ノルドハイム(Fo
wler−Nordheim)式を算出し、 (b)前記絶縁膜に印加される高電界領域の電流の実測
値を求め、 (c)該実測値が前記ファウラー−ノルドハイム式に該
当する電界を求め、 (d)該電界を前記絶縁膜に印加される電界として補正
することを特徴とする半導体素子の絶縁膜の評価方法。
1. A method for evaluating an insulating film of a semiconductor device for predicting an intrinsic defective region of TDDB characteristics from TZDB measurement, comprising: (a) Fowler based on current-voltage characteristics of a low electric field region applied to the insulating film during TZDB measurement. -Nordheim (Fo
wler-Nordheim equation is calculated, (b) an actual measurement value of a current in a high electric field region applied to the insulating film is obtained, (c) an electric field corresponding to the Fowler-Nordheim equation is obtained. d) A method for evaluating an insulating film of a semiconductor element, which comprises correcting the electric field as an electric field applied to the insulating film.
【請求項2】 前記絶縁膜は酸化膜であり、前記低電界
領域の電界の上限を12MV/cmとすることを特徴と
する請求項1項記載の半導体素子の絶縁膜の評価方法。
2. The method for evaluating an insulating film of a semiconductor device according to claim 1, wherein the insulating film is an oxide film, and the upper limit of the electric field in the low electric field region is 12 MV / cm.
【請求項3】 TZDB測定からTDDB特性の全ての
領域の予測を行う半導体素子の絶縁膜の評価方法におい
て、 (a)TDDB測定時に、絶縁膜に流れる電流を測定
し、 (b)絶縁膜破壊直前の電流値からファウラー−ノルド
ハイム式を用いて、前記絶縁膜に印加される電界を補正
することを特徴とする半導体素子の絶縁膜の評価方法。
3. A method for evaluating an insulating film of a semiconductor device, which predicts all regions of TDDB characteristics from TZDB measurement, comprising: (a) measuring a current flowing through the insulating film during TDDB measurement; A method for evaluating an insulating film of a semiconductor element, which comprises correcting the electric field applied to the insulating film from the immediately preceding current value using the Fowler-Nordheim equation.
JP11668693A 1993-05-19 1993-05-19 Method for evaluating insulating film of semiconductor device Withdrawn JPH06334015A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP11668693A JPH06334015A (en) 1993-05-19 1993-05-19 Method for evaluating insulating film of semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP11668693A JPH06334015A (en) 1993-05-19 1993-05-19 Method for evaluating insulating film of semiconductor device

Publications (1)

Publication Number Publication Date
JPH06334015A true JPH06334015A (en) 1994-12-02

Family

ID=14693365

Family Applications (1)

Application Number Title Priority Date Filing Date
JP11668693A Withdrawn JPH06334015A (en) 1993-05-19 1993-05-19 Method for evaluating insulating film of semiconductor device

Country Status (1)

Country Link
JP (1) JPH06334015A (en)

Cited By (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2002100663A (en) * 2000-09-22 2002-04-05 Komatsu Electronic Metals Co Ltd Voltage measuring apparatus, voltage measuring method and measuring apparatus for semiconductor element
US8680883B2 (en) 2010-05-11 2014-03-25 Samsung Electronics Co., Ltd. Time dependent dielectric breakdown (TDDB) test structure of semiconductor device and method of performing TDDB test using the same
JP2014107374A (en) * 2012-11-27 2014-06-09 Sumco Corp Semiconductor sample, electric evaluation methods, and evaluation device
CN109307831A (en) * 2018-09-25 2019-02-05 长江存储科技有限责任公司 The TDDB test method of grid oxic horizon in integrated circuit
US10620258B2 (en) 2017-01-13 2020-04-14 Samsung Electronics Co., Ltd. Method of testing semiconductor device and method of manufacturing a semiconductor device including the testing method
US11668743B2 (en) 2021-01-26 2023-06-06 Samsung Electronics Co., Ltd. Semiconductor device defect analysis method

Cited By (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2002100663A (en) * 2000-09-22 2002-04-05 Komatsu Electronic Metals Co Ltd Voltage measuring apparatus, voltage measuring method and measuring apparatus for semiconductor element
US8680883B2 (en) 2010-05-11 2014-03-25 Samsung Electronics Co., Ltd. Time dependent dielectric breakdown (TDDB) test structure of semiconductor device and method of performing TDDB test using the same
JP2014107374A (en) * 2012-11-27 2014-06-09 Sumco Corp Semiconductor sample, electric evaluation methods, and evaluation device
US10620258B2 (en) 2017-01-13 2020-04-14 Samsung Electronics Co., Ltd. Method of testing semiconductor device and method of manufacturing a semiconductor device including the testing method
CN109307831A (en) * 2018-09-25 2019-02-05 长江存储科技有限责任公司 The TDDB test method of grid oxic horizon in integrated circuit
CN109307831B (en) * 2018-09-25 2020-03-31 长江存储科技有限责任公司 TDDB test method for gate oxide layer in integrated circuit
US11668743B2 (en) 2021-01-26 2023-06-06 Samsung Electronics Co., Ltd. Semiconductor device defect analysis method

Similar Documents

Publication Publication Date Title
US5420513A (en) Dielectric breakdown prediction and dielectric breakdown life-time prediction using iterative voltage step stressing
US6202029B1 (en) Non-contact electrical conduction measurement for insulating films
US6734696B2 (en) Non-contact hysteresis measurements of insulating films
Degraeve et al. Reliability: A possible showstopper for oxide thickness scaling?
US6806720B2 (en) Method of reliability testing
Hovel Si film electrical characterization in SOI substrates by the HgFET technique
JPH06334015A (en) Method for evaluating insulating film of semiconductor device
De Blauwe et al. SILC-related effects in flash E/sup 2/PROM's-Part I: A quantitative model for steady-state SILC
Atanassova et al. Effects of the metal gate on the stress-induced traps in Ta2O5/SiO2 stacks
Wu et al. Critical reliability challenges in scaling SiO2-based dielectric to its limit
JP2000058612A (en) Method for evaluating insulation film of semiconductor element
US20060115910A1 (en) Method for predicting lifetime of insulating film
US6646462B1 (en) Extraction of drain junction overlap with the gate and the channel length for ultra-small CMOS devices with ultra-thin gate oxides
JP4040446B2 (en) Evaluation method of MIS type semiconductor layer device
JPH0388370A (en) Manufacture of semiconductor memory device
Tosic et al. Transmission line model testing of top-gate amorphous silicon thin film transistors
US7106087B2 (en) Method and apparatus for evaluating semiconductor device
JPH09260613A (en) Film quality evaluation method of tunnel insulating film
JP3230483B2 (en) Method for testing life of gate insulating film in semiconductor device
JP3610817B2 (en) Semiconductor device evaluation method
Stojanovska‐Georgievska Evaluating extrinsic origin of frequency dispersion of measured capacitance in high‐k mixed stacks
JP3863105B2 (en) Minute change determination device, minute change determination method, and minute change determination program
Goda et al. Accurate TDDB Lifetime Prediction Based on Intrinsic CiDSR Effect Model with Regarding Extrinsic Failures
Suzuki et al. Characterization of the tunneling insulator in MIM cathodes by low-stress IV measurement
Chen et al. A new empirical extrapolation method for time-dependent dielectric breakdown reliability projections of thin SiO2 and nitride–oxide dielectrics

Legal Events

Date Code Title Description
A300 Withdrawal of application because of no request for examination

Free format text: JAPANESE INTERMEDIATE CODE: A300

Effective date: 20000801