JPH06315826A - Beveling method for silicon wafer - Google Patents

Beveling method for silicon wafer

Info

Publication number
JPH06315826A
JPH06315826A JP10575793A JP10575793A JPH06315826A JP H06315826 A JPH06315826 A JP H06315826A JP 10575793 A JP10575793 A JP 10575793A JP 10575793 A JP10575793 A JP 10575793A JP H06315826 A JPH06315826 A JP H06315826A
Authority
JP
Japan
Prior art keywords
time
electrode
silicon wafer
wafer
silicon
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP10575793A
Other languages
Japanese (ja)
Inventor
Hiroyuki Daiku
博之 大工
Hidehiko Maehata
英彦 前畑
Hiroshige Arai
浩成 荒井
Masanori Tsukahara
正徳 塚原
Akio Komura
明夫 小村
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Hitachi Zosen Corp
Original Assignee
Hitachi Zosen Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi Zosen Corp filed Critical Hitachi Zosen Corp
Priority to JP10575793A priority Critical patent/JPH06315826A/en
Publication of JPH06315826A publication Critical patent/JPH06315826A/en
Pending legal-status Critical Current

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  • Electrical Discharge Machining, Electrochemical Machining, And Combined Machining (AREA)
  • Mechanical Treatment Of Semiconductor (AREA)

Abstract

PURPOSE:To prevent the fused lump of silicon from being entangled at the electrode tip section by specifying the on/off-time of the applied voltage when dipping a silicon wafer in an electrolyte, applying the prescribed voltage between a main electrode and an auxiliary electrode, and electrolytically polishing an edge section. CONSTITUTION:An electrolyte C is put in a container 1, and a disk-like silicon wafer A is rotated around the horizontal axis while it is partially dipped in the electrolyte C. A rod-like main electrode 2 is brought near to or into contact with the outer periphery of the wafer A, DC or AC voltage is applied between the main electrode 2 and an auxiliary electrode 3 inserted and arranged in the container 1, and the edge section B of the wafer A is electrolytically polished. The on-time of the voltage applied between the electrodes 2, 3 is set to 50ms or below at the time of electrolytic polishing, and the off-time is set to 0.5ms or above. When the excitation is repeated in this set excitation time, the fused lump of silicon is prevented from being entangled at the electrode tip section.

Description

【発明の詳細な説明】Detailed Description of the Invention

【0001】[0001]

【産業上の利用分野】本発明は、電解研磨加工方法によ
り、シリコンウエハの外周エッジ部を研磨するベベリン
グ加工方法に関する。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a beveling method for polishing an outer peripheral edge portion of a silicon wafer by an electrolytic polishing method.

【0002】[0002]

【従来の技術】従来、シリコンインゴットから切り出さ
れたシリコンウエハは、硬くて脆い性質を有し、半導体
部品に使用するためには、機械的な加工を施さなければ
ならず、このような加工を施すためには、例えばダイヤ
モンド工具などを使用する必要があり、加工コストが高
くつくという欠点があった。
2. Description of the Related Art Conventionally, a silicon wafer cut out from a silicon ingot has a hard and brittle property, and in order to use it for a semiconductor component, it must be mechanically processed. In order to apply, it is necessary to use, for example, a diamond tool, which has a drawback that the processing cost is high.

【0003】そこで、最近、電気化学液、すなわち電解
液中で生じる電解放電作用を利用して、シリコンウエハ
を電気的に加工する方法、すなわち電解研磨による加工
方法が提案されている。
Therefore, recently, a method of electrically processing a silicon wafer, that is, a processing method by electropolishing has been proposed, utilizing an electrolytic discharge action generated in an electrochemical solution, that is, an electrolytic solution.

【0004】この電解研磨方法は、電解放電作用に伴う
熱化学的作用によってシリコンウエハを加工する方法
で、例えばダイヤモンド工具などを使用するものに比べ
て、シリコンウエハを安価に加工することができる。
This electrolytic polishing method is a method of processing a silicon wafer by a thermochemical action associated with an electrolytic discharge action, and can process the silicon wafer at a low cost as compared with, for example, a method using a diamond tool.

【0005】ところで、図2に示すように、この電解研
磨方法により、被加工物Dに穴開け加工を行う場合に
は、まず電解質を水に溶かして得られる電解液C中に、
被加工物Dを浸すとともに、棒状の主電極11を、その
先端部が被加工物Dの加工位置に接近させ、または接触
するようになし、かつ板状の補助電極12を被加工物D
から少し離れた位置で電解液C中に配置する。
By the way, as shown in FIG. 2, when the workpiece D is drilled by this electrolytic polishing method, first, in an electrolytic solution C obtained by dissolving an electrolyte in water,
While immersing the workpiece D, the rod-shaped main electrode 11 is made to have its tip end brought close to or in contact with the processing position of the workpiece D, and the plate-shaped auxiliary electrode 12 is used for the workpiece D.
It is placed in the electrolytic solution C at a position slightly away from.

【0006】次に、両電極11,12間に電源13を接
続して所定値の直流または交流電圧Vを印加するととも
に、主電極11の先端部を被加工物D側に押し付ける。
この時、電圧の上昇にしたがって、主電極11近傍の電
解強度Eが上昇し、この電解強度Eの上昇に伴って、図
3の実線fにて示すように、電解液C中を流れる電流I
が増加し、電解作用が進む。
Next, a power source 13 is connected between the electrodes 11 and 12 to apply a DC or AC voltage V having a predetermined value, and the tip of the main electrode 11 is pressed against the workpiece D side.
At this time, the electrolytic strength E in the vicinity of the main electrode 11 rises as the voltage rises, and as the electrolytic strength E rises, the current I flowing in the electrolytic solution C as shown by the solid line f in FIG.
Is increased and the electrolytic action proceeds.

【0007】ところで、電流Iが流れないとき、および
少ないときにおける不動態領域の間は、図3(a)に示
すように、主電極11の近傍では何の変化も生じない
が、電流Iが増加して電解が始まると、図3(b)に示
すように、主電極11の近傍において、水素H2 、酸素
2 および空気などの微小な気泡が、主電極11を取り
巻くように発生し始める。
By the way, as shown in FIG. 3A, no change occurs in the vicinity of the main electrode 11 when the current I does not flow and when the current I is small, but the current I does not flow. When the electrolysis is increased and starts, as shown in FIG. 3B, minute bubbles such as hydrogen H 2 , oxygen O 2 and air are generated in the vicinity of the main electrode 11 so as to surround the main electrode 11. start.

【0008】そして、電流Iの増加にしたがって、図3
(c)に示すように、気泡が次第に大きくなるとともに
浮上を初め、電流Iがさらに増加すると、図3(d)に
示すように、電解により気泡の発生が激しくなり、主電
極11を大きな気泡が取り巻くとともに、浮上する気泡
の量が多くなる。
Then, as the current I increases, as shown in FIG.
As shown in FIG. 3C, when the bubbles gradually increase and start to float and the current I further increases, as shown in FIG. The amount of air bubbles that float around the surface increases with the surrounding area.

【0009】さらに、電流Iが図3(d)の場合よりも
増加すると、主電極11近傍の電解強度Eが気泡の絶縁
破壊強度を越えると、いわゆる絶縁破壊が生じると、図
3(e)に示すように、絶縁破壊により微細な気泡が多
数発生し、このとき電流Iが急激に減少するとともに、
放電発光と発熱とが生じる。
Further, when the electric current I increases more than that in the case of FIG. 3D, if the electrolytic strength E near the main electrode 11 exceeds the dielectric breakdown strength of bubbles, so-called dielectric breakdown occurs, and FIG. 3E. As shown in, a large number of fine bubbles are generated due to the dielectric breakdown, and at this time, the current I sharply decreases and
Discharge light emission and heat generation occur.

【0010】そして、発熱により、被加工物Dに対する
熱化学的作用が顕著になり、この作用により、被加工物
Dに穴開けがなされる。このときの被加工物Dの除去量
Wは、図3の実線gに示すようになる。
Then, due to the heat generation, the thermochemical action on the workpiece D becomes remarkable, and this action causes the workpiece D to be perforated. The removal amount W of the workpiece D at this time is as shown by the solid line g in FIG.

【0011】なお、図2において、21は浮上する微細
気泡、22は絶縁破壊によって生じた微細気泡を示す。
このような電解研磨方法により、被加工物としてシリコ
ンウエハの外周部のエッジ部を研磨加工する場合には、
図4に示すように、電解液Cが入れられた容器1内に、
板状の補助電極3を挿入配置し、回転軸体4側に支持さ
れたシリコンウエハ(以下、単にウエハAという)Aの
一部を電解液Cに浸すとともに、ウエハAの外周エッジ
部Bに、棒状の主電極2の先端部を接近または接触させ
ることにより、主電極2と電解液Cとの間で放電を行わ
せることにより、エッジ部Bの研磨加工が行われる。
In FIG. 2, reference numeral 21 is a floating fine bubble, and 22 is a fine bubble generated by dielectric breakdown.
When the edge portion of the outer peripheral portion of the silicon wafer is polished as a workpiece by such an electrolytic polishing method,
As shown in FIG. 4, in the container 1 containing the electrolytic solution C,
A plate-shaped auxiliary electrode 3 is inserted and arranged, and a part of a silicon wafer (hereinafter, simply referred to as wafer A) A supported on the rotating shaft body 4 side is immersed in an electrolytic solution C, and at the outer peripheral edge portion B of the wafer A. The edge portion B is polished by bringing the tip portions of the rod-shaped main electrodes 2 closer to or in contact with each other to cause discharge between the main electrodes 2 and the electrolytic solution C.

【0012】[0012]

【発明が解決しようとする課題】ところで、上述した電
解研磨方法により、ウエハAの外周エッジ部Bを研磨し
た場合、放電熱によりウエハAが過剰に加熱され、シリ
コンが溶融して、主電極2の先端部に絡み付くことがあ
る。このような状態になると、主電極2の溶融損耗が激
しくなるばかりでなく、溶融したシリコン塊が再びウエ
ハAに付着し、研磨加工面が凹凸になってしまうという
問題が発生する。
By the way, when the outer peripheral edge portion B of the wafer A is polished by the electrolytic polishing method described above, the wafer A is excessively heated by the discharge heat, the silicon is melted, and the main electrode 2 May get entangled at the tip of the. In such a state, not only the melting and wear of the main electrode 2 becomes severe, but also a melted silicon block adheres to the wafer A again, causing a problem that the polished surface becomes uneven.

【0013】そこで、本発明は上記問題を解消し得るシ
リコンウエハのベベリング加工方法を提供することを目
的とする。
Therefore, an object of the present invention is to provide a method for beveling a silicon wafer which can solve the above problems.

【0014】[0014]

【課題を解決するための手段】上記課題を解決するた
め、本発明のシリコンウエハのベベリング加工方法は、
電解液が入れられた容器内に補助電極を挿入し、円板状
のシリコンウエハを電解液に浸漬させるとともに回転さ
せながら、そのエッジ部に主電極を接近または接触さ
せ、上記両電極間に所定電圧を印加させてエッジ部を電
解研磨する際に、上記電極間に印加する電圧のオン時間
を50ミリ秒以下にするとともに、オフ時間を0.5 ミリ秒
以上とする加工方法である。
In order to solve the above problems, a method for beveling a silicon wafer according to the present invention is
Insert the auxiliary electrode into the container containing the electrolytic solution, immerse and rotate the disk-shaped silicon wafer in the electrolytic solution, and bring the main electrode close to or in contact with the edge of the disk-shaped silicon wafer. This is a processing method in which, when a voltage is applied to electropolish the edge portion, the on time of the voltage applied between the electrodes is set to 50 milliseconds or less and the off time is set to 0.5 milliseconds or more.

【0015】[0015]

【作用】上記のシリコンウエハのベベリング加工方法に
よると、両電極間に電圧を印加する際に、そのオン時間
を50ミリ秒以下にするとともに、オフ時間を0.5 ミリ秒
以上とするようにしたので、電極の先端部に、シリコン
の溶融塊が絡まるのを防止することができる。
[Function] According to the above-described beveling processing method for a silicon wafer, when a voltage is applied between both electrodes, the ON time is set to 50 milliseconds or less and the OFF time is set to 0.5 milliseconds or more. It is possible to prevent the molten mass of silicon from being entangled at the tip of the electrode.

【0016】[0016]

【実施例】以下、本発明の一実施例を図1に基づき説明
する。なお、本実施例におけるシリコンウエハのべべリ
ング加工方法の特徴は、従来と同様の加工方法におい
て、両電極に印加する電圧のオン・オフ時間を制御する
方法であり、その構成部材については、従来例で説明し
たものと同一であるため、同一の部品については、同一
番号を付してその説明を省略する。
DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS An embodiment of the present invention will be described below with reference to FIG. The characteristic of the silicon wafer beveling processing method in this embodiment is a method of controlling the on / off time of the voltage applied to both electrodes in the same processing method as the conventional method. Since they are the same as those described in the example, the same parts are designated by the same reference numerals and the description thereof will be omitted.

【0017】すなわち、容器1内に電解液Cを入れると
ともに、シリコンウエハ(以下、単にウエハという)A
の一部を挿入回転させるとともに、このウエハAの外周
部に棒状の主電極2を接近または接触させ、この主電極
2と容器1内に挿入配置された補助電極3との間に、直
流または交流電圧を印加させることにより、ウエハAの
エッジ部Bの電解研磨が行われる。
That is, the electrolytic solution C is put in the container 1, and a silicon wafer (hereinafter, simply referred to as a wafer) A.
While inserting and rotating a part of the wafer A, a rod-shaped main electrode 2 is brought close to or in contact with the outer peripheral portion of the wafer A, and a DC or The edge portion B of the wafer A is electrolytically polished by applying an AC voltage.

【0018】そして、この電解研磨時において、両電極
2,3間に所定電圧が印加される時間は、次のように制
御される。すなわち、図1に示すように、印加するオン
時間は50ミリ秒以下にされるとともに、印加されないオ
フ時間は0.5 ミリ秒以上にされ、このようなサイクルが
連続して繰り返される。
The time during which the predetermined voltage is applied between the electrodes 2 and 3 during the electropolishing is controlled as follows. That is, as shown in FIG. 1, the applied on-time is set to 50 milliseconds or less and the non-applied off time is set to 0.5 millisecond or more, and such a cycle is continuously repeated.

【0019】なお、オン時間が50ミリ秒を越えると、電
極の先端部にシリコンの溶融塊が絡まり、白色発光とし
て観察され、またオフ時間が0.5 ミリ秒より短いと、や
はり電極の先端部にシリコンの溶融塊が絡まり、白色発
光として観察されるが、上述した本実施例のオン・オフ
時間内であると、電極の先端部には、白色発光が観測さ
れることはない。すなわち、シリコンの溶解塊が絡まる
ことはない。
When the on-time exceeds 50 ms, molten lumps of silicon are entangled in the tip of the electrode, and white light emission is observed. When the off-time is shorter than 0.5 ms, the tip of the electrode also has an off-time. Although the molten mass of silicon is entangled and observed as white light emission, white light emission is not observed at the tip of the electrode within the on / off time of this embodiment described above. That is, the molten mass of silicon is not entangled.

【0020】ところで、上記実施例においては、主電極
として棒状電極を示したが、例えば針状電極、くし状電
極、または板状電極の場合にも適用し得る。
By the way, in the above embodiment, the rod-shaped electrode is shown as the main electrode, but it can be applied to the case of a needle-shaped electrode, a comb-shaped electrode or a plate-shaped electrode.

【0021】[0021]

【発明の効果】以上のように本発明のシリコンウエハの
ベベリング加工方法によると、両電極間に電圧を印加す
る際に、そのオン時間を50ミリ秒以下にするとともに、
オフ時間を0.5 ミリ秒以上とするようにしたので、電極
の先端部に、シリコンの溶融塊が絡まるのを防止するこ
とができ、したがってシリコンの溶融塊の再付着を抑制
することができるとともに、電極消耗度の低減を図るこ
とができる。
As described above, according to the beveling method for a silicon wafer of the present invention, when a voltage is applied between both electrodes, the ON time is set to 50 milliseconds or less, and
Since the off time is set to 0.5 milliseconds or more, it is possible to prevent the molten mass of silicon from being entangled at the tip of the electrode, and thus to prevent re-adhesion of the molten mass of silicon. The degree of electrode wear can be reduced.

【図面の簡単な説明】[Brief description of drawings]

【図1】本発明の一実施例のシリコンウエハのベベリン
グ加工方法における印加電圧のオン・オフ時間を示すタ
イムチャート図である。
FIG. 1 is a time chart diagram showing ON / OFF time of an applied voltage in a beveling processing method for a silicon wafer according to an embodiment of the present invention.

【図2】従来例における電解研磨の原理を説明する要部
断面図である。
FIG. 2 is a cross-sectional view of essential parts for explaining the principle of electrolytic polishing in a conventional example.

【図3】同電解研磨の原理を説明するための電流および
電解強度と被加工物の除去量との関係を示すグラフであ
る。
FIG. 3 is a graph showing the relationship between the current and electrolytic strength and the removal amount of the workpiece for explaining the principle of the same electrolytic polishing.

【図4】従来例におけるシリコンウエハのベベリング加
工方法を説明する断面図である。
FIG. 4 is a cross-sectional view illustrating a method of beveling a silicon wafer according to a conventional example.

【符号の説明】[Explanation of symbols]

A シリコンウエハ C 電解液 1 容器 2 主電極 3 補助電極 4 電源 A Silicon wafer C Electrolyte 1 Container 2 Main electrode 3 Auxiliary electrode 4 Power supply

───────────────────────────────────────────────────── フロントページの続き (72)発明者 塚原 正徳 大阪府大阪市此花区西九条5丁目3番28号 日立造船株式会社内 (72)発明者 小村 明夫 大阪府大阪市此花区西九条5丁目3番28号 日立造船株式会社内 ─────────────────────────────────────────────────── ─── Continuation of front page (72) Masanori Tsukahara, 5-3-8 Nishikujo, Konohana-ku, Osaka-shi, Osaka Prefecture (72) Hitachi Shipbuilding Co., Ltd. (72) Akio Komura 5--9, Nishikujo, Konohana-ku, Osaka No. 28 in Hitachi Shipbuilding Co., Ltd.

Claims (1)

【特許請求の範囲】[Claims] 【請求項1】電解液が入れられた容器内に補助電極を挿
入し、円板状のシリコンウエハを電解液に浸漬させると
ともに回転させながら、そのエッジ部に主電極を接近ま
たは接触させ、上記両電極間に所定電圧を印加させてエ
ッジ部を電解研磨する際に、上記電極間に印加する電圧
のオン時間を50ミリ秒以下にするとともに、オフ時間を
0.5 ミリ秒以上とすることを特徴とするシリコンウエハ
のベベリング加工方法。
1. An auxiliary electrode is inserted into a container containing an electrolytic solution, and a disk-shaped silicon wafer is immersed in the electrolytic solution and rotated, and a main electrode is brought close to or in contact with the edge portion thereof, When applying a predetermined voltage between both electrodes and electropolishing the edge portion, the on time of the voltage applied between the electrodes is set to 50 milliseconds or less, and the off time is
A method for beveling a silicon wafer, which is characterized by being 0.5 ms or more.
JP10575793A 1993-05-07 1993-05-07 Beveling method for silicon wafer Pending JPH06315826A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP10575793A JPH06315826A (en) 1993-05-07 1993-05-07 Beveling method for silicon wafer

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP10575793A JPH06315826A (en) 1993-05-07 1993-05-07 Beveling method for silicon wafer

Publications (1)

Publication Number Publication Date
JPH06315826A true JPH06315826A (en) 1994-11-15

Family

ID=14416107

Family Applications (1)

Application Number Title Priority Date Filing Date
JP10575793A Pending JPH06315826A (en) 1993-05-07 1993-05-07 Beveling method for silicon wafer

Country Status (1)

Country Link
JP (1) JPH06315826A (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0715955A1 (en) * 1994-12-06 1996-06-12 MAN Roland Druckmaschinen AG Process and device for cleaning a cylinder of a rotary printing machine
JP2011192687A (en) * 2010-03-12 2011-09-29 Hitachi Metals Ltd Processing apparatus for semiconductor substrate, method for manufacturing semiconductor substrate, and semiconductor substrate

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0715955A1 (en) * 1994-12-06 1996-06-12 MAN Roland Druckmaschinen AG Process and device for cleaning a cylinder of a rotary printing machine
JP2011192687A (en) * 2010-03-12 2011-09-29 Hitachi Metals Ltd Processing apparatus for semiconductor substrate, method for manufacturing semiconductor substrate, and semiconductor substrate

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