JPH06310502A - Method of manufacturing semiconductor device - Google Patents

Abstract

PURPOSE:To enhance flatness in the rough part which is a drawback of this method, by a method wherein, after a groundwork substrate is treated by an organic compound solution, a step of forming a normal pressure O3-TEOS film is used together to form dummy patterns in a rough part of implantation groundwork patterns. CONSTITUTION:After a groundwork substrate 11 is treated by an organic compound solution, a normal pressure O3-TEOS film 15 is formed and dummy patterns 16 are formed in a rough part of treatment patterns and a glass precursor solution melted in an organic solvent is rotated and applied to the entire surface. Thereafter, a SOG film 17 having a flat surface is formed by heat- curing and an etch-back treatment is performed to the SOG film 17 and dummy patterns 16 to remarkably flatten the surface of the SOG film 17.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION The present invention relates to a method of manufacturing a semiconductor device,
In particular, the present invention relates to a method for forming a primary insulating film between a semiconductor substrate and a metal wiring, an interlayer insulating film between metal wirings, and a final insulating film acting as a passivation film by chemical vapor deposition using an organic silane compound as a source gas. It is a thing.

[0002]

2. Description of the Related Art In recent years, high integration and high density of VLSI devices have been rapidly advanced, and submicron processing has become essential in semiconductor processing technology. As the submicron processing progresses, the unevenness of the semiconductor substrate surface becomes more and more intense,
The aspect ratio becomes large, and this unevenness becomes a constraint in device manufacturing. What is most strongly desired for solving such a problem is a planarization technique for an interlayer insulating film.

Characteristics required for the interlayer insulating film for submicron devices include forming a space of submicron order and achieving excellent step coverage for a pattern having a high aspect ratio. A chemical vapor deposition method (CVD method) using an organic silane and an inorganic silane as a source gas is known as a method of forming an interlayer insulating film satisfying such requirements. Further, as a CVD method, a plasma CVD method, an atmospheric pressure CVD method, a low pressure CVD method, a pressure CVD method, a photo-excited CVD method and the like have been proposed.

Among these, an insulating film formed by an atmospheric pressure CVD method using an organic silane as a raw material gas and adding ozone gas thereto, that is, an atmospheric pressure ozone-organic silane CVD silicon oxide film is particularly excellent in flatness. This is one of the most expected methods of being able to do so. An atmospheric pressure CVD method using such a mixed gas of ozone-organosilane is disclosed in
No. 61-77695 or "Electrochemistry" 56, No. 7 (1988), 527-
It is described on page 532. TEOS as an organic silane
(tetraethoxysilane), TMOS (tetramethoxysilane), OMC
TS (octamethylcyclotetrasiloxane), HMDS (hexamethyld
isiloxane) is known.

Further, with respect to the insulating film used as the final protective film, it is strongly demanded that the flatness thereof and the film quality which affects the reliability of the device are improved with the high integration and high density of VLSI devices. There is. This is mainly to prevent intrusion of moisture or the like from the side wall of the final wiring.

[0006]

However, in the conventional method for forming an insulating film by the CVD method using organosilane as a raw material gas, there is a gap between steps (between wirings) depending on the substrate material due to the substrate dependency of the deposition rate. However, there is a drawback in that the embedding property of is deteriorated and a void is generated in the film. In particular, since a step having a large aspect ratio is formed as the element structure is miniaturized, such a void is more likely to be generated. Thus, the fact that the organosilane-CVD film has a large base dependency
For example, “The Institute of Electrical Engineers of Japan A”, 111, published in 1991.
Vol. 7, pp. 652-658. When the embedding property deteriorates or voids are formed in this way, the leak current between the wirings increases and the device characteristics are adversely affected.

Further, the conventional CVD film using organic silane has a large amount of carbon compounds (unreacted substances) containing water etc. in the film.
However, there is a defect that the film quality is poor, the moisture absorption resistance is poor, and cracks occur. If a thick film is used to supplement the moisture absorption resistance, cracks are more likely to occur in the film, which has the drawback of impairing the reliability of the device.

In order to reduce the above-mentioned drawbacks of the conventional method of forming an insulating film, the plasma oxide film on the base surface is replaced with N2, NH3.
It has been proposed to perform a plasma treatment using a gas such as the above, and then form an atmospheric pressure CVD film using organosilane.
There is concern about the problem of plasma damage.

Further, a method for improving the embedding shape and the film quality by using it in combination with the step of forming an O ₃ -TEOS film at atmospheric pressure after treating the underlying substrate with a solution of an organic compound has already been disclosed in Japanese Patent Application No. 4-311. As disclosed in Japanese Patent No. 329397, it is confirmed that the difference in height of the insulating film is emphasized in the rough portion and the dense portion of the underlying wiring pattern in the course of practical use of this method. It was

An object of the present invention is to form a dummy pattern on a rough portion of a buried underlayer pattern by using it together with a step of forming an atmospheric pressure O3-TEOS film after treating an underlayer substrate with a solution of an organic compound. Then, another object of the present invention is to provide a method for manufacturing a semiconductor device which improves the flatness of a rough portion, which is a disadvantage of this method.

[0011]

The method of manufacturing a semiconductor device according to the present invention comprises a step of forming an atmospheric pressure O ₃ -TEOS film after a base substrate is treated with a solution of an organic compound, and a rough treatment pattern. The step of forming a dummy pattern on the part, the step of spin-coating the glass precursor solution dissolved in an organic solvent on the entire surface, and then heating and curing to form the SOG film with a flat surface, and the step of forming the SOG film and the dummy pattern. And a step of performing an etch-back process.

The above-mentioned organic compounds include aliphatic saturated monohydric alcohols, aliphatic unsaturated monohydric alcohols, aromatic alcohols, aliphatic saturated polyhydric alcohols and their derivatives, aldehydes, ethers, ketones and keto alcohols. , Carboxylic acids, nitroalkanes, amines, acylnitriles, acid amides, and heterocyclic compounds, and the following substances can be specifically used. Aliphatic saturated monohydric alcohols: methanol, ethanol, 1-propanol, 2-propanol, 1-butanol, 2-methyl-1-propanol, 2-butanol, 2-methyl-2-propanol, 1-pentanol, 3 -Methyl-1-butanol, 3-methyl-2-butanol, 2-methyl-2-butanol, 1-hexanol, cyclohexanol Aliphatic unsaturated monohydric alcohols: allyl alcohol, propargyl alcohol, 2-methyl-3 -Butin-2-ol aromatic alcohols: benzyl alcohol, furfuryl alcohol, aliphatic saturated polyhydric alcohols and their derivatives: ethylene glycol, propylene glycol, diethylene glycol, ethylene glycol monomethyl ether, ethylene glycol monoethyl ether, Tylene glycol mono-n-butyl ether, ethylene glycol monoisobutyl ether, propylene glycol monomethyl ether, ethylene glycol dimethyl ether, diethylene glycol monomethyl ether, diethylene glycol monoethyl ether, diethylene glycol dimethyl ether Aldehyde: formaldehyde, acetaldehyde, glyoxal ether: diethyl ether, dioxane, tetrahydrofuran, tetrahydroflur Furyl alcohol Ketone / keto alcohol: Acetone, 2-butanone, diacetone alcohol, γ-butyrolactone, propylene carbonate Carboxylic acid: Formic acid, acetic acid, propionic acid, glycolic acid, lactic acid, ethyl lactate Nitroalkane: Nitromethane, Nitroethane, Nitropropane, Nitro Benzene amine: ethylamine, propylamine, isopropylamine,
Butylamine, isobutylamine, allylamine, aniline, toluidine, ethylenediamine, diethylamine, ethyleneimine, dipropylamine, diisopropylamine, dibutylamine, triethylamine, tri-n
Propylamine, tri-n-butylamine acyl nitriles: acetonitrile, propiononitrile, butyronitrile, acrylonitrile, methacrylonitrile, benzonitrile Acid amide: formamide, N-methylformamide,
N, N-dimethylformamide, N-methylacetamide, N, N-dimethylacetamide, heterocyclic compound: pyridine, quinoline, pyrrole, piperidine, piperazine, morpholine, 2-pyrrolidinone,
1-Methyl-2-pyrrolidinone However, lower alcohols and acetylene alcohols are particularly preferable.

The following compounds can be used as the organosilane compound. Organic silane Tetraalkoxy silane (orthosilicate ester): tetramethoxysilane, tetraethoxysilane, tetra-n
Propoxysilane, tetraisopropoxysilane, tetra-n-butoxysilane Alkylalkoxysilane: methyltrimethoxysilane, methyltriethoxysilane, methyltri-n-propoxysilane, methyltriisopropoxysilane, ethyltrimethoxysilane, ethyltriethoxysilane, ethyltri-n-propoxy Silane, ethyltriisopropoxysilane, vinyltrimethoxysilane, vinyltriethoxysilane, phenyltrimethoxysilane dimethyldimethoxysilane, dimethyldiethoxysilane, diethyldimethoxysilane, diethyldiethoxysilane, diethyldi-n-propoxysilane, diethyldiisopropoxysilane , Methylvinyldimethoxysilane, methylvinyldiethoxysilane methyldimethoxysilane, methyldiethoxy Run Dimethylvinylmethoxysilane, Dimethylvinylethoxysilane Polysiloxane: Tetrakis (dimethylsiloxy) silane Cyclosiloxane: Octamethylcyclotetrasiloxane, pentamethylcyclotetrasiloxane, Tetramethylcyclotetrasiloxane, Hexamethylcyclotrisiloxane, Trimethylcyclotrisiloxane Disiloxane: hexamethyldisiloxane, tetramethyldimethoxydisiloxane, dimethyltetramethoxydisiloxane, hexamethoxydisiloxane Alkylsilane: monomethylsilane, dimethylsilane,
Trimethylsilane, triethylsilane, tetramethylsilane, tetraethylsilane allyltrimethylsilane hexamethyldisilane silylamine: dimethyltrimethylsilylamine, diethyltrimethylsilylamine silane nitrogen derivative: aminopropyltriethoxysilane trimethylsilylazide, trimethylsilylcyanide silazane: hexamethyldisilazane, tetra Methyldisilazane Octamethylcyclotetrasilazane, Hexamethylcyclotrisilazane Halogenated silanes and derivatives: trimethylchlorosilane, triethylchlorosilane, tri-n-propylchlorosilane, methyldichlorosilane, dimethylchlorosilane,
Chloromethyldimethylchlorosilane, chloromethyltrimethylsilane, chloropropylmethyldichlorosilane,
Chloropropyltrimethoxysilane dimethyldichlorosilane, diethyldichlorosilane, methylvinyldichlorosilane, methyltrichlorosilane,
Ethyltrichlorosilane, vinyltrichlorosilane, trifluoropropyltrichlorosilane, trifluoropropyltrimethoxysilane, trimethylsilyl iodide,

In the present invention, the above-mentioned organic silane compounds can be used alone or in combination of two or more substances. When mixed and used, the mixing ratio may be appropriately adjusted.

As the surface treatment, coating treatment of the organic compound or its aqueous solution or organic solvent solution,
Alternatively, the organic compound or its organic solvent solution may be dipped, or the organic compound or its organic solvent solution may be exposed to steam, sprayed, showered, or the like, but coating using a spin coater is particularly preferable. . In the preferred embodiment of the present invention, in forming an insulating film which acts as an interlayer insulating film of a semiconductor device, a plasma -CVD-SiO ₂ film was formed as a base, the surface after the ethanol treatment by a spin coater, By atmospheric pressure ozone-CVD method using TEOS as raw material gas
AP O ₃ -CVD-SiO ₂ film is formed.

According to such a method of manufacturing a semiconductor device according to the present invention, a CV using an organic silane compound as a source gas is used.
Before forming the insulating film by method D, treat the underlying surface with the above-mentioned organic compound or its aqueous solution or organic solvent solution.
By performing a very simple process (hereinafter also referred to as organic substance treatment), the dependency on the underlayer can be significantly eased, and the insulating property is excellent in embedding property and flatness and has no cracks or voids. Since a film can be formed and the base treatment is a simple treatment of an organic compound, the manufacturing apparatus is simplified and the throughput is improved.

The organic substance treatment on the surface of the base is spin coating (coating treatment) in which the semiconductor wafer is applied while being spun, vapor treatment in which vapor of an organic compound is sprayed onto the semiconductor wafer, and the semiconductor wafer is immersed in a solution of the organic compound. Various treatment methods such as a dipping treatment, a spray treatment for spraying a solution of an organic compound, and a curtain coating treatment for passing a semiconductor substrate through a shower of an organic compound are possible, but any of them can be easily performed.

[0018]

Embodiments of the present invention will be described below with reference to the drawings. FIG. 1 shows the structure of an example of an apparatus that can be used as an apparatus for forming an organic silane-CVD film in the embodiment of the method for manufacturing a semiconductor device according to the present invention described below. A silicon wafer 4 supported by a susceptor 3 is provided with a heater 2 inside the reaction chamber 1.
To heat. Further, an ozone generator 5 and a constant temperature bath 6 are provided outside the reaction chamber 1, and a gas bubbler 7 is placed inside the constant temperature bath. Ozone gas is supplied to the ozone generator 5 to generate ozone. The ozone generation rate of this ozone generator 5 is 4.0%. Nitrogen gas is supplied to the gas bubbler 7 arranged in the constant temperature bath 6 to generate the organic silane, TEOS gas in this example, contained in the gas bubbler. This TEOS gas is supplied to the reaction chamber 1 together with ozone generated by the ozone generator 5 using nitrogen gas as a carrier gas. A dispersion head 8 is arranged in the reaction chamber 1 and
Silicon wafer 4 with laminar flow of mixed gas with TEOS gas
It is applied to the surface of the silicon wafer so that a uniform film is formed on the entire surface of the silicon wafer. Further, for this purpose, the silicon wafer 4 is swung in the plane together with the heater 2 and the susceptor 3 to ensure the uniformity of film formation.

(Example 1) As shown in FIG. 2, a BPSG film 12 having a film thickness of 1 μm is formed on a silicon substrate 11, and an aluminum pattern 13 having a height of 1 μm is formed as a first wiring on the BPSG film 12 by etching. To do. Then the total thickness is 3000Å
Plasma-TEOS CVD NSG film 14 was formed.

Next, the surface of the plasma-TEOS CVD NSG film 14 which is the base of the silicon wafer was subjected to a treatment with a solution of an organic compound, for example, a base treatment with ethanol. In the ethanol treatment of this example, a silicon wafer was placed on a spin coater and rotated at 1000 rpm to 100 ml / min.
After applying ethanol for 2 seconds at a flow rate of 60 rpm at 2000 rpm
It was dried for 2 seconds.

Next, the thus dried silicon wafer is carried into the reaction chamber 1 shown in FIG. 1, and a film is formed under the following conditions. The ozone-TEOS CVD PSG shown in FIG.
The film 15 was formed to have a film thickness of “6000Å”.

[Table 1] Film formation temperature 400 ℃ Film formation pressure Atmospheric pressure Film formation time 545 seconds Nitrogen gas flow to gas bubbler 1.5l / min Constant temperature bath temperature 65 ℃ Oxygen flow to ozone generator 7.5l / min Ozone concentration 120g / m ³ Carrier N2 18 SLM The ozone-TEOS CVD PSG film 15 thus formed fills the narrow space between the closely arranged aluminum wirings 13 and has good step coverage, as is apparent from FIG. In addition to being excellent in self-flatness, voids were not formed, coverage and embedding properties were good, and water permeability and a good film quality with a small content were obtained.

The O ₃ -TEOS film 15 thus formed has good flatness in the dense part of the underlying pattern as described above, but the flatness is impaired in the part with the rough underlying pattern. , So that a concave portion is formed.

According to the present invention, as shown in FIG.
The N-type photoresist film 16 is provided as a dummy pattern in the concave portion of the O ₃ -TEOS film 15 in the portion where the underlying pattern is rough so as to fill the concave portion by a normal photoresist method.
Then, as shown in FIG. 5, a commercially available SOG solution is spin-coated by a spin coater (not shown) and cured by heating at 400 ° C. for 30 minutes to form an SOG film 17 having a film thickness of about 1000 to 5000Å. Here, the step difference on the surface of the O ₃ -TEOS-CVD film 15 is
Since the dummy pattern described above is relaxed to some extent, the SOG film 17 formed on the dummy pattern is completely filled with the step, and the surface becomes significantly flat.

Then, as shown in FIG. 6, a mixed gas of CF ₄ and CHF ₃ is used to form the SOG film 17 obtained in the step shown in FIG.
Etching is performed to reduce the thickness. By continuing this etch-back process, the SOG film 17, the N-type photoresist 16 and a part of the O ₃ -TEOS film 15 were also removed to further flatten the thickness to about 1000Å.
An O ₃ -TEOS film 15 is formed. Therefore, this flattened O ₃ -T
Further wiring processing and passivation processing can be advantageously and easily performed on the EOS film 15.

The present invention is not limited to the above-described embodiments, but various modifications and variations are possible. For example, although the ozone-TEOS CVD NSG film is formed after the ethanol treatment in the above-described embodiment, TMOP (trime) is added to the mixed gas of ozone and TEOS supplied to the reaction chamber.
It is also possible to form an ozone-TEOS CVD PSG film or a BPSG film by adding an alkoxide gas of phosphorus and boron such as thylphosphate) and TMB (trimethylborate) as a dopant. Further, not only TEOS but also the above-mentioned TMOS, OMCTS, HMDS and the like can be used as the organic silane raw material compound.

[0026]

As described above, in the method of manufacturing a semiconductor device according to the present invention, before forming an insulating film by a chemical vapor deposition method using an organic silane-based source gas, the underlying surface is treated with an organic compound solution. And a dummy pattern is formed in the concave portion that appears in the rough portion of the embedded underlayer pattern, and an etchback treatment is applied to this to further improve the flatness of this rough portion. This makes it possible to form a high-quality insulating film having a very high flatness with a good filling property of the CVD insulating film, no voids in the insulating film, and good coverage.

[Brief description of drawings]

FIG. 1 shows a method of manufacturing a semiconductor device according to the present invention,
FIG. 3 is a diagram showing the configuration of a chemical vapor deposition apparatus for forming an ozone-organic silane CVD film.

FIG. 2 is a cross-sectional view showing a manufacturing process of a semiconductor device formed by a method of manufacturing a semiconductor device according to the present invention.

FIG. 3 is a cross-sectional view showing a manufacturing process of a semiconductor device formed by a method of manufacturing a semiconductor device according to the present invention.

FIG. 4 is a cross-sectional view showing a manufacturing process of a semiconductor device formed by a method of manufacturing a semiconductor device according to the present invention.

FIG. 5 is a cross-sectional view showing a manufacturing process of a semiconductor device formed by the method of manufacturing a semiconductor device according to the present invention.

FIG. 6 is a cross-sectional view showing a manufacturing process of a semiconductor device formed by a method of manufacturing a semiconductor device according to the present invention.

FIG. 7 is a cross-sectional view showing a manufacturing process of a semiconductor device formed by a method of manufacturing a semiconductor device according to the present invention.

[Explanation of symbols]

 1 Reaction Chamber 2 Heater 3 Susceptor 4 Silicon Wafer 5 Ozone Generator 6 Constant Temperature Chamber 7 Gas Bubbler 8 Dispersion Head 11 Substrate 12 BPSG Film 13 Al Wiring 14 Plasma-TEOS CVD NSG Film 15 Ozone-TEOS CVD PSG Film 16 N-type Photoresist Membrane 17 SOG membrane

Claims (1)

[Claims] 1. A step of forming an atmospheric pressure O ₃ -TEOS film after a base substrate is treated with a solution of an organic compound, a step of forming a dummy pattern in a rough portion of a treatment pattern, and an organic layer over the entire surface. It is characterized by the steps of spin-coating a glass precursor solution dissolved in a solvent and then heating and curing it to form an SOG film with a flat surface, and performing an etch-back process on these SOG film and dummy pattern. Of manufacturing a semiconductor device.