JPH06303558A - Image processing device - Google Patents

Abstract

PURPOSE:To surely write the area of data in an area desired to fetch within a fetch range. CONSTITUTION:A mode control part 1 makes a video signal in a cursor display area fetch in memory 7 via a memory controller 6, and sends a signal to instruct the moving direction of a cursor to a cursor moving means 2, and the cursor moving means 2 sends cursor display signals representing the horizontal and vertical directions of the cursor to be displayed on a cursor display means 3. The cursor display means 3 sends the cursor display signal to a mixing circuit 4. and the mixing circuit 4 outputs by mixing the video signal sent out from a video signal processing circuit 5 with the cursor display signal. The cursor is displayed on a CRT based on a mixed video signal.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an image processing apparatus applied to a video printer apparatus having an image memory.

[0002]

2. Description of the Related Art In an image processing apparatus for storing a video signal in a memory for processing, the price of the memory accounts for a large portion of the total cost.

Conventionally, in order to reduce the memory capacity, in other words, the number of memories used, the number of samplings of image data is reduced, the number of bits per pixel is reduced, and the range of capturing image data is reduced. It is known how to do it.

[0004]

However, if the above measures are taken, a trade-off becomes a problem in the field where image quality is required.

[0005] Further, it has been attempted to reduce the memory capacity by limiting the capture range of image data, but in this case, there is a problem that data outside the capture range cannot be written in the memory.

An object of the present invention is to reduce the memory capacity by enabling the area of the data of the area to be taken in to be written in the memory without degrading the image data and without being missed in the taken-in range. An object is to provide an image processing device that enables cost reduction.

[0007]

In order to achieve the above object, the image processing apparatus of the present invention includes an area designation signal generating means for generating an area designation signal for designating an image area to be stored in a memory, and a desired area. It is characterized by comprising area moving means for moving the area specifying signal and area specifying signal displaying means for displaying the area specifying signal by superimposing it on the video signal.

Further, it is characterized in that a memory controller for storing the image data in the designated area in the memory is provided.

[0009]

According to the image processing apparatus having the above construction, the area to be taken into the memory is generated by the area designating signal generating means, and the area designating means displays the area designating signal to a desired area while observing the area designating signal displaying means. Moving.

Further, the memory controller stores the image data in the designated area in the memory.

[0011]

Embodiments of the present invention will be described below with reference to the drawings.

FIG. 1 is a block diagram showing the configuration of an embodiment of the present invention. The mode control section 1 controls the operation mode of each block and also a signal for instructing the cursor moving means 2 to move the cursor. Is sent. Cursor moving means 2
Sends a signal indicating the horizontal and vertical areas of the cursor displayed on the cursor display means 3.

The cursor display means 3 sends a cursor display signal to the mix circuit 4. The mix circuit 4 mixes the video signal sent from the video signal processing circuit 5 and the cursor display signal sent from the cursor display means 3 and outputs the mixed signal.

The video signal processing circuit 5 decodes a video signal (Vin) output from a VTR, a video camera, a TV, etc., A / D (analog / digital) converts it, and sends it to the memory 7. Further, the data sent from the memory 7 is D / A (digital / analog) converted and encoded and sent to the mix circuit 4. In addition, a sync signal is sent to the cursor moving means 2 and the memory controller 6. The memory controller 6 controls the operation of the memory 7 so that the video signal in the cursor display area determined by the cursor moving means 2 is taken into the memory 7.

The operation will be described in detail below.

In normal times, a video signal (hereinafter referred to as Vin) input from the video input is decoded, A / D converted, D / A converted and encoded by the video signal processing circuit 5.
(Or, as it is as it is), it is output as a video-out signal (hereinafter referred to as Vout) via the mix circuit 4, and is displayed on a CRT (cathode ray tube) or the like. At this time,
No cursor display signal is added.

If the Vin is to be stored in the memory 7,
By inputting a signal of a cursor display command from the outside by key input or the like to the mode control unit 1, the cursor is displayed on the CRT via the cursor moving unit 2, the cursor display unit 3, and the mix circuit 4. At this time, the display area of the cursor is the default value (the moving amount output from the cursor moving means 2 is the default value). It should be noted that the default value is an area where the distances from the left end, the right end, the upper end, and the lower end are equal when viewed on the screen of the CRT 8 shown in FIG.

Here, if the area to be stored in the memory 7 is desired to be another area, a cursor movement command signal by key input or the like is input to the mode control unit 1 so that the cursor movement means 2, the cursor display means 3, and the like. Mix circuit 4
The position where the cursor is displayed moves via CR
Displayed at T8.

For example, as shown in FIG. 3, when the capture position is moved to the right (rightward in FIG. 2) on the screen of the CRT 8, the value corresponding to the amount of movement to the right is used as the horizontal synchronization signal.
The count value of the clock from (hereinafter referred to as HD) is sent from the mode control unit 1 to the cursor moving means 2,
The cursor moving means 2 generates and outputs a horizontal cursor display start position signal (hereinafter referred to as HCDS signal) and a horizontal cursor display end position signal (hereinafter referred to as HCDE signal) based on the count value. To do.

The timing at this time is shown in FIG. The cursor display means 3 outputs a vertical cursor display signal only at the changing points of HCDS and HCDE output from the cursor moving means 2 (the LOW period of the default value display signal in FIG. 4). By repeating the above operation, the vertical cursor display position moves to the right on the screen.

Here, the horizontal cursor display interval (H
The distance between CDS and HCDE is constant, and when HCDE moves rightward to a predetermined position, it cannot move further rightward.

The above is the rightward direction, but the same applies to the leftward direction, and therefore description thereof is omitted.

Next, when moving the capture position to the upper side (upward direction in FIG. 2) on the screen, the mode control unit 1 sets the value corresponding to the amount of upward movement to the vertical synchronization signal (hereinafter, V
It is sent to the cursor moving means 2 as the HD count value from (D). Based on the count value, the cursor moving means 2 outputs a vertical cursor display start position signal.
(Hereinafter, referred to as VCDS signal) and vertical cursor display end position signal (hereinafter, referred to as VCDE signal) are generated and output.

The timing at this time is shown in FIG. The cursor display means 3 outputs a horizontal cursor display signal only at the changing points of the VCDS and VCDE output by the cursor moving means 2 (the LOW period of the upward movement display signal in FIG. 5). By repeating the above operation, the horizontal cursor display moves upward in the screen.

Here, the vertical cursor display interval (V
The distance between CDS and VCDE is constant, and when the VCDS moves upward to a predetermined position, it cannot move further upward.

Although the above is the upward direction, the same applies to the downward direction, and therefore description thereof will be omitted.

As described above, the cursor displayed with the default value in FIG. 2 can be arbitrarily moved within the range defined by left, right, up and down. In addition, it is easy to cut out and display the cursor in a box shape as shown in FIG.
Moreover, since it can be performed by a known method, the description thereof will be omitted.

Next, a method for storing the image data on the screen in the cursor display area set as described above in the memory 7 will be described.

The memory controller 6 permits writing to the memory 7 at the timing of HCDS and VCDS generated by the cursor moving means 2, and prohibits writing to the memory 7 at the timing of HCDE and VCDE.

That is, loading of data from the timings of HCDS and VCDS into the memory 7 is started,
The data up to the horizontal data at the timing of HCDE becomes the data in one horizontal (1H) line taken into the memory 7. The next 1H line data is HCDS and VCDS.
The data of the timing from +1 (1 is the number of lines (H)) to HCDE is written.

When the above operation is repeated while increasing one line at a time in the vertical direction and the vertical direction becomes VCDE, the data from HCDS to HCDE of that line is written in the memory 7, and the writing is completed. In this way, the image data in the area surrounded by the cursor can be written in the memory 7. The shaded area in FIG. 4 is the memory write-enabled area within the 1H line, and the shaded area in FIG. 5 is the memory write-enabled area within the 1 vertical line.

[0032]

As described above, according to the structure of the first aspect of the present invention, the image processing apparatus of the present invention is provided with the means for designating the area to be taken into the memory, so that the image to be taken into the memory can be obtained. C part within the range allowed by the memory capacity
It can be easily specified while checking on the RT.

According to the second aspect of the present invention, the image portion desired to be captured in the memory can be captured in the memory within the range permitted by the memory capacity, and the memory capacity can be reduced. As a result, the cost of the device can be reduced. Moreover, the image quality does not deteriorate due to the reduced memory capacity.

[Brief description of drawings]

FIG. 1 is a block diagram showing the configuration of an embodiment of an image processing apparatus of the present invention.

FIG. 2 is an explanatory diagram showing a cursor display position in a default case.

FIG. 3 is an explanatory diagram showing a cursor display position after moving a predetermined amount to the upper right side.

FIG. 4 is a timing chart when the cursor is moved to the right on the screen.

FIG. 5 is a timing chart when the cursor is moved to the upper side on the screen.

[Explanation of symbols]

DESCRIPTION OF SYMBOLS 1 ... Mode control part (area designation signal generation means), 2 ... Cursor movement means (area movement means), 3 ... Cursor display means
(Area designation signal display means), 4 ... Mix circuit (area designation signal display means), 6 ... Memory controller, 7 ...
Memory, 8 ... CRT (area designation signal display means).

Claims (2)

[Claims] 1. An area specifying signal generating means for generating an area specifying signal for specifying an image area to be stored in a memory, and an area moving means for moving the area specifying signal to a desired area,
An image processing apparatus comprising: a region designation signal display means for displaying a region designation signal by superimposing it on a video signal. 2. The image processing apparatus according to claim 1, further comprising a memory controller for storing image data in a designated area in the memory.