JPH06291179A - Manufacture of semiconductor device - Google Patents

Abstract

PURPOSE:To accurately isolate elements especially in the plane direction with excellent controllability. CONSTITUTION:The manufacture is constituted of a process of forming an ion-implanting mask 12, which has openings in the parts to be plane-direction element isolation areas at the end, a process of forming plane direction element isolation insulating layers 13 in the element isolation areas by implanting oxygen ions into a semiconductor substrate 11 through the openings of the mask 12 and a process of removing the mask 12.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a semiconductor device, and more particularly to a method of manufacturing a semiconductor device which is applied to obtain, for example, a semiconductor integrated circuit device having a plane direction element isolation insulating layer.

[0002]

2. Description of the Related Art For example, in a semiconductor integrated circuit device IC, an isolation insulating layer is formed to isolate the circuit elements from each other in the plane direction of a semiconductor substrate.

This in-plane element isolation is usually formed by so-called LOCOS which selectively thermally oxidizes the element isolation area, so-called field area, on the surface of the Si semiconductor substrate.

As shown in the schematic cross-sectional view of FIG. 5, this LOCOS is made of, for example, Si ₃ N ₄ in which an opening 2W is formed on the Si semiconductor substrate 1 in a region for separating in the plane direction. The thermal oxidation mask 2 is deposited.

Next, the surface of the semiconductor substrate 1 is thermally oxidized to form SiO ₂ formed by oxidizing the surface of the semiconductor substrate 1 exposed to the outside through the opening 2W of the mask 2 as shown in FIG. The isolation insulating layer 3 is formed of an insulating layer. .

However, in the case of this method, as shown in FIG. 6, a so-called bird's beak in which the thermal oxidation enters under the peripheral edge of the mask 2 and progresses is unstable,
This hinders the accurate setting of the formation position and area of the element formation region and the insulation isolation region, and hinders the improvement of integration density.

[0007]

SUMMARY OF THE INVENTION According to the present invention, it is possible to achieve high integration in an IC or the like by making it possible to separate elements in a plane direction particularly accurately and with good controllability. A method of manufacturing the semiconductor device is provided.

[0008]

According to the present invention, as shown in FIG. 1, an ion implantation mask 12 is formed in which an opening 12W is formed on a semiconductor substrate 11 which finally becomes a surface direction element isolation region. 2, the step of forming oxygen in the semiconductor substrate 11 through the opening 12W of the mask 12 to form the plane direction element isolation insulating layer 13 in the element isolation region, as shown in FIG. As shown, a step of removing the mask 12 is taken.

Further, in the present invention, in the above method, a heating step is further taken after the ion implantation.

[0010]

In the present invention, the element isolation insulating layer 13 for performing insular isolation is formed by oxygen ion implantation. In this case, the expansion in the in-plane direction at the time of formation is
Since it can be significantly reduced compared to the case of using LOCOS described above, it is possible to improve the accuracy of the formation region of the semiconductor element and its isolation insulating area, and thereby to increase the density of element formation. .

Incidentally, the technique of forming an insulating layer by ion implantation of oxygen is known as a so-called SIMOX method, but the conventional SIMOX method is to perform insulation separation in the depth direction of a semiconductor substrate. The insulation separation in the plane direction is based on the LOCOS method, for example.

[0012]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS An embodiment of the manufacturing method of the present invention will be described with reference to the schematic sectional views in each step of FIGS.

As shown in FIG. 1, a semiconductor substrate 11 is prepared. This semiconductor substrate may be composed of a Si substrate itself, or a structure in which a Si semiconductor layer is formed on a semiconductor base or an insulating base.

A protective film 14 is formed on the entire surface of the semiconductor substrate 11, if necessary, and an oxygen ion implantation mask 12 is formed on the protective film 14.

The mask 12 may be composed of, for example, Si _X O _y N _z or a material layer containing C therein. Here, x, y, z are atomic ratios x + y + z = 1, x> 0, y ≧
0, z ≧ 0.

As the mask 12, for example, Si, S
iO ₂ is formed on the entire surface by vapor deposition, sputtering, etc., and is selectively etched by photolithography or the like to remove a portion which will finally become a plane direction element isolation region, thereby forming an opening 12W there.

On the other hand, the protective film 14 under this is the mask 1
A material with low etching property against the etching liquid for 2
Material layer such as mask 12 is made of Si, SiO₂If Si
₃N _FourCan be formed by.

As shown in FIG. 2, with the mask 12 as a mask, oxygen ions are ion-implanted with a high dose amount through the opening 12W with the energy of penetrating the protective film 14 to form silicon oxide SiO under the opening 12W, that is, in the element isolation region. ₂ is formed, and the in-plane element isolation insulating layer 13 is formed thereby. In this ion implantation,
It is performed in a state where the substrate 11 is heated to, for example, about 500 ° C to 600 ° C.

After that, as shown in FIG. 3, the mask 12 and the protective film 14 are removed. Further, after the mask 12 and the protective film 14 are removed or at least after the step of ion implantation before the removal, for example, at 1300 ° C. for 30 minutes to 1 minute.
A high temperature heat treatment for about an hour is performed to remove the strain caused by the ion implantation or to recover the defect.

The mask 12 is removed by, for example, chemical etching. At this time, since the protective film 14 has resistance to this etching solution, the mask 12 has the same quality as the element isolation insulating layer 13, for example, SiO ₂ or When Si of the same quality as the substrate 11 is used, unnecessary etching of the element isolation insulating layer 13 or the substrate 11 can be avoided.

After that, the protective film 14 is removed by, for example, chemical etching similarly. This protective film 14
Shall be selected from materials that show almost no etching property with respect to the element isolation insulating layer 13 or the semiconductor substrate 11.

In this way, various semiconductor elements 15 are formed on the semiconductor substrate 11 on which the element isolation insulating layer 13 is formed, as shown in FIG. In the illustrated example, the element isolation insulating layer 1
In the case where the MOS transistor is formed in the formation region of the semiconductor element separated by 3, the well-known method is used.
Source / drain regions 16 are formed, a gate insulating layer 17 is formed between the source / drain regions 16, and a gate electrode 18 is formed thereon, and source / drain electrodes 19 are formed on the source / drain regions 16. .

In the above-mentioned example, the mask 12 is removed by chemical etching, but it may be removed by mechanical chemical polishing. In this case, it is necessary to form the protective film 14 described above. There is no.

As described above, in the manufacturing method of the present invention, since the element isolation insulating layer 13 for performing insular isolation in the plane direction is formed by ion implantation of oxygen ions, there is almost no spread in the plane direction. In addition, the pattern can correspond to the pattern of the opening 12W of the mask 12.

[0025]

According to the manufacturing method of the present invention, since the element isolation insulating layer 13 for performing the insulation isolation in the plane direction is formed by the ion implantation of oxygen, the spread in the plane direction at the time of forming the element isolation insulating layer 13 can be improved. Since it can be significantly reduced compared to the case of using LOCOS, it is possible to improve the accuracy of formation of the formation region of the semiconductor element and its isolation insulating region. It is possible to bring about a great advantage in practical use such as high density.

[Brief description of drawings]

FIG. 1 is a schematic cross-sectional view in a step of an example of the production method of the present invention.

FIG. 2 is a schematic cross-sectional view in a step of an example of the manufacturing method of the present invention.

FIG. 3 is a schematic cross-sectional view in a step of an example of the production method of the present invention.

FIG. 4 is a schematic cross-sectional view of a semiconductor device obtained by the manufacturing method of the present invention.

FIG. 5 is a schematic cross-sectional view in one step of a conventional manufacturing method.

FIG. 6 is a schematic cross-sectional view in one step of a conventional manufacturing method.

[Explanation of symbols]

 11 semiconductor substrate 12 mask 12W opening 13 element isolation insulating layer

Claims (2)

[Claims] 1. A step of forming, on a semiconductor substrate, an ion implantation mask in which an opening is finally formed in a portion to be a surface direction element isolation region, and oxygen ions are ion-exchanged into the semiconductor substrate through the opening of the mask. A method of manufacturing a semiconductor device, comprising: a step of implanting to form a plane direction element isolation insulating layer in the element isolation region; and a step of removing the mask. 2. The method for manufacturing a semiconductor device according to claim 1, further comprising a heating step after the ion implantation.