JPH06289049A - Acceleration sensor - Google Patents

Acceleration sensor

Info

Publication number
JPH06289049A
JPH06289049A JP5076978A JP7697893A JPH06289049A JP H06289049 A JPH06289049 A JP H06289049A JP 5076978 A JP5076978 A JP 5076978A JP 7697893 A JP7697893 A JP 7697893A JP H06289049 A JPH06289049 A JP H06289049A
Authority
JP
Japan
Prior art keywords
acceleration sensor
silicon
electrode
single crystal
capacitance
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP5076978A
Other languages
Japanese (ja)
Inventor
Kazuo Sato
佐藤  一雄
Akira Koide
晃 小出
Kiyomitsu Suzuki
清光 鈴木
Masayoshi Suzuki
政善 鈴木
Masahide Hayashi
雅秀 林
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Hitachi Ltd
Original Assignee
Hitachi Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi Ltd filed Critical Hitachi Ltd
Priority to JP5076978A priority Critical patent/JPH06289049A/en
Publication of JPH06289049A publication Critical patent/JPH06289049A/en
Pending legal-status Critical Current

Links

Classifications

    • GPHYSICS
    • G01MEASURING; TESTING
    • G01PMEASURING LINEAR OR ANGULAR SPEED, ACCELERATION, DECELERATION, OR SHOCK; INDICATING PRESENCE, ABSENCE, OR DIRECTION, OF MOVEMENT
    • G01P15/00Measuring acceleration; Measuring deceleration; Measuring shock, i.e. sudden change of acceleration
    • G01P15/02Measuring acceleration; Measuring deceleration; Measuring shock, i.e. sudden change of acceleration by making use of inertia forces using solid seismic masses
    • G01P15/08Measuring acceleration; Measuring deceleration; Measuring shock, i.e. sudden change of acceleration by making use of inertia forces using solid seismic masses with conversion into electric or magnetic values
    • G01P2015/0805Measuring acceleration; Measuring deceleration; Measuring shock, i.e. sudden change of acceleration by making use of inertia forces using solid seismic masses with conversion into electric or magnetic values being provided with a particular type of spring-mass-system for defining the displacement of a seismic mass due to an external acceleration
    • G01P2015/0822Measuring acceleration; Measuring deceleration; Measuring shock, i.e. sudden change of acceleration by making use of inertia forces using solid seismic masses with conversion into electric or magnetic values being provided with a particular type of spring-mass-system for defining the displacement of a seismic mass due to an external acceleration for defining out-of-plane movement of the mass
    • G01P2015/0825Measuring acceleration; Measuring deceleration; Measuring shock, i.e. sudden change of acceleration by making use of inertia forces using solid seismic masses with conversion into electric or magnetic values being provided with a particular type of spring-mass-system for defining the displacement of a seismic mass due to an external acceleration for defining out-of-plane movement of the mass for one single degree of freedom of movement of the mass
    • G01P2015/0828Measuring acceleration; Measuring deceleration; Measuring shock, i.e. sudden change of acceleration by making use of inertia forces using solid seismic masses with conversion into electric or magnetic values being provided with a particular type of spring-mass-system for defining the displacement of a seismic mass due to an external acceleration for defining out-of-plane movement of the mass for one single degree of freedom of movement of the mass the mass being of the paddle type being suspended at one of its longitudinal ends

Landscapes

  • Crystals, And After-Treatments Of Crystals (AREA)

Abstract

PURPOSE:To provide a low-cost sensor structure having excellent temperature characteristics, high reliability of electric connection and sealing of an interior in an capacitance type silicon acceleration sensor. CONSTITUTION:A movable electrode 11 and stationary electrodes 22, 22' are all formed of silicon single crystal substrates. An acceleration sensor comprises a structure in which a thick porous silicon layer formed on the surface of an electrode chip is interposed between thermally oxidized thick oxide film layers 201 and 201', and diffused to be connected. In order to prevent the electrode 11 and the electrodes 22, 22' from short-circuiting on an outer periphery of a sensor chip, a structure in which spaces 3, 3' are formed on the periphery to spatially isolate both the electrode surfaces is provided. Accordingly, temperature characteristics are improved by equivalent thermal expansion coefficients, a gap accuracy between the electrodes is improved by uniform junction thickness, a capacitance preferable to the sensor is obtained by the oxide film thickness, a residual stress in the film is small due to short-time film formation, and a deformation after the connection is small. The sensor chip can be vertically mounted with small thermal deformation, and a short-circuit between boards can be prevented due to the space at the periphery.

Description

【発明の詳細な説明】Detailed Description of the Invention

【0001】[0001]

【産業上の利用分野】本発明は加速度センサに係り、特
に単結晶シリコンウエハからなる微小なセンサ構造を有
する加速度センサに関する。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an acceleration sensor, and more particularly to an acceleration sensor having a minute sensor structure made of a single crystal silicon wafer.

【0002】[0002]

【従来の技術】自動車の車体制御、衝突検知システム等
の目的で、小形かつ高性能の加速度センサの需要が高ま
っている。この分野では特に、上記の要求を満足し、さ
らに大量生産を行った際にも品質の均一性、安価な生産
コスト、信頼性などが要求されている。これまでに開発
されたセンサの有力な方式の一つに、シリコン単結晶の
微細加工技術を使ったセンサがある。この方式は、さら
に検出原理の違いによって、ピエゾ抵抗式と静電容量式
に分類される。ピエゾ抵抗式は、ひずみを検出するピエ
ゾ抵抗素子が環境の温度に大きく依存するので、出力の
温度補償がかなり難しいという欠点がある。これにたい
して静電容量式では、出力の温度依存性が比較的に小さ
く、高感度であることから、使用環境の厳しい自動車に
搭載するのに適している。この方式の代表的な例に、特
開平1−152369号公報記載の例がある。この例で
は、シリコン単結晶の可動電極チップを、上下から2枚
の固定電極で挟んだ構造から成っている。固定電極とし
ては導電薄膜を表面に形成したガラスが使われている。
シリコンとガラスの接合には静電接合が使われており、
可動および固定電極の間隙が正確につくられる。
2. Description of the Related Art There is an increasing demand for small and high-performance acceleration sensors for purposes such as vehicle body control and collision detection systems for automobiles. In this field, in particular, the above requirements are satisfied, and even in mass production, quality uniformity, low production cost, reliability, etc. are required. One of the most powerful sensors developed so far is a sensor using silicon single crystal microfabrication technology. This method is further classified into a piezoresistive type and a capacitance type, depending on the difference in detection principle. The piezoresistive method has a drawback that temperature compensation of the output is considerably difficult because the piezoresistive element that detects strain greatly depends on the temperature of the environment. On the other hand, the capacitance type is suitable for mounting on an automobile in a harsh environment because the output has relatively small temperature dependence and high sensitivity. A typical example of this method is described in Japanese Patent Application Laid-Open No. 1-152369. In this example, a silicon single crystal movable electrode chip is sandwiched between two fixed electrodes from above and below. Glass having a conductive thin film formed on its surface is used as the fixed electrode.
Electrostatic bonding is used to bond silicon and glass,
The gap between the movable and fixed electrodes is created exactly.

【0003】[0003]

【発明が解決しようとする課題】しかしながら、上記特
開平1−152369号公報記載の構造では、ガラス面
上の固定電極から外部に配線を取り出すために、ガラス
に孔をあけて接続をとり、その後、孔を封止する必要が
ある。このため、製造コスト、接続や封止の信頼性の点
で難点がある。また、シリコン、ガラス、封止材料相互
の熱膨張率の差により、出力の温度特性が劣化する傾向
があった。
However, in the structure described in JP-A-1-152369 mentioned above, in order to take out the wiring from the fixed electrode on the glass surface to the outside, a hole is made in the glass to make a connection, and then the connection is made. , It is necessary to seal the hole. Therefore, there are problems in manufacturing cost and reliability of connection and sealing. Moreover, the temperature characteristics of the output tended to deteriorate due to the difference in the coefficient of thermal expansion among silicon, glass, and the sealing material.

【0004】このようにシリコン基板を2枚のガラス基
板で挟む方式で、熱膨張率の差による特性劣化を防ぐ方
法としては、上下のガラス基板の厚さを十分に薄くする
かわりに、ガラスの背面にさらに厚いシリコン基板を張
り合わせた構造が提案されている(Technical digest o
f the Transducers'87, p.385-398)。この方式では、
計5層の基板を張り合わせるので、加工プロセスは煩雑
になるという難点があった。
As a method of preventing the characteristic deterioration due to the difference in the coefficient of thermal expansion by the method of sandwiching the silicon substrate between the two glass substrates as described above, instead of making the upper and lower glass substrates sufficiently thin, A structure in which a thicker silicon substrate is attached to the back surface has been proposed (Technical digest o
f the Transducers'87, p.385-398). With this method,
Since a total of five layers of substrates are laminated, there is a problem that the processing process becomes complicated.

【0005】また一方、特開平2−134570号公報
では、同様の目的から、可動電極だけでなく固定電極に
もシリコン単結晶基板を使った構造が提案されている。
この方式では、3枚のシリコン基板間の絶縁の目的で、
シリコン基板表面に形成した熱酸化膜を利用することが
開示されているが、形成できる膜厚は1μm程度に限定
されるので、基板間の接合面に寄生する静電容量が大き
いという欠点がある。この寄生静電容量を低減するため
に、本例では、さらに接合面に適当な厚さの低融点ガラ
スを塗布し基板を接着することも開示されているが、こ
の場合には、低融点ガラス層の厚さの制御、すなわち、
可動および固定電極間のギャップの制御が難しいという
欠点があった。
On the other hand, Japanese Patent Laid-Open No. 2-134570 proposes a structure using a silicon single crystal substrate not only for the movable electrode but also for the fixed electrode for the same purpose.
In this method, for the purpose of insulation between three silicon substrates,
It is disclosed that a thermal oxide film formed on the surface of a silicon substrate is used, but since the film thickness that can be formed is limited to about 1 μm, there is a drawback that the parasitic capacitance on the joint surface between the substrates is large. . In order to reduce this parasitic capacitance, in this example, it is also disclosed that a low melting point glass having an appropriate thickness is further applied to the bonding surface and the substrate is bonded, but in this case, the low melting point glass is Control of layer thickness, ie
There is a drawback that it is difficult to control the gap between the movable and fixed electrodes.

【0006】そこで発明者らは、可動電極、固定電極と
もにシリコン単結晶を使い、電極チップの表面に形成し
た厚い多孔質シリコン層を熱酸化した厚い酸化膜層を挟
んで拡散接合した構造を発明した。また、センサチップ
の外周面で可動電極と固定電極が短絡するのを防ぐた
め、外周面では、両電極面を空間的に分離する構造を発
明した。
Therefore, the inventors of the present invention have invented a structure in which a silicon single crystal is used for both the movable electrode and the fixed electrode, and a thick porous silicon layer formed on the surface of the electrode chip is diffusion-bonded with a thick oxide film layer thermally oxidized therebetween. did. Further, in order to prevent the movable electrode and the fixed electrode from being short-circuited on the outer peripheral surface of the sensor chip, the invention has invented a structure in which both electrode surfaces are spatially separated on the outer peripheral surface.

【0007】本発明の目的は、静電容量型シリコン加速
度センサにおける上記の問題を解決し、温度特性が良
く、電気的接続、内部封止の信頼性の高いセンサ構造を
有する安価な加速度センサを提供することにある。
An object of the present invention is to solve the above problems in a capacitance type silicon acceleration sensor and to provide an inexpensive acceleration sensor having a highly reliable sensor structure of good temperature characteristics, electrical connection and internal sealing. To provide.

【0008】[0008]

【課題を解決するための手段】上記目的を達成するため
に本発明は、加速度によって変位する質量部(可動電
極)、および前記質量部と対向して静電容量を形成する
電極部(固定電極)を有する静電容量型の加速度センサ
において、前記加速度によって変位する質量部、および
前記質量部と対向して静電容量を形成する電極部が、い
ずれもシリコン単結晶からなり、それぞれのシリコン単
結晶の接合界面が多孔質シリコンを酸化した層からなる
ことを特徴とするものである。また、それぞれのシリコ
ン単結晶が、その表面の酸化物を介して直接接合された
構造であり、かつ、前記接合界面がセンサチップの外周
の端面には存在せず、接合された2部材の外周端面に空
隙が形成されていることを特徴とするものである。
In order to achieve the above object, the present invention provides a mass portion (movable electrode) that is displaced by acceleration, and an electrode portion (fixed electrode) that forms a capacitance facing the mass portion. ), A mass part that is displaced by the acceleration, and an electrode part that forms a capacitance facing the mass part are both made of silicon single crystal. It is characterized in that the bonding interface of the crystals is composed of a layer obtained by oxidizing porous silicon. In addition, each silicon single crystal has a structure in which it is directly bonded via an oxide on the surface, and the bonding interface does not exist on the end face of the outer circumference of the sensor chip, and the outer circumference of the bonded two members. It is characterized in that voids are formed on the end faces.

【0009】[0009]

【作用】上記構成によれば、固定電極基板自体が導体で
あるので、固定電極を貫通して電気的接続したり、貫通
孔を樹脂等で封止する必要がない。可動電極、固定電極
がいずれもシリコン単結晶であり、熱膨張率が等しいの
で、センサ出力の温度特性に優れる。可動電極と固定電
極の間に挟まれた多孔質シリコンの厚い酸化膜は、接合
面における両電極間の静電容量(浮遊容量)を低減し、
センサの感度が向上する。また、センサチップの外周端
面の空隙により、基板間の端面における短絡を完全に回
避することができる。
According to the above structure, since the fixed electrode substrate itself is a conductor, there is no need to penetrate the fixed electrode for electrical connection or seal the through hole with resin or the like. Since the movable electrode and the fixed electrode are both made of silicon single crystal and have the same coefficient of thermal expansion, the temperature characteristics of the sensor output are excellent. The thick oxide film of porous silicon sandwiched between the movable electrode and the fixed electrode reduces the electrostatic capacitance (stray capacitance) between the two electrodes on the joint surface,
The sensitivity of the sensor is improved. Further, due to the gap on the outer peripheral end surface of the sensor chip, a short circuit on the end surface between the substrates can be completely avoided.

【0010】[0010]

【実施例】以下、本発明の実施例を、図面を参照して具
体的に説明する。図1に本発明の一実施例の加速度セン
サのゲ−ジ部分の分解図を示す。また、センサゲ−ジ部
分の断面図を図2および図3に示す。加速度を感じて変
位する可動電極11と、その上下にあって可動電極の動
きを静電容量の変化としてとらえるための固定電極2
2、22’が、3枚のシリコン単結晶の基板1、2、
2’に別個に形成されている。3層のシリコン基板の接
合部分は、10〜20μmの厚い酸化膜からなってい
る。その酸化膜は中央の基板1の表面に形成された膜1
01と、上下の基板2、2’に形成された膜201、2
01’とから構成され、その合計の厚さが前記の値(1
0〜20μm)になる。
Embodiments of the present invention will be specifically described below with reference to the drawings. FIG. 1 shows an exploded view of a gage portion of an acceleration sensor according to an embodiment of the present invention. 2 and 3 are sectional views of the sensor gauge portion. A movable electrode 11 that is displaced by feeling acceleration, and a fixed electrode 2 that is above and below the movable electrode 11 to detect movement of the movable electrode as a change in capacitance.
2, 22 ′ are three silicon single crystal substrates 1, 2,
2'is formed separately. The junction portion of the three-layer silicon substrate is made of a thick oxide film having a thickness of 10 to 20 μm. The oxide film is a film 1 formed on the surface of the central substrate 1.
01 and the films 201, 2 formed on the upper and lower substrates 2, 2 '.
01 'and the total thickness thereof is the value (1
0 to 20 μm).

【0011】シリコンの3層構造を採用した場合、セン
サチップの周辺部はダイシングによって切断された面が
導電性を持つ面として露出する。数十μmの厚い絶縁膜
を介しているとはいえ、端面に塵埃が付着すると基板間
が短絡するおそれがある。本実施例では図1に示すよう
に、それぞれのシリコン基板の表面の外周部に、あらか
じめ切欠き形状13、23、23’を加工している。こ
のような基板をたがいに接合すれば、図2に示すように
センサチップ端面では、3層の基板の導電部がおおよそ
100μm以上の間隔を持つようになる。この結果、3
層の基板間の端面における短絡が完全に回避される。端
面におけるこの空間3、3’は、そのままの状態で使用
に供することができるが、さらに短絡の危険性を排除す
るために、図3に示すように樹脂などの絶縁性材料31
でこの空間を埋めることは、信頼性の向上を目的として
適宜行われ得る。
When a three-layer structure of silicon is adopted, the peripheral portion of the sensor chip is exposed as a conductive surface at the surface cut by dicing. Even though the thick insulating film having a thickness of several tens of μm is interposed between the substrates, dust may adhere to the end faces to cause a short circuit between the substrates. In this embodiment, as shown in FIG. 1, notch shapes 13, 23, and 23 'are processed in advance on the outer peripheral portion of the surface of each silicon substrate. If such substrates are joined together, as shown in FIG. 2, the conductive portions of the three-layered substrates have an interval of about 100 μm or more on the end surface of the sensor chip. As a result, 3
Short circuits at the end faces of the layers between the substrates are completely avoided. The spaces 3, 3'on the end faces can be used as they are, but in order to further eliminate the risk of short circuit, as shown in FIG. 3, an insulating material 31 such as resin is used.
The filling of this space with can be appropriately performed for the purpose of improving reliability.

【0012】本実施例では、中間基板1と上下の基板
2、2’とが、その表面に形成した膜厚10μm以上の
厚い酸化膜で電気的に絶縁されている。このように厚い
酸化膜は、従来の単結晶シリコンの熱酸化では不可能で
あった。単結晶シリコンの熱酸化による酸化膜の成長速
度は時間の平方根に比例しており、通常形成される酸化
膜の厚さはたかだか5μm程度であった。この程度の厚
さの酸化膜を介したシリコン3層構造では、層間の静電
容量が大きいため、可動電極の変位を静電容量の変化と
してとらえる目的に対しては、浮遊容量が大きすぎると
いう欠点があった。さらに、酸化膜の厚さを5μm程度
まで厚くすると、酸化膜の内部応力によってシリコン基
板に反り変形を生じて、3層基板間の接合歩留まりが下
がるという欠点があった。
In this embodiment, the intermediate substrate 1 and the upper and lower substrates 2 and 2'are electrically insulated by a thick oxide film having a film thickness of 10 μm or more formed on the surface thereof. Such a thick oxide film has not been possible by conventional thermal oxidation of single crystal silicon. The growth rate of an oxide film by thermal oxidation of single crystal silicon is proportional to the square root of time, and the thickness of an oxide film that is usually formed is about 5 μm. In a silicon three-layer structure having an oxide film of this thickness, the inter-layer capacitance is large, and therefore the stray capacitance is too large for the purpose of capturing the displacement of the movable electrode as a change in capacitance. There was a flaw. Further, if the thickness of the oxide film is increased to about 5 μm, the internal stress of the oxide film causes the silicon substrate to warp and deform, resulting in a decrease in the bonding yield between the three-layer substrates.

【0013】本実施例の第一の特徴は、シリコン基板の
接合界面に多孔質シリコン層を酸化した厚い酸化膜を配
置したことにある。これによって、膜厚が均一で十分に
厚い絶縁層を接合界面に配置することが可能になり、同
時に、安価な加工プロセスで静電容量型センサを製造す
ることが可能になった。本実施例の第二の特徴は、積層
接合した接合界面がシリコンチップの外周には存在せ
ず、外周部においては基板相互が空隙(空間3、3’)
を持つことである。これによって、直接積層されたシリ
コン基板間が電気的に短絡することがなくなった。
The first feature of this embodiment is that a thick oxide film obtained by oxidizing the porous silicon layer is arranged at the bonding interface of the silicon substrate. As a result, it becomes possible to dispose an insulating layer having a uniform film thickness and sufficiently thick at the bonding interface, and at the same time, it becomes possible to manufacture a capacitance type sensor by an inexpensive processing process. The second characteristic of the present embodiment is that the bonding interface of laminated bonding does not exist on the outer periphery of the silicon chip, and the substrates have voids (spaces 3 and 3 ') in the outer peripheral portion.
Is to have. As a result, there is no longer an electrical short circuit between the directly stacked silicon substrates.

【0014】本実施例の加速度センサの加工プロセスの
断面図を図4および図5に示した。図4は、図1で示し
た可動電極を持つ中間基板1の加工プロセスである。シ
リコン基板表面に形成した窒化膜(Si3N4)110をエ
ッチングマスクとして、KOH水溶液を使った異方性エ
ッチングによって、可動電極11、梁12、チップ外周
の切欠き13、が形成される(図4(a)〜(e))。
その後、酸化膜を形成すべき表面の窒化膜を除去し、さ
らに酸化膜を形成しない部分を保護膜14で覆う(図4
(f))。保護膜14の材料としては、弗酸に耐性のあ
る金属、たとえば白金を蒸着した膜が適当である。次い
で、単結晶シリコンの露出した部分を、後に述べる処理
によって多孔質化する(図4(g))。多孔質化したシ
リコン層102の厚さは、10〜50μmある。保護膜
14を除去した後、基板を加熱して酸化すると、多孔質
シリコン層102は、容易に酸化して厚い酸化膜層10
1が形成される。
4 and 5 are sectional views showing the machining process of the acceleration sensor of this embodiment. FIG. 4 shows a processing process of the intermediate substrate 1 having the movable electrode shown in FIG. Using the nitride film (Si 3 N 4 ) 110 formed on the surface of the silicon substrate as an etching mask, the movable electrode 11, the beam 12, and the notch 13 on the periphery of the chip are formed by anisotropic etching using a KOH aqueous solution ( Fig.4 (a)-(e)).
After that, the nitride film on the surface where the oxide film is to be formed is removed, and the portion where the oxide film is not formed is covered with the protective film 14 (see FIG. 4).
(F)). As a material of the protective film 14, a film formed by vapor-depositing a metal resistant to hydrofluoric acid, for example, platinum is suitable. Next, the exposed portion of the single crystal silicon is made porous by the treatment described later (FIG. 4 (g)). The porous silicon layer 102 has a thickness of 10 to 50 μm. When the substrate is heated and oxidized after removing the protective film 14, the porous silicon layer 102 is easily oxidized and the thick oxide layer 10 is formed.
1 is formed.

【0015】図5は、図1の固定電極を形成した下側基
板の加工プロセスである。シリコン基板表面に形成した
窒化膜(Si3N4)210をエッチングマスクとして、K
OH水溶液を使った異方性エッチングによって、固定電
極の周辺部をエッチングする(図5(a)〜(b))。
このエッチング深さ209が、後に中間基板と貼りあわ
せたときに、固定電極と可動電極との間のギャップを決
定する。したがって、固定・可動電極間ギャップの値に
よっては、エッチングが不要な場合があり、逆に、固定
電極部分の周囲を残して固定電極部をエッチングする場
合もある。次いで固定電極部の周囲を熱酸化膜205で
覆う(図5(c))。この場合の酸化膜の役目はエッチ
ングマスクとしてだけなので、その厚さは、約1μmあ
れば十分である。センサチップ周辺に切欠き23を形成
するための溝パターン202を形成した後(図5
(d))、異方性エッチングで切欠き23を形成する
(図5(e))。次に、シリコン基板裏面の窒化膜、お
よび酸化膜205を除去する(図5(f))。このと
き、後に詳述するシリコンの多孔質化処理にさきだっ
て、シリコン基板裏面に弗酸に耐性のある金属、たとえ
ば白金を蒸着した膜(保護膜)203を形成する。次い
で、単結晶シリコンの露出した部分を、後に述べる処理
によって多孔質化する(図5(g))。多孔質化したシ
リコン層204の厚さは、10〜50μmある。保護膜
203を除去した後、基板を加熱して酸化すると、多孔
質シリコン層204は容易に酸化して厚い酸化膜層20
1が形成され、固定電極を持つ下側基板の加工が完了す
る(図5(h))。上側基板も下側基板と同じプロセス
で加工される。
FIG. 5 shows a process of processing the lower substrate on which the fixed electrode of FIG. 1 is formed. Using the nitride film (Si 3 N 4 ) 210 formed on the surface of the silicon substrate as an etching mask, K
The peripheral portion of the fixed electrode is etched by anisotropic etching using an OH aqueous solution (FIGS. 5A and 5B).
This etching depth 209 determines the gap between the fixed electrode and the movable electrode when it is later bonded to the intermediate substrate. Therefore, etching may not be necessary depending on the value of the gap between the fixed and movable electrodes, and conversely, the fixed electrode portion may be etched while leaving the periphery of the fixed electrode portion. Then, the periphery of the fixed electrode portion is covered with a thermal oxide film 205 (FIG. 5C). Since the role of the oxide film in this case is only as an etching mask, it is sufficient that its thickness is about 1 μm. After forming the groove pattern 202 for forming the notch 23 around the sensor chip (see FIG. 5).
(D)), the notch 23 is formed by anisotropic etching (FIG. 5E). Next, the nitride film and the oxide film 205 on the back surface of the silicon substrate are removed (FIG. 5F). At this time, a film (protective film) 203 formed by vapor-depositing a metal having resistance to hydrofluoric acid, for example, platinum, is formed on the back surface of the silicon substrate prior to the porous treatment of silicon, which will be described later in detail. Next, the exposed portion of the single crystal silicon is made porous by the treatment described later (FIG. 5 (g)). The thickness of the porous silicon layer 204 is 10 to 50 μm. When the substrate is heated and oxidized after removing the protective film 203, the porous silicon layer 204 is easily oxidized and the thick oxide layer 20 is removed.
1 is formed, and the processing of the lower substrate having the fixed electrode is completed (FIG. 5 (h)). The upper substrate is processed in the same process as the lower substrate.

【0016】3枚のシリコン基板の接合面には、多孔質
シリコンを酸化した十分に厚い酸化膜層を使う。図6に
示すように、中間基板1とその上下の基板2、2’を正
確に位置決めして重ね合わせ、約1000℃の酸素雰囲
気中で保持すると3枚の基板は拡散接合によって一体化
する。本実施例の第二の特徴である、センサチップの外
周部における基板間の空間的な分離は、それぞれのシリ
コン基板の加工工程において、チップの外周部に相当す
る部分に深さ100μm程度の溝を形成しておくことに
より実現する。すなわちこのような溝を加工した3枚の
基板同士を拡散接合によって貼り合わせた後、図6のA
−A’およびB−B’の線上でダイシングソーによって
切断すると、切断面である端面には、図2および図3に
示したような形状が加工できる。
For the bonding surfaces of the three silicon substrates, a sufficiently thick oxide film layer obtained by oxidizing porous silicon is used. As shown in FIG. 6, when the intermediate substrate 1 and the upper and lower substrates 2 and 2'are accurately positioned and overlapped and held in an oxygen atmosphere at about 1000 ° C., the three substrates are integrated by diffusion bonding. The second feature of this embodiment, that is, the spatial separation between the substrates at the outer peripheral portion of the sensor chip is that a groove having a depth of about 100 μm is formed in the portion corresponding to the outer peripheral portion of the chip in the processing step of each silicon substrate. It is realized by forming. That is, after the three substrates processed with such grooves are bonded by diffusion bonding,
When cut with a dicing saw along the lines -A 'and BB', the end faces, which are cut faces, can be processed into the shapes shown in FIGS.

【0017】以下に、本実施例の第一の特徴である厚い
酸化膜の形成について述べる。通常の熱酸化では、酸化
膜中の酸素原子の拡散速度に制限されて、十分に厚い膜
ができない。しかも、シリコンは酸化することによって
体積が約2.2倍に膨張して、高い残留応力を生じる。
これに対して本実施例では、あらかじめシリコン表層部
を多孔質化しておき、この層を熱酸化することによっ
て、高速に厚い酸化膜を形成する手段を採った。この方
法を採ることによって、体積膨張に起因する酸化膜層の
残留応力の低減も同時に可能になる。
The formation of a thick oxide film, which is the first feature of this embodiment, will be described below. In ordinary thermal oxidation, the diffusion rate of oxygen atoms in the oxide film is limited, and a sufficiently thick film cannot be formed. Moreover, the volume of silicon expands by about 2.2 times due to oxidation, resulting in high residual stress.
On the other hand, in this embodiment, the surface layer of the silicon is made porous in advance, and this layer is thermally oxidized to form a thick oxide film at high speed. By adopting this method, the residual stress of the oxide film layer due to the volume expansion can be reduced at the same time.

【0018】多孔質シリコン層の形成には、陽極化成処
理を施す。図7は陽極化成処理装置の断面を示す図であ
る。HFの50%水溶液41の中で電界を加えながらエ
ッチングすると、シリコン表面には多孔質シリコン層が
形成される。図に示すように、電界のかけかたは、シリ
コン基板42が正になるように、負極側に白金の電極4
3をつなぐ。両極の間には直流電源が接続されている。
正極側のシリコン基板には、その一部に導線を直接、接
続してもよいが、図5(f)に示したように、多孔質化
したい面の裏面に白金を蒸着し、これを介して電界をか
けると、多孔質層の厚さの基板面内分布が均一化すると
いう利点が有る。
The porous silicon layer is formed by anodizing treatment. FIG. 7 is a diagram showing a cross section of the anodizing apparatus. When etching is performed in a 50% HF aqueous solution 41 while applying an electric field, a porous silicon layer is formed on the silicon surface. As shown in the figure, the electric field is applied so that the silicon substrate 42 is positive and the platinum electrode 4 is placed on the negative electrode side.
Connect 3 A DC power supply is connected between both poles.
A conductive wire may be directly connected to a part of the silicon substrate on the positive electrode side. However, as shown in FIG. 5 (f), platinum is vapor-deposited on the back surface of the surface to be made porous, and it is inserted through this. When an electric field is applied by applying the electric field, there is an advantage that the in-plane distribution of the thickness of the porous layer becomes uniform.

【0019】多孔質シリコン層の厚さは処理時間の長短
によって増減できる。数十μmの厚さの多孔質シリコン
の層が数分程度の短時間で得られる。図8に、実験によ
り得られた陽極化成の処理時間と多孔質シリコン層の厚
さの関係を示した。この多孔質シリコン層を熱酸化する
と、多孔質中の酸素の拡散速度が著しいので、厚い酸化
膜を短時間で形成することができる。厚さ10μmの酸
化膜が約10時間の酸化で得られた。さらに多孔質シリ
コンを酸化した膜は単結晶のそれよりも内部応力が小さ
いので、シリコン基板に生じる反りの量を低減すること
ができる。この結果、3枚のシリコン基板を拡散接合す
る工程での接合の歩留まりを向上することができた。
The thickness of the porous silicon layer can be increased or decreased depending on the length of processing time. A layer of porous silicon having a thickness of several tens of μm can be obtained in a short time of about several minutes. FIG. 8 shows the relationship between the anodization treatment time and the thickness of the porous silicon layer obtained by the experiment. When this porous silicon layer is thermally oxidized, the diffusion rate of oxygen in the porous layer is remarkable, so that a thick oxide film can be formed in a short time. An oxide film having a thickness of 10 μm was obtained by oxidation for about 10 hours. Furthermore, since the film obtained by oxidizing the porous silicon has a smaller internal stress than that of the single crystal, the amount of warpage occurring in the silicon substrate can be reduced. As a result, it was possible to improve the bonding yield in the process of diffusion bonding the three silicon substrates.

【0020】上に述べた実施例では、3層のシリコン基
板の接合面のすべてを厚い酸化膜で覆ったが、例えば上
下の固定電極基板の接合表面に十分に厚い酸化膜を形成
して、中間基板の接合表面を通常の薄い酸化膜として
も、本発明の目的を達成できることは自明である。また
本発明の、シリコンチップの外周部端面における基板間
の空間的な分離方法は、多孔質シリコンの酸化物を介し
た直接接合構造だけでなく、通常の熱酸化膜を介した直
接接合構造など、直接接合構造を適用した加速度センサ
一般に適用できることは自明である。以上に述べたよう
に、本発明の実施例によれば、シリコン3層構造の加速
度センサゲージができ、電気的に絶縁された3層間の浮
遊静電容量が極めて小さい構造が得られた。
In the embodiment described above, the bonding surface of the three-layer silicon substrate is entirely covered with a thick oxide film. However, for example, a sufficiently thick oxide film is formed on the bonding surfaces of the upper and lower fixed electrode substrates, It is obvious that the object of the present invention can be achieved even if the bonding surface of the intermediate substrate is a normal thin oxide film. Further, the spatial separation method between the substrates on the outer peripheral end face of the silicon chip of the present invention is not limited to the direct bonding structure via the oxide of porous silicon, but is also a direct bonding structure via a normal thermal oxide film. It is self-evident that it can be generally applied to acceleration sensors to which the direct bonding structure is applied. As described above, according to the embodiment of the present invention, an acceleration sensor gauge having a silicon three-layer structure can be obtained, and a structure in which the floating capacitance between the three electrically insulated layers is extremely small can be obtained.

【0021】なお、このようなセンサ構造を発明したこ
とにより、以下に述べるようなセンサチップの実装構造
が可能になる。すなわち、従来のセンサチップは、図9
(a)に示すように、セラミクス基板の表面と、ガラス
/シリコン/ガラスの3層構造とが平行になるように接
着されていた。それぞれの層から引き出された電極は、
上部のガラス面上に形成したパッドを介して、ボンディ
ングワイヤ310に接続される。これに対して、本発明
の構造では、3層の各基板のすべての表面が導電性を持
っているから配線を直接接続することができ、実装方
法、接続方法の自由度が高い。
By inventing such a sensor structure, a sensor chip mounting structure as described below becomes possible. That is, the conventional sensor chip is shown in FIG.
As shown in (a), the surface of the ceramic substrate and the three-layer structure of glass / silicon / glass were adhered in parallel with each other. The electrodes drawn from each layer are
It is connected to the bonding wire 310 via a pad formed on the upper glass surface. On the other hand, in the structure of the present invention, since all the surfaces of each of the three layers of the substrate have conductivity, the wiring can be directly connected, and the flexibility of the mounting method and the connecting method is high.

【0022】すなわち、図9(b)、(c)に示すよう
に、3層構造をセラミクス基板300と垂直に固定する
ことができる。配線の取り出しは、同図(b)のよう
に、従来のワイヤボンディング法を採用したり、同図
(c)に示すように、セラミクス基板面300にメッキ
された金、あるいはアルミニウム等の金属配線311、
312、313に直接接続することもできる。この場合
に効果的なことは、先に述べたように、チップ外周部に
おいて3層の基板間に空間3、3’が形成されているこ
とである。これによって、3層が電気的に短絡するおそ
れがなくなった。
That is, as shown in FIGS. 9B and 9C, the three-layer structure can be fixed vertically to the ceramic substrate 300. To take out the wiring, a conventional wire bonding method is adopted as shown in FIG. 2B, or metal wiring such as gold or aluminum plated on the ceramics substrate surface 300 as shown in FIG. 3C. 311
It is also possible to connect directly to 312 and 313. In this case, what is effective is that the spaces 3 and 3'are formed between the three layers of substrates in the outer peripheral portion of the chip, as described above. This eliminated the risk of electrical shorting of the three layers.

【0023】上に述べたように、3層構造をセラミクス
基板に垂直に接合することによるもう一つの効果は、温
度変化による熱変形が静電容量間隔に及ぼす影響が、従
来の実装形態に比べて小さいことである。従来の実装形
態では、セラミクス基板とセンサチップのあいだの熱膨
張の差が、センサチップに曲げ変形を誘起したが、図9
(b)、(c)の形態ではこれが回避される。
As described above, another effect of vertically bonding the three-layer structure to the ceramic substrate is that the influence of thermal deformation due to temperature change on the capacitance interval is larger than that of the conventional mounting form. Is small. In the conventional mounting form, the difference in thermal expansion between the ceramic substrate and the sensor chip induced bending deformation in the sensor chip.
This is avoided in the forms of (b) and (c).

【0024】以上に述べた実施例の効果をまとめて以下
に列挙する。 単結晶シリコン基板の3層構造からなるので、材料
の熱膨張率の差によるセンサの温度特性の劣化がない。 シリコン基板表面に形成した均一な膜厚の酸化膜を
介して3層の基板を接合するので、ガラス基板をシリコ
ン基板の間に挟んで接合する方法に比べて、シリコン基
板間の接合部分の厚さを精度よく均一に管理できる。こ
のことは、可動・固定電極間の間隙が正確に加工できる
という効果をもたらす。また、安価な加工プロセスで接
合することができる。 多孔質シリコン層を酸化するので、通常のシリコン
基板表面の熱酸化膜の形成に比べて厚い酸化膜の形成が
可能であり、静電容量型センサの構成に十分な程度まで
接合面の静電容量を低減することができる。 多孔質シリコンの酸化膜は、通常のシリコン基板表
面の熱酸化に比べて短時間に形成され、膜内の残留応力
も小さいので、3層の接合後の変形が小さい。 センサチップの外周部で、導電性のある3層のシリ
コン基板が空間的に分離されるので、塵の付着等による
基板間の短絡のおそれがない。 センサチップをセラミクス基板面に垂直に固定する
ことができるので、ワイヤボンディングが不要になる。
また、熱変形の影響を受けにくくなる。
The effects of the embodiments described above will be listed below. Since the single crystal silicon substrate has a three-layer structure, the temperature characteristics of the sensor are not deteriorated due to the difference in the coefficient of thermal expansion of the materials. Since three layers of substrates are joined through an oxide film having a uniform film thickness formed on the surface of the silicon substrate, the thickness of the joining portion between the silicon substrates is greater than the method of joining by sandwiching the glass substrate between the silicon substrates. Can be accurately and uniformly managed. This brings about the effect that the gap between the movable and fixed electrodes can be processed accurately. In addition, they can be joined by an inexpensive processing process. Since the porous silicon layer is oxidized, it is possible to form a thick oxide film compared to the formation of a thermal oxide film on the surface of a normal silicon substrate. The capacity can be reduced. The porous silicon oxide film is formed in a shorter time than the normal thermal oxidation of the surface of the silicon substrate, and the residual stress in the film is small, so that the deformation after joining the three layers is small. Since the conductive three-layer silicon substrate is spatially separated at the outer peripheral portion of the sensor chip, there is no risk of short circuit between the substrates due to adhesion of dust or the like. Since the sensor chip can be fixed vertically to the surface of the ceramic substrate, wire bonding becomes unnecessary.
Also, it is less likely to be affected by thermal deformation.

【0025】[0025]

【発明の効果】上述のとおり本発明によれば、静電容量
型シリコン加速度センサにおいて、温度特性が良く、電
気的接続、内部封止の信頼性の高いセンサ構造を有する
安価な加速度センサを得ることができる。
As described above, according to the present invention, in the capacitance type silicon acceleration sensor, an inexpensive acceleration sensor having good temperature characteristics and having a highly reliable sensor structure of electrical connection and internal sealing is obtained. be able to.

【図面の簡単な説明】[Brief description of drawings]

【図1】本発明の加速度センサ構造の一実施例を示す断
面図。
FIG. 1 is a sectional view showing an embodiment of an acceleration sensor structure of the present invention.

【図2】本発明の加速度センサ構造の断面の一例を示す
断面図。
FIG. 2 is a cross-sectional view showing an example of a cross section of the acceleration sensor structure of the present invention.

【図3】本発明の加速度センサ構造の断面の別の一例を
示す断面図。
FIG. 3 is a cross-sectional view showing another example of the cross section of the acceleration sensor structure of the present invention.

【図4】加速度センサ構造の中間基板の加工プロセス断
面図。
FIG. 4 is a sectional view of a process of processing an intermediate substrate having an acceleration sensor structure.

【図5】加速度センサ構造の下部固定電極基板の加工プ
ロセス断面図。
FIG. 5 is a sectional view of a process of processing a lower fixed electrode substrate of the acceleration sensor structure.

【図6】3層のシリコン基板を接合してチップ化するプ
ロセスを示す断面図。
FIG. 6 is a cross-sectional view showing a process of joining three layers of silicon substrates to form a chip.

【図7】多孔質シリコン層を形成する陽極化成プロセス
の構成を示す図。
FIG. 7 is a diagram showing a configuration of an anodization process for forming a porous silicon layer.

【図8】多孔質シリコン層の形成に要する時間を示す
図。
FIG. 8 is a diagram showing a time required for forming a porous silicon layer.

【図9】本発明の加速度センサと従来のセンサの実装形
態を示す側面図。
FIG. 9 is a side view showing mounting forms of the acceleration sensor of the present invention and a conventional sensor.

【符号の説明】[Explanation of symbols]

1 可動電極基板(シリコン単結晶基板) 2、2’ 固定電極基板(シリコン単結晶基板) 3、3’ チップ外周部に設けた空間 11 可動電極 12 梁 13、23、23’ 切欠き 14 保護膜 22、22’ 固定電極 31 絶縁材料 41 弗酸水溶液 42 シリコン基板 43 白金電極 44 直流電源 101、201、201’ 厚い酸化膜 102、204 多孔質シリコン層 110、210 窒化シリコン膜 202 溝パターン 203 金属蒸着膜(保護膜) 205 薄い酸化膜 209 エッチング深さ 300 セラミクス基板 311〜313 金属配線 310 ボンディングワイヤ 1 Movable Electrode Substrate (Silicon Single Crystal Substrate) 2, 2'Fixed Electrode Substrate (Silicon Single Crystal Substrate) 3, 3'Space Provided on Outer Edge of Chip 11 Movable Electrode 12 Beams 13, 23, 23 'Notch 14 Protective Film 22, 22 'Fixed electrode 31 Insulating material 41 Hydrofluoric acid aqueous solution 42 Silicon substrate 43 Platinum electrode 44 DC power source 101, 201, 201' Thick oxide film 102, 204 Porous silicon layer 110, 210 Silicon nitride film 202 Groove pattern 203 Metal deposition Film (protective film) 205 Thin oxide film 209 Etching depth 300 Ceramics substrate 311 to 313 Metal wiring 310 Bonding wire

───────────────────────────────────────────────────── フロントページの続き (72)発明者 鈴木 政善 茨城県勝田市大字高場2520番地 株式会社 日立製作所自動車機器事業部内 (72)発明者 林 雅秀 茨城県勝田市大字高場2520番地 株式会社 日立製作所自動車機器事業部内 ─────────────────────────────────────────────────── ─── Continuation of front page (72) Inventor Masayoshi Suzuki 2520 Takaba, Katsuta City, Ibaraki Prefecture, Hitachi Ltd. Automotive Equipment Division, Hitachi, Ltd. (72) Masahide Hayashi 2520, Takaba, Katsuta, Ibaraki Hitachi Ltd. Factory Automotive Equipment Division

Claims (5)

【特許請求の範囲】[Claims] 【請求項1】 加速度によって変位する質量部、および
前記質量部と対向して静電容量を形成する電極部を有す
る静電容量型の加速度センサにおいて、前記加速度によ
って変位する質量部、および前記質量部と対向して静電
容量を形成する電極部が、いずれもシリコン単結晶から
なり、それぞれのシリコン単結晶の接合界面が多孔質シ
リコンを酸化した層からなることを特徴とする加速度セ
ンサ。
1. A capacitance type acceleration sensor having a mass part that is displaced by acceleration, and an electrode part that forms a capacitance facing the mass part, and the mass part that is displaced by the acceleration, and the mass. An acceleration sensor, characterized in that each of the electrode portions facing each other to form a capacitance is made of a silicon single crystal, and a bonding interface of each silicon single crystal is made of a layer obtained by oxidizing porous silicon.
【請求項2】 加速度によって変位する質量部、および
前記質量部と対向して静電容量を形成する電極部を有す
る静電容量型の加速度センサにおいて、前記加速度によ
って変位する質量部、および前記質量部と対向して静電
容量を形成する電極部が、いずれもシリコン単結晶で構
成され、それぞれのシリコン単結晶が、その表面の酸化
物を介して直接接合された構造であり、かつ、前記接合
界面がセンサチップの外周の端面には存在せず、接合さ
れた2部材の外周端面に空隙が形成されていることを特
徴とする加速度センサ。
2. A capacitance type acceleration sensor having a mass part that is displaced by acceleration, and an electrode part that forms a capacitance facing the mass part, and the mass part that is displaced by the acceleration, and the mass. The electrode portion facing the portion to form a capacitance, both are made of silicon single crystal, each silicon single crystal is a structure directly bonded through the oxide of the surface, and, An acceleration sensor characterized in that a bonding interface does not exist on an outer peripheral end surface of a sensor chip, and a void is formed on an outer peripheral end surface of two bonded members.
【請求項3】 加速度によって変位する質量部、および
前記質量部と対向して静電容量を形成する電極部を有す
る静電容量型の加速度センサにおいて、前記加速度によ
って変位する質量部、および前記質量部と対向して静電
容量を形成する電極部が、いずれもシリコン単結晶で構
成され、それぞれのシリコン単結晶がその表面の酸化物
を介して直接接合された構造であり、かつ、前記接合界
面がセンサチップの外周の端面には存在せず、接合され
た2部材の外周端面に空隙が形成され、前記空隙には異
種の材料が充填されていることを特徴とする加速度セン
サ。
3. A capacitance type acceleration sensor having a mass part that is displaced by acceleration, and an electrode part that forms a capacitance facing the mass part, and the mass part that is displaced by the acceleration, and the mass. The electrode portions that face each other and that form a capacitance are each made of a silicon single crystal, and each silicon single crystal is directly bonded via an oxide on the surface thereof, and An acceleration sensor characterized in that an interface does not exist on the outer peripheral end surface of the sensor chip, a void is formed in the outer peripheral end surfaces of the joined two members, and the void is filled with a different material.
【請求項4】 請求項1、2または3記載の加速度セン
サにおいて、前記シリコン単結晶の接合面は、実装する
相手側の基板面に対して垂直に固定されていることを特
徴とする加速度センサ。
4. The acceleration sensor according to claim 1, 2 or 3, wherein the bonding surface of the silicon single crystal is fixed perpendicularly to the surface of a mating substrate. .
【請求項5】 請求項4記載の加速度センサにおいて、
前記シリコン単結晶の積層された各層の外周部端面と、
これを実装する基板面上に形成した金属配線とを、半田
接合、あるいは金属間で直接接合することによって、電
気的に接続したことを特徴とする加速度センサ。
5. The acceleration sensor according to claim 4,
An outer peripheral end face of each layer of the silicon single crystal stacked,
An acceleration sensor characterized in that it is electrically connected to a metal wiring formed on the surface of a board on which it is mounted by soldering or directly joining between metals.
JP5076978A 1993-04-02 1993-04-02 Acceleration sensor Pending JPH06289049A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP5076978A JPH06289049A (en) 1993-04-02 1993-04-02 Acceleration sensor

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP5076978A JPH06289049A (en) 1993-04-02 1993-04-02 Acceleration sensor

Publications (1)

Publication Number Publication Date
JPH06289049A true JPH06289049A (en) 1994-10-18

Family

ID=13620879

Family Applications (1)

Application Number Title Priority Date Filing Date
JP5076978A Pending JPH06289049A (en) 1993-04-02 1993-04-02 Acceleration sensor

Country Status (1)

Country Link
JP (1) JPH06289049A (en)

Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO1995027215A1 (en) * 1994-04-05 1995-10-12 Hitachi, Ltd. Acceleration sensor
JPH0894663A (en) * 1994-02-01 1996-04-12 Ic Sensors Inc Transducer assembly and method for attaching transducer to circuit board
JP2009047650A (en) * 2007-08-22 2009-03-05 Panasonic Electric Works Co Ltd Sensor device and its manufacturing method
JP2010045260A (en) * 2008-08-15 2010-02-25 Shin-Etsu Chemical Co Ltd Substrate joining method and 3-d semiconductor device
JP2015205387A (en) * 2014-04-23 2015-11-19 株式会社デンソー Physical quantity sensor and manufacturing method of the same

Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0894663A (en) * 1994-02-01 1996-04-12 Ic Sensors Inc Transducer assembly and method for attaching transducer to circuit board
WO1995027215A1 (en) * 1994-04-05 1995-10-12 Hitachi, Ltd. Acceleration sensor
JP2009047650A (en) * 2007-08-22 2009-03-05 Panasonic Electric Works Co Ltd Sensor device and its manufacturing method
JP2010045260A (en) * 2008-08-15 2010-02-25 Shin-Etsu Chemical Co Ltd Substrate joining method and 3-d semiconductor device
JP2015205387A (en) * 2014-04-23 2015-11-19 株式会社デンソー Physical quantity sensor and manufacturing method of the same

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