JPH06284551A - Testing circuit of overcurrent protection device - Google Patents

Abstract

PURPOSE:To perform an online test economically. CONSTITUTION:The current of respective phase is fed to analog OR-circuit 11a-11c, and in the case of an operation, the magnitude of the current signals is decided by a microprocessor 6, and whether an abnormality arises or not is decided. In the case of a test, to the analog OR-circuit of the phase to be tested, a testing signal is fed too, and the signal having the larger level than the ones of the other two phases is outputted for the test of the phase to be performed. But, since the current of the other two phases is monitored, an on-line test can be performed.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a test circuit for an overcurrent protection device which enables online testing.

[0002]

2. Description of the Related Art Generally, an overcurrent flows when a power transmission line using a commercial power source or a load becomes abnormal, and particularly when a large amount of electric power is transmitted such as a three-phase alternating current, when such an accident occurs, Since many things are affected, an overcurrent detection device is provided to detect an overcurrent and shut off the electric path. In addition, this device is also obliged to regularly perform an operation test.

FIG. 6 is a block diagram showing a conventional three-phase overcurrent protection device having such a test function. Generally, three-phase AC can protect three phases as long as it has a protection element for any two phases among the R phase, S phase, and T phase.
The overcurrent protection device 1 of FIG. 6 is also based on this idea, and the current transformer 51 is inserted in the R phase and the T phase of the bus bar 50, and the bus bar 5 is inserted.
A current detection signal corresponding to the current flowing through 0 is obtained.

The current detection signal detected by the current transformer 51 is level-converted by the current transformer 2 in the overcurrent protection device 1 and supplied to the current-sensitive protection input circuit 3. Where the current transformer 51
A circuit including the current transformer 2 is defined as a current detection unit that detects the current of the bus 50. The current detection signals of the respective phases detected here are alternately selected by the multiplexer 4 having a sample hold function, supplied to the A / D converter 5, converted into a digital signal, and supplied to the microprocessor 6.

When the supplied signal is larger than the value set by the setting circuit 15, the microprocessor 6 operates the relay 7 to set the circuit breaker control circuit 53 to the power supply lines BP and B.
It is connected between N to cut off the load. Note that the illustration of the relay coil is omitted in the figure.

When performing a test with this device, a pseudo overcurrent flows by operating the test switch 17 to supply a test signal from the internal power supply 16 to the test input terminal of the overcurrent protection input circuit 3. Raise a condition. As a result, the microprocessor 6 energizes the relay 7 when an input signal larger than the value set by the setting circuit 15 is supplied, so that the control circuit 53 of the circuit breaker is energized and a load (not shown) is applied to the bus bar. Cut off from.

However, this circuit cannot be tested online because the load is cut off by testing. Therefore, a device having an online test function shown in FIG. 7 has been proposed. This is provided with two sets of the overcurrent protection input circuit of FIG. 6 for the A system and the B system, and the selection command device 40 alternately turns on the test switch 18.

If two relays, one for the A system and the other for the B system, are connected in series, only one will be turned on during the test, so the load will not be interrupted, and the abnormal current will cause the A system to operate during operation.
Since both B systems operate, both relays 7 operate and cut off the load. Further, the operating time detection counter 41 allows the characteristics of the device to be tested to be known online.

[0009]

However, such a conventional device has a dual overcurrent protection input circuit, but it is only for testing. Does not contribute to improving reliability,
In the end, there was a problem that reliability was lowered only in the complicated part and economic efficiency was deteriorated.

The present invention has been made in view of the above circumstances, and provides an apparatus for conducting an online test with improved economy and reliability.

[0011]

In order to solve such a problem, a first invention is to provide a test signal generating circuit for generating a test signal at the time of a test and a three-phase alternating current R phase, S phase, and T phase. Each phase is provided with a current detection means for generating a current detection signal corresponding to the current value flowing through each phase, and an analog OR circuit for analog-adding the test signal to the current detection signal and outputting the higher level signal. It is a thing.

A second invention is a test signal generating circuit for generating a test signal during a test and a current detection signal corresponding to a current value flowing through any two phases of a three-phase AC R phase, S phase and T phase. With a current detecting means for generating a current and an analog OR circuit for individually analog-adding the test signals to the respective current detecting signals and outputting the higher level signal in the phase in which the current detecting means is provided. Is.

[0013]

In the first aspect of the invention, the current of each phase is supplied to the analog OR circuit, and during operation, the magnitude of the signal is determined by the microprocessor to determine whether or not there is an abnormality. During the test, the test signal is supplied to the other input terminal of the analog OR circuit of the phase to be tested, and the higher level signal of the current detection signal and the test signal is selected and output. Done. Since the currents of the other two phases are monitored, the bus currents can be monitored even during the test, and the online test can be performed.

In the second invention, the currents of two phases are supplied to the analog OR circuit, and during operation, an abnormality is detected as in the first invention. During the test, the analog OR circuit output signal waveform that supplied the test signal is monitored, and if the value is abnormal, the microprocessor interrupts the test and returns to the operating state,
It is judged whether or not it is abnormal.

[0015]

DESCRIPTION OF THE PREFERRED EMBODIMENTS FIG. 1 is a block diagram showing an embodiment of the present invention, in which the same parts as those in FIGS. 6 and 7 are designated by the same symbols and the description thereof is omitted. The output of the current transformer 51a inserted in the bus bar accurately detects the current flowing in the bus bar 50 based on the detection signal and supplies it to the current transformer 2 via the transducer 52 for generating a current value signal. I have to.
Further, although two current transformers 51a and 51b are used as the busbars, three current transformers 2a, 2b and 2C are provided inside the overcurrent detection device.
It is used individually to obtain currents of all three-phase alternating current phases. Here, the current transformers 51a and 51b and the current transformers 2a to 2
c, the transducer 52 is defined as a current detecting means.
Further, the output signals of the current transformers 2a to 2c are defined as current detection signals.

The signal output from the current transformer 2 is individually supplied to the analog OR circuits 11a to 11c, and the output thereof is passed through the buffer circuits 20a, 20b and 20c so that the current detection signal level during operation becomes the same. And is supplied to the multiplexer 4.

The other terminals of the analog OR circuits 11a to 11c are supplied with the test signal from the test signal generating circuit 12 generated by the control of the microprocessor 6 during the test. Since the analog OR circuits 11a to 11c are adapted to send out the signal of the larger level of the current detection signal and the test signal supplied to the input terminals, the operation shown in FIGS. 2 to 4 is performed.

FIG. 2 shows the operation when the test is not performed, that is, during normal operation. Although not shown in this case, the signal supplied from the test signal generating circuit 12 has the same potential as the negative power supply. , -15V shown in (b) in this example
Is giving the voltage of. In this way, the signal shown in (a) generated from the current transformers 2a to 2c is output as it is as shown in (d).

This signal is transmitted from the buffer circuits 20a to 20
It is supplied to the microprocessor 6 via the c, the multiplexer 4, and the A / D converter 5. The microprocessor 6 compares the level of the input signal with the level of the signal supplied from the setting circuit 15. During normal operation, the level of the signal supplied from the setting circuit 15 is supplied from the A / D converter 5. It is set to be sufficiently higher than the signal level. Therefore, normally, the microprocessor 6 does not send an output signal and the control circuit 53 of the circuit breaker does not operate, so that the load is not cut off.

FIG. 3 shows the operation at the time of testing. In this case, by controlling the changeover switch 12a in the test signal generating circuit 12 by the signal from the microprocessor 6, the analog OR circuit 11 of each phase is controlled. Input test signals sequentially. The test signal is generated by the D / A conversion circuit 12b according to an instruction from the microprocessor 6.

The test signal generated at this time is determined so as to have a value about three times the set value generated by the setting circuit 15 at the input end of the microprocessor 6, as shown in FIG.
It is output as the direct current shown in (b). Since this is sufficiently larger than the signals supplied from the current transformers 2a to 2c shown in FIG. 3A, the larger signal from the analog OR circuit 11, that is, the signal supplied from the test signal generation circuit 12 is generated. It is output as shown in FIG.

At this time, the microprocessor 6 locks on the phase to which the test signal is input. Here, the term “lock” refers to one of the R-phase locking relay 8a, the S-phase locking relay 8b, and the T-phase locking relay 8c that outputs a microprocessor.
This is the process of opening the contact corresponding to the phase to which the test signal is supplied.

With this configuration, the microprocessor 6 energizes one of the R-phase operation relay 7a, the S-phase operation relay 7b, and the T-phase operation relay 7c for the phase to which the test signal is supplied. The energized relay operation information is taken into the microprocessor 6 via the operation detection circuit 9 and its operation time is measured. Then, the measurement result is supplied to the external controller 14 via the data transmission interface 10, and the test data 21 is output in, for example, a form.

At this time, the operating relay 7 of the tested phase is energized and turned on, and the locking relay 8 of that phase is also energized, but since the locking relay 8 is off and locked, the circuit breaker control is performed. Circuit 53 is not energized and the load is not cut off. Therefore, a circuit test can be performed while power is supplied to the load, and an online test can be performed.

FIG. 4 is a diagram for explaining the state when an abnormality occurs in the load during the test. At this time, the current transformer 2 outputs a very large value of the current detection signal. It As described above, the test signal level output from the test signal generating circuit 12 is set so that the signal level at the input end of the microprocessor 6 in the normal state is about three times higher than the output level of the setting circuit 15. ,
When an abnormality occurs, a very large current flows through the bus 50, so that the current transformer 2 outputs a current detection signal having a value larger than the test signal supplied to the analog OR circuit 11.

Therefore, when the load side becomes abnormal during the test, the current transformer 2 supplies a signal of a large level shown in FIG. 4A, and the signal output from the analog OR circuit 11 is shown in FIG. The signal shown in d) is output. That is, when the signal supplied from the test signal generation circuit 12 is larger than the current detection signal output from the current transformer 2, the signal supplied from the test signal generation circuit 12 is output and the current transformer 2 outputs the signal. When the supplied signal is larger, that signal is output. Therefore, as shown in (d), it has a waveform in which alternating current is superimposed on direct current.

Since the microprocessor 6 is performing the time sharing operation, the signal supplied from the A / D converter 5 is sampled in a time division manner and taken into the inside thereof. Therefore, even during the test, when an abnormal current flows, the signal output from the analog OR circuit 11 becomes larger than the signal generated by the test signal, so that it can be detected that the load is abnormal. it can.

Although an abnormality can be detected by this method, the load cutoff timing of the overcurrent protection device is determined by the relationship between the current value flowing through the load and the duration of the current value. For this reason, it is necessary to accurately detect the load current value and determine the load cutoff timing based on the duration of the load current value.

Therefore, the transducer 52 is replaced by the current transformer 5
1a and current transformer 2a are inserted, the electric current which flows there is detected, and the detected signal is input to transducer input circuit 1
It is input to the multiplexer 4 via 3. After this signal is selected by the multiplexer 4, it is A / D converted, supplied to the microprocessor 6, and compared with the signal supplied from any of the buffer circuits 20a, 20b, 20c. As a result, the microprocessor 6 can know the accurate current value from the calculation result of how many times the detection signal of each phase is the current value detection signal, and from the current value and the signal continuation time, the microprocessor 6 Determines whether it is time to cut off the load.

If there is an abnormality in the three-phase alternating current, one of the three phases
The current of one phase becomes abnormal. Therefore, even if one phase is under test, current monitoring is always performed on the other two phases, and if there is an abnormality, the abnormality can be detected in either of the two phases. Therefore, if the current states of all three phases are detected as shown in Fig. 1, one phase is under test, and even if you do not know the exact state, the load from the other two phases Can detect abnormalities. Also, because the load current is accurately measured using the transducer, it is not necessary to remove this device and test at a location with an accurate current source when performing a test, and an accurate test can be performed online quickly. You can do it.

The above is an example of monitoring the current for three phases, but a test close to this can be performed even for two phases. FIG. 5 is a block diagram showing an example in which current monitoring is performed for two phases. As described above, in three-phase alternating current, when the current for two phases is monitored during an abnormality, a load abnormality can be detected. In this example, the R-phase and T-phase currents of the three-phase alternating current are monitored.

When the load is abnormal, the microprocessor 6 detects it and finally activates the control circuit 53 of the circuit breaker to cut off the load. Test signal generator 1 during testing
This test can be done on-line since the R-phase and the T-phase are alternately tested from 2, but one phase is being tested while the other phase is monitoring the condition of the busbar.

By the way, when an abnormality occurs in a three-phase alternating current, an abnormal current always flows in two of the three phases. Therefore, it is sufficient to monitor only any two phases during operation, but at the time of a test. Since only one phase is being monitored, it suffices if an abnormal current flows in the monitored phase, but an abnormal current does not flow in the monitored phase and an abnormal current flows in the other two phases. The state occurs with a probability of 1/3.

However, since this device uses the analog OR circuits 11a and 11c and the microprocessor 6 takes in the input signal while sampling it in a time division manner, as described above, during the test, the bus signal of the bus bar is used. Only one phase is monitoring the state, and even if no abnormal current flows in that phase, abnormality can be detected without any trouble.

That is, when an abnormal current flows during the test, the output waveform of the analog OR circuit 11a or 11c is as shown in FIG.
As shown in (d). That is, the waveform has both a direct current component corresponding to the test current and an alternating current component corresponding to the abnormal current. For this reason, the microprocessor can know that an abnormal state has occurred because a signal whose AC component is larger than the level of the test signal is input by capturing the waveform.

However, the overcurrent protection device is obliged to determine the cutoff timing based on the correlation between the value of the current flowing through the load and the time during which the current flows as a reference for cutting off the load. Even if it can be detected, there is a problem in immediately cutting off the load.

Therefore, in this apparatus, when the microprocessor 6 detects the abnormal state shown in FIG. 4D, the microprocessor 6 stops the generation of the test signal and returns to the operating state. As a result, the two-phase currents are detected and the test current is not superimposed, so that the current value can be accurately determined. Note that the signal detected by the transducer 52 is used for accurate determination of the current value, as in the case of FIG. Needless to say, if a short circuit occurs in the electric path of the bus during the test, an extremely large current flows, and in that case, the load must be cut off without considering the current value and the duration.

In both cases of FIG. 1 and FIG. 5, the test result is output to the outside through the data transmission interface 10. On the other hand, it is obligatory to periodically test and keep a record of the overcurrent protection device. For this reason,
If the result of the test is output to the outside and is managed, it means that this record is automatically recorded and the management becomes easy.

[0039]

As described above, according to the first aspect of the present invention, the analog OR circuit superimposes the supervisory signal and the test signal and outputs the larger one, and three phases are provided. Since it is possible to detect more than the load in the other two phases even during testing, it is possible to perform online testing without the duplication that was required in the past, the circuit is simplified and the number of parts is small. Therefore, there is an effect that economic efficiency and reliability are improved.

In the second invention, the current monitoring is performed in two phases in the first invention, and when an abnormality is detected during the test, the test is stopped and the operation state is returned to. Therefore, the current monitoring for three phases is performed. The structure is simpler than that of the conventional one, and the economy and reliability are further improved.

[Brief description of drawings]

FIG. 1 is a block diagram showing the configuration of an embodiment of the present invention.

FIG. 2 is a diagram illustrating an operation of an analog OR circuit in a normal state.

FIG. 3 is a diagram illustrating the operation of an analog OR circuit during a test under normal conditions.

FIG. 4 is a diagram illustrating the operation of the analog OR circuit when a load abnormality occurs during the test.

FIG. 5 is a diagram showing a configuration of another embodiment.

FIG. 6 is a block diagram showing an example of a configuration of a conventional device.

FIG. 7 is a block diagram showing another example of a conventional device.

[Explanation of symbols]

 1 Overcurrent Protection Device 2 Current Transformer 3 Overcurrent Protection Input Circuit 4 Multiplexer 5 A / D Converter 6 Microprocessor 7, 8 Relay 9 Operation Detection Circuit 10 Data Transmission Interface 12 Test Signal Generation Circuit 12a Changeover Switch 13 Transducer Input Circuit 14 Controller 15 Setting Circuit 16 Internal Power Supply 17, 18 Test Switch 20a, 20b, 20c Buffer Circuit 21 Test Data 40 Selection Command Device 41 Operating Time Detection Counter 50 Bus Bar 51 Current Transformer 52 Transducer 53 Circuit Breaker Control Circuit

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[Procedure amendment]

[Submission date] November 24, 1993

[Procedure Amendment 1]

[Document name to be amended] Statement

[Correction target item name] 0028

[Correction method] Change

[Correction content]

If there is an abnormality in the three-phase alternating current, one of the three phases
The current of one phase becomes abnormal. Therefore, one phase
The other two phases are always current monitored even during the test.
If there is an abnormality, it will be abnormal in one of the two phases.
Can be detected. Therefore, as shown in Fig. 1, the voltage of all three phases is
If a flow condition is detected, one phase is
Even if you do not know the exact state, it is negative from the state of the other two phases.
A load abnormality can be detected.

[Procedure Amendment 2]

[Document name to be amended] Statement

[Name of item to be corrected] 0029

[Correction method] Change

[Correction content]

Therefore, in this device, the abnormal state shown in FIG.
When the microprocessor 6 detects
Processor 6 stops test signal generation
I'm trying to bring it back. By this, the current is detected in two phases
Since the test current is not superimposed, the current value is
Can be accurately determined. It should be noted that during the test
When a fault occurs, an extremely large current flows, so
If it is necessary to cut off the load without considering the duration,
Needless to say.

[Procedure 3]

[Document name to be amended] Statement

[Name of item to be corrected] 0030

[Correction method] Change

[Correction content]

Transducer 52 and current transformer 51a
It is inserted between the current transformers 2a, the current flowing therethrough is detected, and
The signal detected by the transducer input circuit 13
Input to the multiplexer 4. This signal is multi
After being selected by the Plexer 4, it is A / D converted and
The buffer circuit 20a is supplied to the microprocessor 6,
20b, 20c, compare with the signal supplied from either
To be done. As a result, in the microprocessor 6, the current transformer 2
And the buffer circuits 20a, 20b, 20c operate normally.
You can determine whether or not you are making. Therefore, Honetsu
For electric appliances, all parts can be tested online.
You can

[Procedure amendment 4]

[Document name to be corrected] Drawing

[Name of item to be corrected] Figure 5

[Correction method] Change

[Correction content]

[Figure 5]

[Procedure Amendment 5]

[Document name to be corrected] Drawing

[Name of item to be corrected] Figure 6

[Correction method] Change

[Correction content]

[Figure 6]

Claims (2)

[Claims] 1. A test circuit of an overcurrent protection device for performing an operation test of an overcurrent protection device for protecting a power source and a load by detecting an overcurrent flowing in a three-phase alternating current circuit when the overcurrent is detected. A test signal generation circuit that generates a test signal during a test, a current detection unit that generates a current detection signal corresponding to a current value flowing in each phase of the three-phase alternating current, and an analog addition of the test signal to the current detection signal. A test circuit for an overcurrent protection device, characterized in that an analog OR circuit that outputs a higher level signal is provided for each phase. 2. A test circuit of an overcurrent protection device for performing an operation test of an overcurrent protection device for protecting a power source and a load by detecting an overcurrent flowing in a three-phase alternating current circuit when the overcurrent is detected. A test signal generation circuit that generates a test signal during a test, a current detection unit that generates a current detection signal corresponding to a current value flowing in any two phases of the three-phase alternating current, and for each of the current detection signals 2. A test circuit for an overcurrent protection device, comprising an analog OR circuit for individually adding the test signals and outputting a higher level signal in a phase in which the current detection means is provided.