JPH06283866A - Multilayer circuit board and manufacture thereof - Google Patents

Multilayer circuit board and manufacture thereof

Info

Publication number
JPH06283866A
JPH06283866A JP5072215A JP7221593A JPH06283866A JP H06283866 A JPH06283866 A JP H06283866A JP 5072215 A JP5072215 A JP 5072215A JP 7221593 A JP7221593 A JP 7221593A JP H06283866 A JPH06283866 A JP H06283866A
Authority
JP
Japan
Prior art keywords
polyimide resin
resin layer
linear expansion
circuit board
layer
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP5072215A
Other languages
Japanese (ja)
Inventor
Toshihiko Omote
利彦 表
Shu Mochizuki
周 望月
Kazumi Azuma
一美 東
Shunichi Hayashi
林  俊一
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Nitto Denko Corp
Original Assignee
Nitto Denko Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Nitto Denko Corp filed Critical Nitto Denko Corp
Priority to JP5072215A priority Critical patent/JPH06283866A/en
Publication of JPH06283866A publication Critical patent/JPH06283866A/en
Pending legal-status Critical Current

Links

Abstract

PURPOSE:To provide a multilayer circuit board formed substantially of a copper foil and a polyimide resin layer and having excellent chemical resistance, curling resistance and adhesive and a method for manufacturing the same, and to obtain the board adapted for connection reliability and high density mounting by facilitating its connection. CONSTITUTION:One-side boards in each of which a copper circuit 1' is formed on one side surface of a low linear expansion polyimide resin layer 2 and the other surface is etched or charged are adhered and laminated through thermoplastic polyimide resin layers 3 in a multilayer structure. Through holes are provided at the layer 2, a conductive passage in which metal 4 is filled is formed, and further bumped metal protrusions 5 are formed to enhance electric connection reliability.

Description

【発明の詳細な説明】Detailed Description of the Invention

【0001】[0001]

【産業上の利用分野】本発明は多層回路基板およびその
製造方法に関する。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a multilayer circuit board and a method for manufacturing the same.

【0002】[0002]

【従来の技術】近年、電子機器が軽量化や薄型化、小型
化するのに伴い、回路基板も薄型化や高密度化する必要
がある。一般に回路基板としては銅箔とポリイミド樹脂
層とを接着剤を介するか、もしくは介さずに積層した3
層タイプもしくは2層タイプの基板が用いられている
が、接着剤の特性に左右されない2層タイプの基板が多
く提案されている。さらに高密度化や高性能化のために
単層基板から多層基板への開発要求が高まっており、こ
れに応え種々の構造や製法も提案されている。
2. Description of the Related Art In recent years, as electronic devices have become lighter, thinner, and smaller, it is necessary to make circuit boards thinner and more dense. In general, as a circuit board, a copper foil and a polyimide resin layer are laminated with or without an adhesive.
Although a layer type or a two layer type substrate is used, many two layer type substrates which are not affected by the characteristics of the adhesive have been proposed. Further, there is an increasing demand for development from a single-layer substrate to a multi-layer substrate for higher density and higher performance, and various structures and manufacturing methods have been proposed in response to this.

【0003】このような多層回路基板を得る方法として
は、例えば絶縁性基板として熱可塑性ポリイミド樹脂層
を用いて加熱圧着し、多層構造とする方法が考えられる
が、この方法では用いる熱可塑性ポリイミド樹脂は、通
常、絶縁性基板に用いられている熱硬化性ポリイミド樹
脂と比べて、耐熱性や耐薬品性、寸法安定性に劣るの
で、実用上問題がある。また、熱可塑性ポリイミド樹脂
は、一般にその線膨張係数が銅箔の線膨張係数の約2〜
4倍もあり、銅箔に配線回路をパターニングした際に基
板がカールする恐れがある。
As a method for obtaining such a multilayer circuit board, for example, a method in which a thermoplastic polyimide resin layer is used as an insulating substrate and thermocompression bonding is applied to form a multilayer structure, the thermoplastic polyimide resin used in this method is used. Is inferior in heat resistance, chemical resistance, and dimensional stability to a thermosetting polyimide resin that is usually used for an insulating substrate, and thus has a practical problem. Further, the thermoplastic polyimide resin generally has a linear expansion coefficient of about 2 to about the linear expansion coefficient of the copper foil.
There are four times as many, and there is a risk that the substrate will curl when the wiring circuit is patterned on the copper foil.

【0004】一方、上記方法に用いる熱可塑性ポリイミ
ド樹脂層に代えて熱硬化性ポリイミド樹脂層を用いて
も、熱硬化性ポリイミド樹脂層自体には接着機能がない
ので、多層構造に積層しがたく、また、機械的な脆さの
ためにクラックを生じるおそれがある。さらに、低線膨
張性ポリイミド樹脂層は実用的な特性(強度)は満足す
るものの一般に被着体への接着力に乏しいという欠点を
有する。
On the other hand, even if a thermosetting polyimide resin layer is used in place of the thermoplastic polyimide resin layer used in the above method, since the thermosetting polyimide resin layer itself does not have an adhesive function, it is difficult to stack it in a multilayer structure. Also, cracks may occur due to mechanical brittleness. Further, although the low linear expansion polyimide resin layer satisfies practical properties (strength), it generally has a drawback that the adhesive force to an adherend is poor.

【0005】[0005]

【発明が解決しようとする課題】本発明は上記従来の問
題に鑑みてなされたものであって、実質的にポリイミド
樹脂層からなる絶縁性樹脂層に銅回路パターンを形成
し、多層に積層してなる回路基板であって、耐薬品性や
耐カール性、接着性に優れた多層回路基板の提供、およ
びその製造方法を提供することを目的とする。
SUMMARY OF THE INVENTION The present invention has been made in view of the above-mentioned problems of the prior art, in which a copper circuit pattern is formed on an insulating resin layer substantially made of a polyimide resin layer and laminated in multiple layers. It is an object of the present invention to provide a multilayer circuit board having excellent chemical resistance, curl resistance, and adhesiveness, and a method for manufacturing the same.

【0006】[0006]

【課題を解決するための手段】そこで、本発明者らは上
記目的を達成するために鋭意検討を重ねた結果、低線膨
張性ポリイミド樹脂層の片面に特定の表面処理を施し、
他面には回路パターンを形成した回路基板を、熱可塑性
ポリイミド樹脂の接着機能を利用して複数枚積層するこ
とによって上記目的を達成した多層回路基板が得られる
ことを見い出し、本発明を完成するに至った。また、こ
のような多層回路基板を製造するにあたって、ポリイミ
ド前駆体を用いることによって極めて接着性に優れるこ
とも見い出した。
The inventors of the present invention have conducted extensive studies to achieve the above object, and as a result, a specific surface treatment is applied to one surface of the low linear expansion polyimide resin layer,
It was found that a multilayer circuit board achieving the above object can be obtained by stacking a plurality of circuit boards having a circuit pattern formed on the other surface by utilizing the adhesive function of a thermoplastic polyimide resin, and completes the present invention. Came to. Further, it has been found that the use of a polyimide precursor has extremely excellent adhesiveness in the production of such a multilayer circuit board.

【0007】即ち、本発明は低線膨張性ポリイミド樹脂
層の片面にエッチング処理または荷電処理が施され、他
面には回路が積層された回路基板を、熱可塑性ポリイミ
ド樹脂層を介して複数枚積層してなる多層回路基板、特
に、回路形成領域内もしくは該領域とその近傍領域の低
線膨張性ポリイミド樹脂層および熱可塑性ポリイミド樹
脂層に、少なくとも一つの貫通孔が厚み方向に形成さ
れ、回路形成領域内に形成された貫通孔には金属物質に
よる導通路およびバンプ状金属突出物が形成され、バン
プ状金属突出物を介して回路基板間の導通がとられてい
る多層回路基板の提供、並びに銅箔上に低線膨張性ポリ
イミド前駆体溶液を塗布、乾燥する工程と、該塗布面に
エッチング処理または荷電処理を施す工程と、不活性ガ
ス雰囲気下で400℃以上の温度にて加熱して前駆体層
をイミド化する工程と、銅箔をパターニングして回路を
形成して回路基板を得る工程と、熱可塑性ポリイミド樹
脂層を介して複数枚の回路基板を加熱圧着する工程とを
含むことを特徴する多層回路基板の製造方法を提供する
ものである。
That is, according to the present invention, a circuit board having a low linear expansion polyimide resin layer on one side of which an etching treatment or a charging treatment is performed and on the other side of which a circuit is laminated is formed with a plurality of circuit boards through a thermoplastic polyimide resin layer. A multilayer circuit board formed by stacking, in particular, at least one through hole is formed in the thickness direction in the low linear expansion polyimide resin layer and the thermoplastic polyimide resin layer in or near the circuit formation region, A through-hole formed in the formation region is provided with a conductive path and a bump-shaped metal protrusion made of a metal substance, and the circuit board is provided with electrical continuity via the bump-shaped metal protrusion, In addition, a step of coating and drying a low linear expansion polyimide precursor solution on a copper foil, a step of subjecting the coated surface to an etching treatment or a charging treatment, and 400 in an inert gas atmosphere. A step of imidizing the precursor layer by heating at the above temperature, a step of forming a circuit by patterning a copper foil to obtain a circuit board, and a plurality of circuit boards through a thermoplastic polyimide resin layer. The present invention provides a method for manufacturing a multi-layer circuit board, which comprises a step of thermocompression bonding.

【0008】本発明の多層回路基板に用いる絶縁性樹脂
層は実質的にポリイミド樹脂層からなるものである。こ
のような絶縁性樹脂層は低線膨張性ポリイミド樹脂層と
熱可塑性ポリイミド樹脂層との積層構造を有するもので
あって、低線膨張性ポリイミド樹脂層の他面に銅回路が
形成されてなる単層の回路基板を複数枚積層して多層構
造とする。本発明にて用いる上記低線膨張性ポリイミド
樹脂は線膨張係数が2.0×10-5cm/cm/℃以下
の値を有するものであって、熱可塑性ポリイミド樹脂は
ガラス転移温度が200℃以上で、しかも390℃にお
ける溶融粘度が109 ポイズ以下の性質を有するものと
定義される。これらのポリイミド樹脂は塗工作業性や各
樹脂層間の接着性を向上させるためにポリイミド前駆体
溶液として塗布工程に供したのち、加熱、脱水閉環して
イミド化することが好ましい。
The insulating resin layer used in the multilayer circuit board of the present invention is substantially composed of a polyimide resin layer. Such an insulating resin layer has a laminated structure of a low linear expansion polyimide resin layer and a thermoplastic polyimide resin layer, and has a copper circuit formed on the other surface of the low linear expansion polyimide resin layer. A plurality of single-layer circuit boards are laminated to form a multilayer structure. The low linear expansion polyimide resin used in the present invention has a linear expansion coefficient of 2.0 × 10 −5 cm / cm / ° C. or less, and the thermoplastic polyimide resin has a glass transition temperature of 200 ° C. As described above, the melt viscosity at 390 ° C. is defined as having a property of 10 9 poise or less. In order to improve the coating workability and the adhesiveness between the resin layers, these polyimide resins are preferably subjected to a coating step as a polyimide precursor solution, and then subjected to heating, dehydration ring closure, and imidization.

【0009】上記低線膨張性ポリイミド樹脂および熱可
塑性ポリイミド樹脂は、上記定義に合致するものであれ
ば特に制限されないが、低線膨張性ポリイミド樹脂とし
てはテトラカルボン酸成分として3,3’,4,4’−
ビフェニルテトラカルボン酸二無水物、ピロメリット酸
二無水物、ビス(3,4−ジカルボキシフェニル)スル
ホン二無水物、2,2’,3,3’−ビフェニルテトラ
カルボン酸二無水物、3,3’,4,4’−ベンゾフェ
ノンテトラカルボン酸二無水物の少なくとも一種を用
い、ジアミン成分としてはp−フェニレンジアミン、
4,4’−ジアミノジフェニルエーテル、m−フェニレ
ンジアミン、3,4’−ジアミノジフェニルエーテル、
3,3’−ジアミノジフェニルエーテル、4,4’−ジ
アミノビフェニルの少なくとも一種を用いて重合反応さ
せたものを用いることが好ましい。
The low linear expansion polyimide resin and the thermoplastic polyimide resin are not particularly limited as long as they meet the above definitions, but the low linear expansion polyimide resin is 3,3 ', 4 as a tetracarboxylic acid component. , 4'-
Biphenyltetracarboxylic dianhydride, pyromellitic dianhydride, bis (3,4-dicarboxyphenyl) sulfone dianhydride, 2,2 ′, 3,3′-biphenyltetracarboxylic dianhydride, 3, At least one of 3 ′, 4,4′-benzophenone tetracarboxylic dianhydride is used, and p-phenylenediamine is used as the diamine component.
4,4'-diaminodiphenyl ether, m-phenylenediamine, 3,4'-diaminodiphenyl ether,
It is preferable to use a polymerized product of at least one of 3,3′-diaminodiphenyl ether and 4,4′-diaminobiphenyl.

【0010】一方、熱可塑性ポリイミド樹脂としてはテ
トラカルボン酸成分としてビス(3,4−ジカルボキシ
フェニル)エーテル二無水物、ビス(3,4−ジカルボ
キシフェニル)スルホン二無水物、ビス(3,4−ジカ
ルボキシフェニル)ヘキサフルオロプロパン二無水物、
3,3’,4,4’−ベンゾフェノンテトラカルボン酸
二無水物、2,2−ビス(3,4−ジカルボキシフェニ
ル)プロパン二無水物、ビス(3,4−ジカルボキシフ
ェニル)ジフルオロメタン二無水物の少なくとも一種を
用い、ジアミン成分としてはビス〔4−(3−アミノフ
ェノキシ)フェニル〕スルホン、ビス〔4−(4−アミ
ノフェノキシ)フェニル〕スルホン、ビス〔4−(4−
アミノフェノキシ)フェニル〕ヘキサフルオロプロパ
ン、3,3’−ジアミノジフェニルスルホン、3,4’
−ジアミノジフェニルスルホン、4,4’−ジアミノジ
フェニルスルホン、ビス〔4−(3−アミノフェノキ
シ)フェニル〕エーテル、ビス〔4−(4−アミノフェ
ノキシ)フェニル〕エーテル、ビス〔4−(3−アミノ
フェノキシ)フェニル〕プロパン、ビス〔4−(4−ア
ミノフェノキシ)フェニル〕プロパン、3,3’−ジア
ミノジフェニルプロパン、3,3’−ジアミノベンゾフ
ェノンの少なくとも一種を用いて重合反応させたものを
用いることが好ましい。重合には有機溶媒としてN−メ
チル−2−ピロリドンや、N,N−ジメチルアセトアミ
ド、N,N−ジメチルホルムアミドなどを用いて上記各
成分を略等モル配合して行なう。
On the other hand, as the thermoplastic polyimide resin, bis (3,4-dicarboxyphenyl) ether dianhydride, bis (3,4-dicarboxyphenyl) sulfone dianhydride and bis (3,3) are used as tetracarboxylic acid components. 4-dicarboxyphenyl) hexafluoropropane dianhydride,
3,3 ′, 4,4′-benzophenone tetracarboxylic dianhydride, 2,2-bis (3,4-dicarboxyphenyl) propane dianhydride, bis (3,4-dicarboxyphenyl) difluoromethane dianhydride At least one of the anhydrides is used, and bis [4- (3-aminophenoxy) phenyl] sulfone, bis [4- (4-aminophenoxy) phenyl] sulfone, bis [4- (4-
Aminophenoxy) phenyl] hexafluoropropane, 3,3′-diaminodiphenyl sulfone, 3,4 ′
-Diaminodiphenyl sulfone, 4,4'-diaminodiphenyl sulfone, bis [4- (3-aminophenoxy) phenyl] ether, bis [4- (4-aminophenoxy) phenyl] ether, bis [4- (3-amino Phenoxy) phenyl] propane, bis [4- (4-aminophenoxy) phenyl] propane, 3,3′-diaminodiphenylpropane, 3,3′-diaminobenzophenone used for polymerization reaction Is preferred. Polymerization is carried out by using N-methyl-2-pyrrolidone, N, N-dimethylacetamide, N, N-dimethylformamide or the like as an organic solvent and mixing the above components in approximately equimolar amounts.

【0011】本発明においては上記のようにして得られ
る低線膨張性ポリイミド前駆体を銅箔上にロールコータ
ーやコンマコーター、ナイフコーター、ドクターブレー
ドなどを用いて塗布乾燥して銅箔/低線膨張性ポリイミ
ド前駆体層の構造を有する片面基板を得る。なお、この
ときの乾燥工程は60〜180℃程度の温度下で行い、
溶剤除去のみを行なうようにしてポリイミド前駆体の脱
水閉環、イミド化が進行しないようにすることが好まし
い。
In the present invention, the low linear expansion polyimide precursor obtained as described above is applied onto a copper foil using a roll coater, a comma coater, a knife coater, a doctor blade, etc. and dried to obtain a copper foil / low wire. A single-sided substrate having the structure of the expandable polyimide precursor layer is obtained. In addition, the drying step at this time is performed at a temperature of about 60 to 180 ° C.,
It is preferable that only removal of the solvent is performed so that dehydration ring closure and imidization of the polyimide precursor do not proceed.

【0012】次いで、このようにして得られた銅箔/低
線膨張性ポリイミド前駆体層の構造を有する片面基板
を、不活性ガス雰囲気下で400℃以上の温度に加熱す
ることによって、ポリイミド前駆体層を脱水、閉環して
イミド化する。加熱には熱風循環式加熱炉、遠赤外線加
熱炉などの装置が用いられる。加熱温度が400℃以下
であると、充分にイミド化が進行せずにポリイミド特有
の特性が充分に発揮できない。また、イミド化時に酸素
が存在すると銅箔表面が酸化されるだけでなく、熱可塑
性ポリイミド樹脂が熱分解を起こす恐れがあり好ましく
ない。通常、酸素濃度は4%以下、好ましくは2%とす
る。
Next, the single-sided substrate having the structure of the copper foil / low linear expansion polyimide precursor layer thus obtained is heated to a temperature of 400 ° C. or higher in an inert gas atmosphere to obtain a polyimide precursor. The body layer is dehydrated, closed, and imidized. For heating, a device such as a hot air circulation type heating furnace or a far infrared heating furnace is used. When the heating temperature is 400 ° C. or lower, imidization does not proceed sufficiently and the characteristics peculiar to polyimide cannot be sufficiently exhibited. Further, if oxygen is present during imidization, not only the copper foil surface is oxidized but also the thermoplastic polyimide resin may be thermally decomposed, which is not preferable. Usually, the oxygen concentration is 4% or less, preferably 2%.

【0013】以上のようにしてイミド化処理を施したの
ち、得られた銅箔/低線膨張性ポリイミド樹脂層の構造
を有する片面基板の銅箔を所望のパターンに回路形成す
る。回路の形成には公知の方法、例えばフォトレジスト
を銅箔上に塗工して回路パターンの露光、現像、ウエッ
トエッチングするという方法などが採用される。
After the imidization treatment as described above, the obtained copper foil / single-sided copper foil having a structure of a low linear expansion polyimide resin layer is formed into a circuit in a desired pattern. A well-known method is used for forming the circuit, for example, a method in which a photoresist is coated on a copper foil and the circuit pattern is exposed, developed, and wet-etched.

【0014】本発明において低線膨張性ポリイミド樹脂
層の片面(回路形成面と反対の面)には、熱可塑性ポリ
イミド樹脂層との接着性を向上させる目的で、エッチン
グ処理や荷電処理などの表面処理が施される。エッチン
グ処理としては具体的にはアルカリ溶液などによるウエ
ットエッチングやスパッタエッチングなどのドライエッ
チングなどが挙げられ、荷電処理としてはプラズマ放電
処理などが挙げられる。なお、このような表面処理を施
す工程は後述する熱可塑性ポリイミド樹脂層を介して多
層化する前であれば特に制限されないので、低線膨張性
ポリイミド前駆体層の形成後や、これを加熱イミド化し
た後、回路パターン形成後のいずれに行ってもよいもの
である。
In the present invention, one surface of the low linear expansion polyimide resin layer (the surface opposite to the circuit forming surface) is subjected to a surface such as an etching treatment or a charging treatment for the purpose of improving the adhesiveness with the thermoplastic polyimide resin layer. Processing is performed. Specific examples of the etching treatment include wet etching with an alkaline solution and dry etching such as sputter etching, and examples of the charging treatment include plasma discharge treatment. Incidentally, the step of applying such a surface treatment is not particularly limited as long as it is before multilayering via a thermoplastic polyimide resin layer described later, after the formation of the low linear expansion polyimide precursor layer, or by heating it. After the formation, the circuit pattern may be formed either.

【0015】このようにして得られる単層の回路基板を
熱可塑性ポリイミド樹脂層を介して複数枚重ね合わせ、
ラミネートロールや熱圧プレスなどを用い、熱可塑性ポ
リイミド樹脂のガラス転移温度より30〜150℃程度
高い温度にて1〜500kg/cm2 の圧力を加えて加
熱圧着し、本発明の多層回路基板を得る。この加熱圧着
の際には熱可塑性ポリイミド樹脂層が、積層される他の
回路基板の低線膨張性ポリイミド樹脂層と隣接するよう
に積層されるが、先の工程で銅箔をエッチング処理して
回路を形成する際に低線膨張性ポリイミド樹脂層の表面
も荒れた状態となるので、熱可塑性樹脂との接着強度が
さらに向上する。この工程での、銅箔およびポリイミド
樹脂層の酸化劣化を防止するために、不活性雰囲気下も
しくは真空中にて圧着を行なうことが好ましく、通常、
酸素濃度を4%以下、特に2%以下に調整する。
A plurality of single-layer circuit boards obtained in this manner are superposed with a thermoplastic polyimide resin layer interposed therebetween,
Using a laminate roll or a hot press, a pressure of 1 to 500 kg / cm 2 is applied at a temperature about 30 to 150 ° C. higher than the glass transition temperature of the thermoplastic polyimide resin, and thermocompression bonding is performed to obtain the multilayer circuit board of the present invention. obtain. At the time of this thermocompression bonding, the thermoplastic polyimide resin layer is laminated so as to be adjacent to the low linear expansion polyimide resin layer of the other circuit board to be laminated, but the copper foil is etched in the previous step. Since the surface of the low linear expansion polyimide resin layer is also roughened when forming the circuit, the adhesive strength with the thermoplastic resin is further improved. In this step, in order to prevent oxidative deterioration of the copper foil and the polyimide resin layer, it is preferable to carry out pressure bonding under an inert atmosphere or in a vacuum.
The oxygen concentration is adjusted to 4% or less, especially 2% or less.

【0016】また、最終的に得られる多層回路基板にお
いて、熱可塑性ポリイミド樹脂層の線膨張係数をa1
熱可塑性ポリイミド樹脂層の合計厚みをt1 、低線膨張
性ポリイミド樹脂層の線膨張係数をa2 、低線膨張性ポ
リイミド樹脂層の合計厚みをt2 とした場合、 a1 ・〔t1 /(t1 +t2 )〕+ a2 ・〔t2 /(t1 +t2 )〕 の値と銅の線膨張係数との差が、1.0×10-5cm/
cm/℃よりも小さい値に設定することによって、熱収
縮などによる回路パターンのズレや銅箔をエッチングし
た後のカールをさらに防ぐことができて好ましい。
In the finally obtained multilayer circuit board, the coefficient of linear expansion of the thermoplastic polyimide resin layer is a 1 ,
When the total thickness of the thermoplastic polyimide resin layer is t 1 , the linear expansion coefficient of the low linear expansion polyimide resin layer is a 2 , and the total thickness of the low linear expansion polyimide resin layer is t 2 , then a 1 [t 1 / (T 1 + t 2 )] + a 2 · [t 2 / (t 1 + t 2 )] and the coefficient of linear expansion of copper is 1.0 × 10 −5 cm /
By setting the value smaller than cm / ° C., it is possible to further prevent the deviation of the circuit pattern due to thermal contraction or the like and the curl after etching the copper foil, which is preferable.

【0017】以下に本発明の多層回路基板およびその製
造方法を図面を用いて説明する。
The multilayer circuit board of the present invention and the method for manufacturing the same will be described below with reference to the drawings.

【0018】図1は本発明の多層回路基板を得る方法を
説明するための各工程の断面図である。
FIG. 1 is a sectional view of each step for explaining a method for obtaining a multilayer circuit board of the present invention.

【0019】本発明ではまず、図1(a)のように銅箔
1上に低線膨張性ポリイミド前駆体溶液を塗布し、これ
を乾燥して低線膨張性ポリイミド前駆体層2’を形成す
る。そののち、これを高温加熱してイミド化し、さらに
図1(b)に示すように、銅箔1を所望の形にして回路
1’を形成する。次いで、回路1’形成面と反対面の低
線膨張性ポリイミド樹脂層2の表面を処理し、図1
(b)のように形成された単層の回路基板を熱可塑性ポ
リイミド樹脂層3を介して複数枚重ね合わせ、加熱圧着
して図1(c)に示される本発明の多層回路基板が得ら
れる。
In the present invention, first, as shown in FIG. 1A, a low linear expansion polyimide precursor solution is applied on a copper foil 1 and dried to form a low linear expansion polyimide precursor layer 2 '. To do. After that, this is heated at a high temperature to be imidized, and as shown in FIG. 1B, the copper foil 1 is formed into a desired shape to form a circuit 1 ′. Then, the surface of the low linear expansion polyimide resin layer 2 opposite to the surface on which the circuit 1'is formed is treated,
A plurality of single-layer circuit boards formed as shown in (b) are stacked via the thermoplastic polyimide resin layer 3 and thermocompression bonded to obtain the multilayer circuit board of the present invention shown in FIG. 1 (c). .

【0020】図2は本発明の多層基板を得る方法を説明
するための他の製造方法の各工程の断面図である。図2
(a)は上記図1(a)と同様であり、次いで、図1
(b)に示すように回路1’を形成したのち、回路1’
形成領域内の低線膨張性ポリイミド樹脂層2に少なくと
も一つの貫通孔を形成し、この貫通孔に金属4による導
通路を形成し、回路1’形成面と反対側の面にバンプ状
金属突出物5を形成する。このように形成された単層の
回路基板の表面を図1と同様に表面処理し、次いで、熱
可塑性ポリイミド樹脂層3を介して複数枚重ね合わせ、
加熱圧着することによって図2(c)に示される本発明
の多層回路基板が得られる。
FIG. 2 is a sectional view of each step of another manufacturing method for explaining the method for obtaining the multilayer substrate of the present invention. Figure 2
1A is the same as FIG. 1A above, and then FIG.
After forming the circuit 1'as shown in (b), the circuit 1 '
At least one through hole is formed in the low linear expansion polyimide resin layer 2 in the formation area, a conduction path is formed by the metal 4 in this through hole, and bump-shaped metal protrusions are formed on the surface opposite to the surface on which the circuit 1'is formed. Object 5 is formed. The surface of the single-layer circuit board formed in this way is surface-treated in the same manner as in FIG. 1, and then a plurality of layers are superposed with the thermoplastic polyimide resin layer 3 interposed therebetween.
By thermocompression bonding, the multilayer circuit board of the present invention shown in FIG. 2 (c) is obtained.

【0021】図2に示すように、貫通孔を設けて金属4
による導通路を電解メッキなどの方法で形成し、さらに
バンプ状金属突出物5を形成することによって、多層構
造に積層した場合の電気的接続、導通が容易に行なえて
好ましいものである。形成する貫通孔の孔径は、基板を
適用する用途によって随時設定できるが、通常1〜20
0μm程度の大きさが好ましい。また、貫通孔の形成方
法としては、アルカリ溶液などによるウエットエッチン
グ法、レーザーやプラズマなどを照射するドライエッチ
ング法、機械的穿孔加工法などが挙げられるが、特に、
加工精度や加工速度、製造コストなどの点からは低線膨
張性の感光性ポリイミド樹脂を用い、450nm以下の
波長の紫外光を用いたフォトリソ加工を行うことが好ま
しい。但し、このときの穿孔加工は一般的にアミド酸の
状態で行い、孔を開けてから加熱イミド化する。
As shown in FIG. 2, metal 4 is provided with through holes.
It is preferable that the conductive path is formed by a method such as electrolytic plating, and the bump-shaped metal protrusions 5 are further formed, so that electrical connection and conduction can be easily performed when laminated in a multilayer structure. The diameter of the through hole to be formed can be set at any time depending on the application of the substrate, but is usually 1 to 20.
A size of about 0 μm is preferable. Examples of the method for forming the through hole include a wet etching method using an alkaline solution or the like, a dry etching method of irradiating laser or plasma, or a mechanical perforating method, but in particular,
From the viewpoints of processing accuracy, processing speed, manufacturing cost, etc., it is preferable to use a low linear expansion photosensitive polyimide resin and perform photolithography using ultraviolet light having a wavelength of 450 nm or less. However, the perforating process at this time is generally performed in the state of an amic acid, and after making a hole, it is imidized by heating.

【0022】充填する金属種としては導通がとれれば特
に制限はなく、例えば金、銀、銅、ニッケル、錫、半
田、クロム、タングステン、ロジウム、インジウムなど
の金属、またはこれらの合金を一種あるいは2種以上積
層して用いることができる。バンプ状金属突出物5は、
例えば電解メッキをさらに成長させ、1〜200μm程
度の高さに形成する。
The metal species to be filled is not particularly limited as long as it can conduct electricity. For example, metals such as gold, silver, copper, nickel, tin, solder, chromium, tungsten, rhodium, indium, etc., or alloys of these or two are used. It is possible to stack and use one or more species. The bump-shaped metal protrusion 5 is
For example, electrolytic plating is further grown to a height of about 1 to 200 μm.

【0023】本発明の多層回路基板の製造方法は上記方
法に限定されるものではなく、例えば鏡面金属シート上
に低線膨張性ポリイミド前駆体溶液を塗布乾燥したの
ち、鏡面金属シートから低線膨張性ポリイミド前駆体層
を剥離し、これを加熱してイミド化、次いで形成した低
線膨張性ポリイミド樹脂層に表面処理を施したのち、金
属導体を蒸着法やイオンプレーティング法、スパッタ法
などによって付着させて片面基板を得ることもできる。
多層化するには前記したように、熱可塑性ポリイミド樹
脂層を介して前記片面基板を積層すればよいのである。
The method for producing a multilayer circuit board of the present invention is not limited to the above-mentioned method. For example, a low linear expansion polyimide precursor solution is applied on a mirror-finished metal sheet and dried, and then a low linear expansion is applied from the mirror-finished metal sheet. Of the flexible polyimide precursor layer, heating it to imidize it, and then applying a surface treatment to the low linear expansion polyimide resin layer that was formed, and then depositing a metal conductor by vapor deposition, ion plating, sputtering, etc. A single-sided substrate can also be obtained by attaching.
As described above, the single-sided substrate may be laminated with the thermoplastic polyimide resin layer interposed therebetween in order to form a multilayer structure.

【0024】図3は図2(c)に示す本発明の多層回路
基板の他の実例を示す断面図である。図3において、貫
通孔が回路1’形成領域だけでなくその近傍にも設けら
れており、近傍の貫通孔には金属による導通路は形成さ
れていない。このように形成された貫通孔は多層構造に
積層した場合、熱可塑性ポリイミド樹脂層3が孔内に溶
融流動して充填され、アンカー効果を発揮して接着強度
の向上に寄与するようになる。
FIG. 3 is a sectional view showing another example of the multilayer circuit board of the present invention shown in FIG. 2 (c). In FIG. 3, a through hole is provided not only in the circuit 1'formation region but also in the vicinity thereof, and a conductive path made of metal is not formed in the through hole in the vicinity. When the through-holes thus formed are laminated in a multi-layer structure, the thermoplastic polyimide resin layer 3 is melted and fluidized and filled in the holes, and the anchor effect is exerted to contribute to the improvement of the adhesive strength.

【0025】図4は図3に示す多層回路基板に半導体素
子6をバンプ電極を介して接続した状態を示す断面図で
ある。
FIG. 4 is a sectional view showing a state in which the semiconductor element 6 is connected to the multilayer circuit board shown in FIG. 3 via bump electrodes.

【0026】図5は本発明の多層回路基板に半導体素子
6を搭載し、ワイヤー9によってボンディングしたの
ち、これを外部基板8上の外部回路7上にバンプ状金属
突出物5によって接続した状態を示す断面図である。本
発明におけるバンプ状金属突出物5は、図2〜図4のよ
うに各貫通孔に対してそれぞれ一つずつ形成する必要は
なく、図5に示すように複数の貫通孔を同時に閉塞して
形成することもできるのである。
FIG. 5 shows a state in which the semiconductor element 6 is mounted on the multilayer circuit board of the present invention, bonded by the wire 9, and then connected to the external circuit 7 on the external substrate 8 by the bump-shaped metal protrusion 5. It is sectional drawing shown. The bump-shaped metal protrusion 5 according to the present invention does not need to be formed one by one for each through hole as shown in FIGS. 2 to 4, but as shown in FIG. It can also be formed.

【0027】[0027]

【実施例】以下に、本発明を実施例にて具体的に説明す
る。
EXAMPLES The present invention will be specifically described below with reference to examples.

【0028】実施例1 3,3’,4,4’−ビフェニルテトラカルボン酸二無
水物と、p−フェニレンジアミンの略等モルを、N−メ
チル−2−ピロリドン中で重合して低線膨張性ポリイミ
ド前駆体溶液を得、これを圧延銅箔(厚み18μm)上
にコンマコーターを用いて均一に流延塗布し、100℃
で乾燥して片面基板を作製した。
Example 1 3,3 ', 4,4'-biphenyltetracarboxylic dianhydride and p-phenylenediamine, approximately equimolar, were polymerized in N-methyl-2-pyrrolidone to have a low linear expansion coefficient. Of a water-soluble polyimide precursor solution is uniformly cast on a rolled copper foil (thickness 18 μm) using a comma coater, and the temperature is 100 ° C.
And dried to prepare a single-sided substrate.

【0029】このようにして作製した片面基板を、窒素
ガス置換によって酸素濃度を1.5%以下にした連続加
熱炉にて450℃に加熱して脱水閉環を行いイミド化処
理を行なった。得られた低線膨張性ポリイミド樹脂層の
厚みは30μmであった。
The single-sided substrate thus produced was heated at 450 ° C. in a continuous heating furnace having an oxygen concentration of 1.5% or less by nitrogen gas substitution to perform dehydration ring closure and imidization treatment. The thickness of the obtained low linear expansion polyimide resin layer was 30 μm.

【0030】次に、得られた低線膨張性ポリイミド樹脂
層の表面(銅箔面と反対面)に、O 2 プラズマを照射
(照射条件:300W、6.5Pa、10分間)して表
面処理を施した。
Next, the obtained low linear expansion polyimide resin
O on the surface of the layer (the surface opposite to the copper foil surface) 2Irradiate plasma
(Irradiation conditions: 300 W, 6.5 Pa, 10 minutes)
Surface treatment was applied.

【0031】この片面基板上の銅箔をエッチング除去し
て熱機械分析を行なったところ、低線膨張性ポリイミド
樹脂層の線膨張係数は1.0×10-5cm/cm/℃、
銅の線膨張係数は1.6×10-5cm/cm/℃であっ
た。
When the copper foil on the one-sided substrate was removed by etching and thermomechanical analysis was performed, the linear expansion coefficient of the low linear expansion polyimide resin layer was 1.0 × 10 −5 cm / cm / ° C.
The coefficient of linear expansion of copper was 1.6 × 10 −5 cm / cm / ° C.

【0032】一方、ガラス板上にビス(3,4−ジカル
ボキシフェニル)エーテル二無水物とビス〔4−(4−
アミノフェノキシ)フェニル〕スルホンの略等モルを、
N−メチル−2−ピロリドン中で重合して得た熱可塑性
ポリイミド前駆体溶液を上記と同様の方法にて流延塗布
し、100℃で乾燥して熱可塑性ポリイミド前駆体フィ
ルムを形成した。形成した熱可塑性ポリイミド前駆体フ
ィルムをガラス板から剥離して200℃で1時間加熱し
てイミド化し、熱可塑性ポリイミド樹脂フィルム(10
μm厚、線膨張係数5.8×10-5cm/cm/℃)を
作製した。
On the other hand, bis (3,4-dicarboxyphenyl) ether dianhydride and bis [4- (4-
Aminophenoxy) phenyl] sulfone approximately equimolar,
A thermoplastic polyimide precursor solution obtained by polymerization in N-methyl-2-pyrrolidone was cast and applied by the same method as above, and dried at 100 ° C. to form a thermoplastic polyimide precursor film. The formed thermoplastic polyimide precursor film is peeled from the glass plate and heated at 200 ° C. for 1 hour for imidization to form a thermoplastic polyimide resin film (10
μm thickness and coefficient of linear expansion of 5.8 × 10 −5 cm / cm / ° C.).

【0033】次いで、上記片面基板上の銅箔をエッチン
グして銅回路を形成したのち、真空熱圧プレスにて熱可
塑性ポリイミド樹脂フィルムを各基板間に介して積層
し、350℃、100kg/cm2 の条件で加熱圧着し
て本発明の多層回路基板(3層構造)を得た。
Then, the copper foil on the one-sided substrate is etched to form a copper circuit, and then a thermoplastic polyimide resin film is laminated between the substrates by a vacuum hot press, and the temperature is 350 ° C. and 100 kg / cm. The multilayer circuit board (three-layer structure) of the present invention was obtained by thermocompression bonding under the conditions of 2 .

【0034】以上のようにして得られた多層回路基板の
引き剥がし強度は1.5kg/cmであり、剥離は銅箔
との界面で起こり、ポリイミド樹脂層間では起こらなか
った。また、400℃、30秒の半田ディップ試験でも
ボイドの発生はなく、耐熱性においても全く問題はなか
った。
The peeling strength of the multilayer circuit board obtained as described above was 1.5 kg / cm, and peeling occurred at the interface with the copper foil and not between the polyimide resin layers. Further, no void was generated even in the solder dip test at 400 ° C. for 30 seconds, and there was no problem in heat resistance.

【0035】実施例2 3,3’,4,4’−ビフェニルテトラカルボン酸二無
水物と、p−フェニレンジアミン/4,4’−ジアミノ
ジフェニルエーテル(60:40モル比)の略等モル
を、N−メチル−2−ピロリドン中で重合して低線膨張
性ポリイミド前駆体溶液を得、これを圧延銅箔(厚み3
5μm)上にコンマコーターを用いて均一に流延塗布
し、100℃で乾燥して片面基板を作製した。
Example 2 Approximately equimolar amounts of 3,3 ', 4,4'-biphenyltetracarboxylic dianhydride and p-phenylenediamine / 4,4'-diaminodiphenyl ether (60:40 molar ratio) were used. Polymerization in N-methyl-2-pyrrolidone gives a low linear expansion polyimide precursor solution, which is rolled copper foil (thickness 3
5 μm) was uniformly cast and coated on it by a comma coater, and dried at 100 ° C. to prepare a single-sided substrate.

【0036】このようにして作製した片面基板を、窒素
ガス置換によって酸素濃度を1.0%以下にした連続加
熱炉にて420℃に加熱して脱水閉環を行いイミド化処
理を行なった。得られた低線膨張性ポリイミド樹脂層の
厚みは20μmであった。
The one-sided substrate thus prepared was heated at 420 ° C. in a continuous heating furnace having an oxygen concentration of 1.0% or less by nitrogen gas substitution to perform dehydration ring closure and imidization treatment. The thickness of the obtained low linear expansion polyimide resin layer was 20 μm.

【0037】次に、得られた低線膨張性ポリイミド樹脂
層の表面(銅箔面と反対面)に、N 2 プラズマを照射
(照射条件:300W、6.5Pa、10分間)して表
面処理を施した。
Next, the obtained low linear expansion polyimide resin
N on the surface of the layer (the surface opposite to the copper foil surface) 2Irradiate plasma
(Irradiation conditions: 300 W, 6.5 Pa, 10 minutes)
Surface treatment was applied.

【0038】この片面基板上の銅箔をエッチング除去し
て熱機械分析を行なったところ、低線膨張性ポリイミド
樹脂層の線膨張係数は1.7×10-5cm/cm/℃、
銅の線膨張係数は1.6×10-5cm/cm/℃であっ
た。
When the copper foil on the single-sided substrate was removed by etching and thermomechanical analysis was performed, the linear expansion coefficient of the low linear expansion polyimide resin layer was 1.7 × 10 -5 cm / cm / ° C.,
The coefficient of linear expansion of copper was 1.6 × 10 −5 cm / cm / ° C.

【0039】一方、ガラス板上にビス(3,4−ジカル
ボキシフェニル)ヘキサフルオロプロパン二無水物とビ
ス〔4−(3−アミノフェノキシ)フェニル〕スルホン
の略等モルを、N−メチル−2−ピロリドン中で重合し
て得た熱可塑性ポリイミド前駆体溶液を上記と同様の方
法にて流延塗布して100℃で乾燥して熱可塑性ポリイ
ミド前駆体フィルムを形成した。形成した熱可塑性ポリ
イミド前駆体フィルムをガラス板から剥離して250℃
で30分間加熱してイミド化し、熱可塑性ポリイミド樹
脂フィルム(5μm厚、線膨張係数5.5×10-5cm
/cm/℃)を作製した。
On the other hand, approximately equimolar amounts of bis (3,4-dicarboxyphenyl) hexafluoropropane dianhydride and bis [4- (3-aminophenoxy) phenyl] sulfone were mixed on a glass plate with N-methyl-2. -The thermoplastic polyimide precursor solution obtained by polymerization in pyrrolidone was cast and coated by the same method as above and dried at 100 ° C to form a thermoplastic polyimide precursor film. Remove the formed thermoplastic polyimide precursor film from the glass plate at 250 ° C
It is then imidized by heating for 30 minutes, and then a thermoplastic polyimide resin film (5 μm thick, coefficient of linear expansion 5.5 × 10 −5 cm
/ Cm / ° C) was prepared.

【0040】次いで、上記片面基板上の銅箔を実施例1
と同様にしてエッチングしたのち、窒素ガス置換して酸
素濃度を1.5%以下にしたラミネートロールにて熱可
塑性ポリイミド樹脂フィルムを各基板間に介して積層
し、370℃、50kg/cm 2 の条件で加熱圧着して
本発明の多層回路基板(5層構造)を得た。
Then, the copper foil on the above-mentioned one-sided substrate was used in Example 1.
After etching in the same manner as above, replace with nitrogen gas and
Can be heated with a laminating roll with an elementary concentration of 1.5% or less
Laminate a plastic polyimide resin film between each substrate
370 ℃, 50kg / cm 2By heating and pressure bonding under the conditions
A multilayer circuit board (5-layer structure) of the present invention was obtained.

【0041】以上のようにして得られた多層回路基板の
引き剥がし強度は2.4kg/cmであり、剥離は銅箔
との界面で起こり、ポリイミド樹脂層間では起こらなか
った。また、400℃、30秒の半田ディップ試験でも
ボイドの発生はなく、耐熱性においても全く問題はなか
った。
The peeling strength of the multilayer circuit board obtained as described above was 2.4 kg / cm, and the peeling occurred at the interface with the copper foil and not between the polyimide resin layers. Further, no void was generated even in the solder dip test at 400 ° C. for 30 seconds, and there was no problem in heat resistance.

【0042】比較例1 低線膨張性ポリイミド樹脂層の表面を処理しなかった以
外は実施例1と同様の方法にて多層回路基板を作製し
た。
Comparative Example 1 A multilayer circuit board was produced in the same manner as in Example 1 except that the surface of the low linear expansion polyimide resin layer was not treated.

【0043】得られた多層回路基板における二種類のポ
リイミド樹脂層間の接着力は100g/cm以下であ
り、プレス後、積層界面の一部で剥離現象が観察され
た。
The adhesive force between the two types of polyimide resin layers in the obtained multilayer circuit board was 100 g / cm or less, and a peeling phenomenon was observed at a part of the laminated interface after pressing.

【0044】[0044]

【発明の効果】本発明の多層回路基板は低線膨張性ポリ
イミド樹脂層における回路形成面と反対面に特定の表面
処理を施し、熱可塑性ポリイミド樹脂層を介して多層構
造に積層しているので、各ポリイミド樹脂層間の界面接
着力が高く剥離現象が見られないものである。また、絶
縁性基板を実質的にポリイミド樹脂から形成しているの
で、耐熱性や耐薬品性、耐カール性に優れるという効果
を有するものであり、近年の電子機器の高密度化や高性
能化に充分に耐え得るものである。
EFFECT OF THE INVENTION Since the multilayer circuit board of the present invention is subjected to a specific surface treatment on the surface opposite to the circuit-forming surface of the low linear expansion polyimide resin layer, it is laminated in a multilayer structure through the thermoplastic polyimide resin layer. The interfacial adhesive strength between the respective polyimide resin layers is high and no peeling phenomenon is observed. In addition, since the insulating substrate is substantially formed of polyimide resin, it has the effect of being excellent in heat resistance, chemical resistance, and curl resistance. It can withstand.

【0045】また、ポリイミド樹脂層にバンプ状金属突
出物および導通路を有する貫通孔を形成して基板の厚み
方向に導通させることによって、半導体素子との接続は
バンプを介して行なえるので接続が容易であると共に、
接続信頼性や実装密度が向上する。また、本発明の多層
回路基板は多層化する前に、各基板ごとに良不良の検査
を行なうことができるので、製造時の歩留り向上が望め
るものである。
Further, by forming a bump-shaped metal protrusion and a through hole having a conduction path in the polyimide resin layer to conduct electricity in the thickness direction of the substrate, the connection with the semiconductor element can be made via the bump, so that the connection can be established. Easy and
Connection reliability and packaging density are improved. Further, since the multilayer circuit board of the present invention can be inspected for good or bad for each board before being multilayered, it is expected to improve the yield in manufacturing.

【図面の簡単な説明】[Brief description of drawings]

【図1】 本発明の多層回路基板を得る方法を説明する
ための各工程の断面図である。
FIG. 1 is a sectional view of each step for explaining a method for obtaining a multilayer circuit board according to the present invention.

【図2】 本発明の多層回路基板を得る方法を説明する
ための他の製造方法の各工程の断面図である。
FIG. 2 is a cross-sectional view of each step of another manufacturing method for explaining the method for obtaining the multilayer circuit board of the present invention.

【図3】 図2(c)に示す本発明の多層回路基板の他
の実例を示す断面図である。
FIG. 3 is a sectional view showing another example of the multilayer circuit board of the present invention shown in FIG. 2 (c).

【図4】 図3に示す多層回路基板に半導体素子をバン
プ電極を介して接続した状態を示す断面図である。
4 is a cross-sectional view showing a state in which semiconductor elements are connected to the multilayer circuit board shown in FIG. 3 via bump electrodes.

【図5】 半導体素子を搭載した本発明の多層回路基板
を外部基板上に実装した状態を示す断面図である。
FIG. 5 is a cross-sectional view showing a state in which the multilayer circuit board of the present invention on which a semiconductor element is mounted is mounted on an external board.

【符号の説明】[Explanation of symbols]

1 銅箔 1’ 回路 2 低線膨張性ポリイミド樹脂層 2’ 低線膨張性ポリイミド前駆体層 3 熱可塑性ポリイミド樹脂層 4 金属 5 バンプ状金属突出物 DESCRIPTION OF SYMBOLS 1 Copper foil 1'Circuit 2 Low linear expansion polyimide resin layer 2'Low linear expansion polyimide precursor layer 3 Thermoplastic polyimide resin layer 4 Metal 5 Bump-shaped metal protrusion

───────────────────────────────────────────────────── フロントページの続き (72)発明者 林 俊一 大阪府茨木市下穂積1丁目1番2号 日東 電工株式会社内 ─────────────────────────────────────────────────── ─── Continued Front Page (72) Inventor Shunichi Hayashi 1-2-1 Shimohozumi, Ibaraki City, Osaka Prefecture Nitto Denko Corporation

Claims (4)

【特許請求の範囲】[Claims] 【請求項1】 低線膨張性ポリイミド樹脂層の片面にエ
ッチング処理または荷電処理が施され、他面には回路が
積層された回路基板を、熱可塑性ポリイミド樹脂層を介
して複数枚積層してなる多層回路基板。
1. A circuit board having a low linear expansion polyimide resin layer on one side of which an etching treatment or a charging treatment is performed and on the other side of which a circuit is laminated is laminated with a thermoplastic polyimide resin layer interposed therebetween. Multi-layer circuit board.
【請求項2】 熱可塑性ポリイミド樹脂層の線膨張係数
をa1 、熱可塑性ポリイミド樹脂層の合計厚みをt1
低線膨張性ポリイミド樹脂層の線膨張係数をa 2 、低線
膨張性ポリイミド樹脂層の合計厚みをt2 とした場合、 a1 ・〔t1 /(t1 +t2 )〕+ a2 ・〔t2 /(t1 +t2 )〕 の値と銅の線膨張係数との差が、1.0×10-5cm/
cm/℃よりも小さい請求項1記載の多層回路基板。
2. A coefficient of linear expansion of a thermoplastic polyimide resin layer
A1, The total thickness of the thermoplastic polyimide resin layer is t1,
The linear expansion coefficient of the low linear expansion polyimide resin layer is a 2, Low line
The total thickness of the expansive polyimide resin layer is t2If a1・ [T1/ (T1+ T2)] + A2・ [T2/ (T1+ T2)] The difference between the value of and the linear expansion coefficient of copper is 1.0 × 10-Fivecm /
The multilayer circuit board according to claim 1, which is smaller than cm / ° C.
【請求項3】 回路形成領域内もしくは該領域とその近
傍領域の低線膨張性ポリイミド樹脂層および熱可塑性ポ
リイミド樹脂層に、少なくとも一つの貫通孔が厚み方向
に形成され、回路形成領域内に形成された貫通孔には金
属物質による導通路およびバンプ状金属突出物が形成さ
れ、バンプ状金属突出物を介して回路基板間の導通がと
られている請求項1記載の多層回路基板。
3. At least one through hole is formed in the thickness direction in the low linear expansion polyimide resin layer and the thermoplastic polyimide resin layer in the circuit formation region or in the region and its vicinity and formed in the circuit formation region. The multi-layer circuit board according to claim 1, wherein a conductive path and a bump-shaped metal protrusion made of a metal substance are formed in the through hole, and the circuit boards are electrically connected via the bump-shaped metal protrusion.
【請求項4】 銅箔上に低線膨張性ポリイミド前駆体溶
液を塗布、乾燥する工程と、該塗布面にエッチング処理
または荷電処理を施す工程と、不活性ガス雰囲気下で4
00℃以上の温度にて加熱して前駆体層をイミド化する
工程と、銅箔をパターニングして回路を形成して回路基
板を得る工程と、熱可塑性ポリイミド樹脂層を介して複
数枚の回路基板を加熱圧着する工程とを含むことを特徴
する多層回路基板の製造方法。
4. A step of coating and drying a low linear expansion polyimide precursor solution on a copper foil, a step of subjecting the coated surface to an etching treatment or a charging treatment, and 4 in an inert gas atmosphere.
A step of imidizing the precursor layer by heating at a temperature of 00 ° C. or higher; a step of patterning a copper foil to form a circuit to obtain a circuit board; and a plurality of circuits via a thermoplastic polyimide resin layer. A method of manufacturing a multilayer circuit board, comprising the step of thermocompression bonding the board.
JP5072215A 1993-03-30 1993-03-30 Multilayer circuit board and manufacture thereof Pending JPH06283866A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP5072215A JPH06283866A (en) 1993-03-30 1993-03-30 Multilayer circuit board and manufacture thereof

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP5072215A JPH06283866A (en) 1993-03-30 1993-03-30 Multilayer circuit board and manufacture thereof

Publications (1)

Publication Number Publication Date
JPH06283866A true JPH06283866A (en) 1994-10-07

Family

ID=13482806

Family Applications (1)

Application Number Title Priority Date Filing Date
JP5072215A Pending JPH06283866A (en) 1993-03-30 1993-03-30 Multilayer circuit board and manufacture thereof

Country Status (1)

Country Link
JP (1) JPH06283866A (en)

Cited By (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6237218B1 (en) 1997-01-29 2001-05-29 Kabushiki Kaisha Toshiba Method and apparatus for manufacturing multilayered wiring board and multi-layered wiring board
JP2001320169A (en) * 2000-05-10 2001-11-16 Ibiden Co Ltd Multilayer circuit board and its manufacturing method
JP2002290034A (en) * 2001-03-26 2002-10-04 Denso Corp Laminated board and its manufacturing method
US6583364B1 (en) 1999-08-26 2003-06-24 Sony Chemicals Corp. Ultrasonic manufacturing apparatuses, multilayer flexible wiring boards and processes for manufacturing multilayer flexible wiring boards
US6705003B2 (en) 2000-06-22 2004-03-16 Kabushiki Kaisha Toshiba Printed wiring board with plurality of interconnect patterns and conductor bumps
US6924987B2 (en) 2001-09-05 2005-08-02 Hitachi Cable, Ltd. Wiring board and process for producing the same
EP1626615A1 (en) * 2003-05-12 2006-02-15 North Corporation Flexible circuit board, method for making the same, flexible multi-layer wiring circuit board, and method for making the same
US7321707B2 (en) 2003-08-29 2008-01-22 Japan Science And Technology Agency Electromagnetic wave frequency filter
JP2010283389A (en) * 2010-09-15 2010-12-16 Nippon Mektron Ltd Method of manufacturing multilayer circuit board

Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0464280A (en) * 1990-07-04 1992-02-28 Hitachi Ltd Manufacture of multilayer polyimide film
JPH04262593A (en) * 1991-02-18 1992-09-17 Hitachi Ltd Multilayer interconnection structure and multilayers laminating method therefor
JPH0555716A (en) * 1991-08-27 1993-03-05 Toray Ind Inc Manufacture of flexible wiring board

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0464280A (en) * 1990-07-04 1992-02-28 Hitachi Ltd Manufacture of multilayer polyimide film
JPH04262593A (en) * 1991-02-18 1992-09-17 Hitachi Ltd Multilayer interconnection structure and multilayers laminating method therefor
JPH0555716A (en) * 1991-08-27 1993-03-05 Toray Ind Inc Manufacture of flexible wiring board

Cited By (13)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6237218B1 (en) 1997-01-29 2001-05-29 Kabushiki Kaisha Toshiba Method and apparatus for manufacturing multilayered wiring board and multi-layered wiring board
US6926187B2 (en) 1999-08-26 2005-08-09 Sony Chemicals Corp. Ultrasonic manufacturing apparatus
US6583364B1 (en) 1999-08-26 2003-06-24 Sony Chemicals Corp. Ultrasonic manufacturing apparatuses, multilayer flexible wiring boards and processes for manufacturing multilayer flexible wiring boards
US6991148B2 (en) 1999-08-26 2006-01-31 Sony Corporation Process for manufacturing multilayer flexible wiring boards
JP2001320169A (en) * 2000-05-10 2001-11-16 Ibiden Co Ltd Multilayer circuit board and its manufacturing method
US6705003B2 (en) 2000-06-22 2004-03-16 Kabushiki Kaisha Toshiba Printed wiring board with plurality of interconnect patterns and conductor bumps
JP2002290034A (en) * 2001-03-26 2002-10-04 Denso Corp Laminated board and its manufacturing method
US6924987B2 (en) 2001-09-05 2005-08-02 Hitachi Cable, Ltd. Wiring board and process for producing the same
US7217370B2 (en) 2001-09-05 2007-05-15 Hitachi Cable, Ltd. Wiring board and process for producing the same
EP1626615A1 (en) * 2003-05-12 2006-02-15 North Corporation Flexible circuit board, method for making the same, flexible multi-layer wiring circuit board, and method for making the same
EP1626615A4 (en) * 2003-05-12 2007-08-22 North Corp Flexible circuit board, method for making the same, flexible multi-layer wiring circuit board, and method for making the same
US7321707B2 (en) 2003-08-29 2008-01-22 Japan Science And Technology Agency Electromagnetic wave frequency filter
JP2010283389A (en) * 2010-09-15 2010-12-16 Nippon Mektron Ltd Method of manufacturing multilayer circuit board

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