JPH06283860A - Multilayer printed circuit board and manufacture thereof - Google Patents

Abstract

PURPOSE:To manufacture a multilayer printed circuit board having excellent heat cycle resistance characteristics by forming a roughed layer of a layer containing eutectic compound made of Cu, Ni and P. CONSTITUTION:Since the strength of eutectic compound itself made of Cu, Ni and P for constituting a roughed layer 2 of eutectic plating is high and the compound is of acicular crystal, the layer 2 has an excellent anchoring effect to bring a conductor circuit 7 into rigid contact with an layer insulating layer 3, and therefore the delamination due to thermal shock scarcely occurs, and heat cycle characteristics are improved. Further, since the layer 2 by eutectic plating is formed of Cu-Ni-P eutectic compound having higher chemical resistance. oxidation resistance, it is not dissolved in a chemical copper plating bath, and can obtain a high contact strength. After a surface of the circuit 7 is roughed, the layer 3 is provided on the board, a recess for a viahole is formed, a circuit is further provided by electroless plating thereby to obtain a multilayer printed board.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a multilayer printed wiring board and a method for manufacturing the same, and particularly proposes a multilayer printed wiring board having excellent heat cycle resistance and a method for manufacturing the same.

[0002]

2. Description of the Related Art In recent years, multilayer printed wiring boards suitable for high-density wiring or high-speed arithmetic functions have been recently built up by alternately building up conductor circuits and interlayer insulating material layers to form internal / external circuits by via holes or the like. Build-up multilayer wiring boards, which are made by connecting and making electrical connections, are receiving attention. This build-up multilayer wiring board is mainly manufactured by the additive method.

In the additive method, an insulating material layer is formed by applying a resin insulating material for electroless plating on an insulating substrate such as glass epoxy, and then the surface of the insulating material layer is roughened, and then the roughening is performed. Forming a plating resist on the activated surface,
After that, it is a method of depositing a metal to be a conductor circuit by electroless plating.

According to such a method, since the conductor circuit is attached to the roughened insulating material layer by plating or the like, the adhesion between the interlayer insulating material layer and the conductor circuit provided thereon can be improved. You can

On the other hand, in the above method, as a means for improving the adhesion between the conductor circuit and the interlayer insulating material layer provided thereon, conventionally, the surface of the conductor circuit is oxidized and reduced to roughen the surface. The so-called blackening / reduction process is being performed. When such a blackening / reduction treatment is performed, the surface of the conductor circuit is roughened, and the roughened surface serves as an anchor to physically strengthen the bond between the interlayer insulating material layer and the conductor circuit. .

[0006]

However, the adhesion between the conductor circuit and the interlayer insulating material layer provided thereon is still insufficient even when the above-described blackening / reduction treatment technique is used, Under severe environmental conditions, there has been a problem that the printed circuit board lacks heat cycle resistance. For example, according to the test under the condition of -6 ℃ to 150 ℃ according to MIL-883, the heat cycle resistance of the printed wiring board is 30 at the maximum number of cycles that the interlayer insulation layer does not peel.
It was about 0 cycles.

Therefore, an object of the present invention is to solve the above problems of the prior art, and in particular to provide a multilayer printed wiring board excellent in heat cycle resistance and a manufacturing technique thereof.

[0008]

Means for Solving the Problems As a result of intensive studies aimed at achieving the above-mentioned object, the inventors have found that a roughening layer made of an electroless plating film of needle crystals is formed at the interface between a conductor circuit and an interlayer insulating material layer. It was found that the above object can be achieved by providing the present invention, and the present invention has been made.

That is, according to the present invention, a conductor circuit having a roughened layer on at least a part of its surface is provided on a substrate, an interlayer insulating material layer is further provided on a substrate including the conductor circuit, and further. In the multilayer printed wiring board in which another conductor circuit is provided on the interlayer insulating material layer, the roughening layer is Cu, Ni and P, preferably 90 <Cu <100 m.
A multilayer printed wiring board comprising a layer containing a eutectic compound consisting of ol%, 0 <Ni <10mol% and 0 <P <10mol%, wherein the roughening layer is a needle-shaped crystal. It is desirable that the film has a thickness of 5 μm or less. Then, the manufacturing method of the multilayer printed wiring board, a roughening layer is formed on at least a part of a conductor circuit surface provided on a substrate, then an interlayer insulating material layer is formed on the substrate, and thereafter, In a method for manufacturing a multilayer printed wiring board in which a conductor circuit is provided on an interlayer insulating material layer, a substrate provided with a conductor circuit is immersed in an electroless plating bath containing at least Cu compound, Ni compound and hypophosphite. By doing so, a roughened layer containing a eutectic compound of Cu, Ni and P is formed on at least a part of the surface of the conductor circuit, which is a method for producing a multilayer printed wiring board. Cu ion concentration, Ni ion concentration and hypophosphite ion concentration were 2.2 × 10 ^-2 to 4.1 ×, respectively.
10 ^-2 mol / l, 2.2 x 10 ^-3 to 4.1 x 10 ^-3 mol / l, 0.20
By performing electroless plating (eutectic plating) using a plating bath of ˜0.25 mol / l, 90 <Cu <100 mol%, 0 <Ni <10 mol% and 0 <P on at least a part of the conductor circuit surface. It is desirable to form a roughened layer containing a eutectic compound consisting of <10 mol%, and the Cu compound, Ni compound and hypophosphite are copper sulfate, nickel sulfate and sodium hypophosphite, respectively. Is desirable. In the present invention, the substrate provided with the conductor circuit,
It does not matter even if it is a multilayer substrate.

[0010]

The roughening layer by the blackening reduction treatment is obtained by oxidizing the copper surface to form copper oxide. However, the strength of the copper oxide forming the roughening layer is low, and therefore, the thermal shock causes It is easily destroyed and causes delamination. In this respect, the roughened layer by eutectic plating of the present invention constitutes this roughened layer.
The strength of the eutectic compound itself consisting of Cu, Ni and P is high,
Moreover, since it is a needle-shaped crystal, it has an excellent effect as an anchor, and can firmly adhere the conductor circuit and the interlayer insulating material layer to each other. Therefore, delamination due to thermal shock does not easily occur, and the heat cycle resistance is high. improves. Further, the roughened layer by the blackening reduction treatment, because copper oxide or copper is exposed to the surface, is dissolved in the alkaline solution of the chemical copper plating bath, so-called haloing phenomenon easily occurs, and,
The copper surface may be oxidized. In this regard, since the roughened layer by eutectic plating of the present invention is formed of a Cu-Ni-P eutectic compound having higher chemical resistance and oxidation resistance than Cu, it is dissolved in a chemical copper plating bath. High adhesion can be secured without oxidization or oxidation. As described above, in the multilayer printed wiring board of the present invention, the roughening layer made of the electroless plating film provided at the interface between the conductor circuit and the interlayer insulating material layer is a eutectic compound made of Cu, Ni and P. Is characterized by.

Here, in the present invention, the eutectic compound is in the range shown by hatching in FIG. 1, that is, 90 <Cu <100 m.
It is preferably composed of ol%, 0 <Ni <10 mol% and 0 <P <10 mol%. The reason for this is that if the Cu content is 90 mol% or less, the deposited film crystals become powdery, and if the Ni content is 10 mol% or more, the deposited film crystals become powdery and the conductivity deteriorates.
This is because if the content is 10 mol% or more, the resistance value becomes high and it is difficult to form needle crystals. That is, in the above combination, the crystals of the deposited film have a needle-like structure and a structure having an excellent anchor effect.

In the present invention, the roughening layer is preferably a film having a thickness of 5 μm or less, and particularly 0.5 μm.
The range of m to 2 μm is preferable. The reason for this is 0.5 μm
If it is less than 5, the anchor effect is low, while if it exceeds 5 μm,
This is because the surface roughness becomes too large and the adhesion strength is rather reduced.

In the multilayer printed wiring board of the present invention, even if the conductor circuit on the substrate and the other conductor circuit provided on the interlayer insulating material layer are electrically connected to each other by via holes or through holes. Good. However, when the via holes are used for connection, it is desirable that the roughening layer at the connection point be removed in advance or that no roughening layer be provided. The reason is that if a roughened layer is present at the connection point, the resistance is slightly increased.

In the present invention, the resin insulating material used as the interlayer insulating material layer is a cured heat-resistant resin soluble in an acid or an oxidizing agent in a matrix made of a resin which is hardly soluble in the acid or the oxidizing agent. It is desirable that the powder is dispersed. The reason is that the interlayer insulating material layer obtained by using the above resin insulating material can be easily provided with a roughened surface with an acid or an oxidizing agent, and the interlayer insulating material layer and the conductor provided on the interlayer insulating material layer by electroless plating. This is because the adhesion with the circuit can be improved. The anchor-forming heat-resistant resin powder for forming such a roughened surface is, for example, a heat-resistant resin powder having an average particle diameter of 10 μm or less, and an average particle diameter obtained by aggregating heat-resistant resin powder having an average particle diameter of 2 μm or less. Agglomerated particles with a size of 2-10 μm, a mixture of heat-resistant resin powder with an average particle size of 2-10 μm and heat-resistant resin powder with an average particle size of 2 μm or less, on the surface of the heat-resistant resin powder with an average particle size of 2-10 μm It is preferable to be selected from pseudo particles formed by adhering at least one of a heat resistant resin powder having an average particle diameter of 2 μm or less and an inorganic powder having an average particle diameter of 2 μm or less. Regarding the shape and depth of the anchor to be formed, it is desirable that the surface roughness be within the range of 1 to 20 μm with resin powders with different particle diameters. In such a case, sufficient adhesion of the conductor Strength is obtained. Further, it is desirable that the matrix resin forming the resin insulating material has a photosensitive property. This is because a via hole can be easily formed by exposure and development by using a resin exhibiting photosensitive characteristics.

Next, a method for manufacturing the multilayer printed wiring board of the present invention will be described. The manufacturing method of the present invention, the substrate provided with a conductor circuit, at least Cu compound, by immersing in a plating bath containing a Ni compound and hypophosphite to perform electroless plating, the conductor circuit surface Is characterized in that a roughened layer containing a eutectic compound composed of Cu, Ni and P is formed on at least a part of the above. According to this, the crystal of the film deposited by electroless plating becomes a eutectic compound consisting of Cu, Ni, and P having a needle-like crystal structure, and this needle-like crystal structure forms the conductor circuit and the interlayer insulation provided on the conductor circuit. It acts as an anchor effect to improve the adhesion with the material layer.

Here, the Cu ion concentration, Ni ion concentration and hypophosphite ion concentration in the electroless plating bath are 2.2 × 10 ⁻² to 4.1 × 10 ⁻² mol / l and 2.2 × 10 ^{−, respectively. 3}
~ 4.1 x 10 ^-3 mol / l, 0.20 ~ 0.25 mol / l are desirable. The reason for this is that within the above range, the crystal structure of the deposited film becomes a needle-like structure, and therefore the anchor effect is excellent. In addition to the above compounds, complexing agents, additives and the like may be added to the electroless plating bath as appropriate. Also,
Before applying the electroless plating, a catalyst nucleus such as Pd may be added in advance.

The conditions of the above electroless plating include a bath temperature of 60 to
80 ℃, deposition rate 1 ~ 1.5μm / 10min, bath ratio 0.5 ~ 1.
It is desirable that 0 dm ² / l, the bath pH is 8 to 10, and the plating time is 5 to 20 minutes. This means that if the above conditions are exceeded,
This is because the deposited plating film does not become dense and the heat cycle resistance is significantly reduced.

In the method of the present invention, after the above-mentioned treatment for forming the roughening layer on the surface of the conductor circuit on the substrate is completed, an interlayer insulating material layer is provided on the substrate including the conductor circuit, and the interlayer insulating material layer is formed on the substrate. A through hole for a recess or a through hole is formed, and a plating resist is further formed on this interlayer insulating material layer, if necessary, and another conductor circuit is provided by electroless plating to obtain a multilayer printed wiring board. . Here, when connecting the upper and lower conductor circuits by via holes,
It is necessary that the roughening layer at the connection point is removed in advance or that the roughening layer is not provided in the underlying conductor circuit. For this purpose, it is preferable to mask the conductor circuit portion connected by the via hole before providing the roughened layer on the conductor circuit surface by electroless plating. The upper and inner conductor circuits in the present invention can be provided according to a conventional method. Hereinafter, examples will be described in detail.

[0019]

EXAMPLES Example 1 A multilayer printed wiring board by a build-up method was obtained according to the manufacturing steps (1) to (10) shown below. (1) After etching the copper-clad laminate to form the inner layer circuit 1, the substrate is acid-degreased, soft-etched, substituted with a Pd catalyst on Cu, activated, and then the composition shown in Table 1 is obtained. The electroless plating bath was used to obtain a roughened layer 2 of Ni—P—Cu eutectic having a thickness of 1 μm. The composition of this roughened layer 2 is
As a result of analysis by EPMA (fluorescent X-ray analyzer), Cu; 98 mol
%, Ni: 1.5 mol%, P: 0.5 mol%.

[0020]

[Table 1]

(2) Cresol novolac type epoxy resin (Oilized shell, trade name: Epicoat 180S) 60% by weight of acrylate 50% bisphenol A type epoxy resin (Oilized shell, trade name: E-1001) 40 parts by weight, diallyl terephthalate 15 parts by weight, 2-methyl-1- [4- (methylthio) phenyl] 2-morpholinopropanone-1
(Ciba Geigy, trade name: Irgacure-907) 4
10 parts by weight of an epoxy resin fine powder having a particle size of 5.5 μm (manufactured by Toray) and 25 parts by weight of an epoxy resin fine powder having a particle size of 0.5 μm (manufactured by Toray) were blended. Then, while adding an appropriate amount of butyl cellosolve to this mixture, the mixture was stirred with a homodisper stirrer to prepare a varnish of a resin insulating material.

(3) After applying the above varnish on the inner layer circuit 1 using a roll coater, apply the applied varnish at 100 ° C.
Then, it was dried and cured for 1 hour to form a photosensitive interlayer insulating material layer 3 having a thickness of 50 μm (see FIG. 2 (b)).

(4) A photomask film in which a black circle having a diameter of 100 μm and a punching cut portion is printed in black is adhered to the wiring board subjected to the treatment of the above step (3), and 500 mj / cm is applied by an ultrahigh pressure mercury lamp. Exposed at ² . This was subjected to ultrasonic development treatment with a chlorocene solution to form an opening 4 having a diameter of 100 μm as a via hole on the wiring board.

(5) Approximately 30 times the wiring board with an ultra-high pressure mercury lamp
Exposure at 0 mj / cm ² and then 100 ° C. for 1 hour and 1
Heat treatment was carried out at 50 ° C. for 3 hours. Through these treatments, the opening 4 excellent in dimensional accuracy equivalent to a photomask film is obtained.
The inter-layer insulating material layer 3 having the above was formed (see FIG. 2 (c)).

(6) The surface of the interlayer insulating material layer 3 was roughened by immersing the wiring board in chromic acid for 10 minutes. Further, after neutralization, washing with water and washing with hot water removed chromic acid from the wiring board.

(7) The wiring board is immersed in a commercially available Pd-Sn colloid catalyst to adsorb the Pd-Sn colloid 5 on the inner wall surface of the opening 4 and the surface of the roughened interlayer insulating material layer 120, ℃
And heat treated for 30 minutes. (See Figure 2 (d)).

(8) A dry film photoresist was laminated on the wiring board and exposed and developed to form a plating resist 6.

(9) The wiring board was immersed in a 37% formaldehyde aqueous solution as a reducing agent to activate Pd. At this time, the processing temperature is 40 ° C. and the processing time is 5 minutes.

(10) Immediately soaking the wiring board in an electroless plating solution having the composition shown in Table 2 and maintaining the state for 15 hours, the thickness of the plating film is about 35 μm, L / S = 75 μm /
A multilayer printed wiring board having a conductor circuit 7 of 75 μm was obtained (see FIG. 2 (e)).

[0030]

[Table 2]

(Embodiment 2) In the present embodiment, in the embodiment 1
A resin composition different from the above was adopted and a multilayer printed wiring board was obtained by the build-up method. (1) 50% acrylate 100 of phenol aralkyl type epoxy resin (Mitsui Toatsu Chemicals, trade name: XL-225L)
15 parts by weight of diallyl terephthalate, 4 parts by weight of 2-methyl-1- [4- (methylthio) phenyl] -2-morpholinopropanone-1 (manufactured by Ciba Geigy, trade name Irgacure-907), and imidazole series 4 parts by weight of a curing agent (manufactured by Shikoku Kasei, trade name: 2PZ-CN) and 10 parts by weight of fine melamine resin powder having an average particle size of 5.0 μm (made by Honen Corporation) were mixed. Then, an appropriate amount of butyl carbitol was added to this mixture, and the mixture was stirred by a three-roller to form a resin insulating material varnish.

(2) After forming the inner layer circuit 1, the roughening layer 2 having a thickness of 1.5 μm is formed in the same electroless plating bath as in Example 1, and a gap coater is used on the wiring board. After applying the above varnish, the applied varnish was dried and cured at 80 ° C. for 1 hour to form a photosensitive interlayer insulating material layer 3 having a thickness of 70 μm.

(3) In accordance with steps (4) to (6) of Example 1 above, the opening 4 to be a via hole was formed and the surface of the interlayer insulating material layer 3 was roughened. Chromic acid was used for the surface roughening treatment of the interlayer insulating material layer 3.

(4) The wiring board was immersed in a commercially available Pd-Sn colloid catalyst to adsorb the Pd-Sn colloid 5 on the inner wall surface of the opening 4 and the surface of the roughened interlayer insulating material layer 3.

(5) A dry film resist was laminated on the wiring board and exposed and developed to form a plating resist 6.

(6) The wiring board was immersed in an aqueous solution of hydrofluoric acid-glucose to activate Pd again. At this time, the processing temperature is 30 ° C and the processing time is 10 minutes.

(7) The wiring board was immediately immersed in an electroless copper plating solution having the composition shown in Table 2 and kept in that state for 15 hours to obtain a plating film thickness of about 35 μm and L / S = 50 μm.
A conductor circuit of m / 50 μm was formed.

(8) Further, the resist 6 is removed, the catalyst existing under the resist 6 is removed, and the steps (1) to (7) are repeated. The wiring board was obtained.

Example 3 By repeating the steps (1) to (8) of Example 2 on both sides of the substrate, a 6-layer build-up multilayer printed wiring board shown in FIG. 4 was obtained.

(Comparative Example 1) After subjecting the surface of the substrate having the inner layer circuit formed by etching to blackening reduction treatment, an interlayer insulating material layer is formed in the same manner as in Example 1, and further roughened and plated. Thus, a build-up multilayer printed wiring board was obtained.

(Comparative Example 2) After the inner layer circuit is formed, a blackening reduction treatment is performed to form an inner layer circuit-blackening reduction treatment layer-insulating layer-inner layer circuit-blackening reduction treatment layer-insulating layer-outer layer pattern. A build-up multilayer printed wiring board having three layers on one side was obtained.

(Comparative Example 3) A 6-layer build-up multilayer printed wiring board was obtained by forming the structure of Comparative Example 2 on both sides of the substrate on which the inner layer circuit was formed.

With respect to the build-up multilayer printed wiring board prepared as described above, the temperature was −65 ° C. × 15 minutes, room temperature × 10.
Min, 125 ° C x 15 min vapor phase heat cycle test, and heat cycle resistance, and the presence or absence of peeling of the insulating layer after immersion in a solder bath at 260 ° C for 15 seconds was examined. The results are shown in Table 3.

As is clear from the results shown in Table 3, it has been confirmed that the multilayer printed wiring board according to the present invention has significantly improved heat cycle resistance as compared with the conventional wiring board.

[0045]

[Table 3]

[0046]

As described above, according to the present invention, a multilayer printed wiring board excellent in heat cycle resistance can be manufactured very easily.

[Brief description of drawings]

FIG. 1 is a diagram showing the composition of a roughened layer deposited by Ni—P—Cu eutectic plating.

FIG. 2 is a manufacturing process diagram showing an embodiment of the present invention.

3 is a diagram showing a multilayer printed wiring board obtained in Example 2. FIG.

FIG. 4 is a diagram showing a multilayer printed wiring board obtained in Example 3;

[Explanation of symbols]

 1 Inner Layer Circuit 2 Roughening Layer (Ni-P-Cu Eutectic Plating) 3 Interlayer Insulating Material Layer 4 Opening 5 Pd-Sn Colloid 6 Plating Resist 7 Conductor Circuit

Claims (7)

[Claims] 1. A conductor circuit having a roughening layer on at least a part of its surface is provided on a substrate, and an interlayer insulating material layer is further provided on a substrate including the conductor circuit, and further.
In the multilayer printed wiring board in which another conductor circuit is provided on the interlayer insulating material layer, the roughening layer is composed of a layer containing a eutectic compound composed of Cu, Ni and P. Multilayer printed wiring board. 2. The roughened layer is 90 <Cu <100 mol%, 0 <
2. A layer containing a eutectic compound consisting of Ni <10 mol% and 0 <P <10 mol%.
The multilayer printed wiring board according to. 3. The multilayer printed wiring board according to claim 1, wherein the roughening layer is a film of needle crystals. 4. The multilayer printed wiring board according to claim 1, wherein the roughening layer is a film having a thickness of 5 μm or less. 5. A roughening layer is formed on at least a part of a conductor circuit surface provided on a substrate, then an interlayer insulating material layer is formed on the substrate, and then a conductor is formed on the interlayer insulating material layer. In a method of manufacturing a multilayer printed wiring board in which a circuit is provided, at least a Cu compound, a Ni
Forming a roughening layer containing a eutectic compound composed of Cu, Ni and P on at least a part of the surface of the conductor circuit by immersing in an electroless plating bath containing a compound and hypophosphite A method for manufacturing a multilayer printed wiring board, comprising: 6. The Cu ion concentration, the Ni ion concentration and the hypophosphite ion concentration in the bath are respectively 2.2 × 10 ⁻² to
4.1 x 10 ^-2 mol / l, 2.2 x 10 ^-3 to 4.1 x 10 ^-3 mol / l,
By performing electroless plating using a plating bath of 0.20 to 0.25 mol / l, 90 <Cu <100 mol%, 0 <Ni <10 mol% and 0 <P are formed on at least a part of the conductor circuit surface.
The method for producing a multilayer printed wiring board according to claim 5, wherein a roughened layer containing a eutectic compound of <10 mol% is formed. 7. The method for producing a multilayer printed wiring board according to claim 5, wherein the Cu compound, the Ni compound and the hypophosphite are copper sulfate, nickel sulfate and sodium hypophosphite, respectively.