JPH062836U - Digital-to-analog converter - Google Patents

Abstract

(57) [Abstract] [Purpose] To eliminate the step difference between the high-order bit and the low-order bit without using a high-precision element. A D / A converter includes a switch 1 provided between a voltage source that generates a voltage VR and a resistor 5 of an integrating circuit.
And a switch 2 provided between the operational amplifiers 13 for outputting the correction voltage VF corresponding to the value indicated by the lower digit of the digital signal, and a switch 3 provided between the zero potential point and the resistor 5 of the integrating circuit. Have. The D / A converter turns on the switch 1 for a time corresponding to the value indicated by the upper digit of the digital signal, and when the switch 1 is not turned on,
Switch 2 for the minimum unit time to turn on switch 1
Is turned on, and the switch 3 is turned on when the switches 1 and 2 are not turned on.

Description

[Detailed description of the device]

[0001]

[Industrial applications]

 The present invention relates to a digital / analog converter (hereinafter referred to as a D / A converter).

[0002]

[Prior art]

3A is a circuit diagram showing a conventional example of a D / A converter, and FIG. 3B is a circuit diagram showing an example of the pulse width modulators 32 and 33 in FIG. 3A. A digital circuit 31 including a micro computer, a logic circuit and the like outputs a high-order 8 bits and a low-order 8 bits, ie, a 16-bit digital signal. A pulse width converter 32 (hereinafter referred to as PWM 32) inputs the upper 8 bits of the digital signal, and a pulse width converter 33 (hereinafter referred to as PWM 33) inputs the lower 8 bits of the digital signal. . These PWMs 32 and 33 output a pulse width modulation signal (hereinafter, referred to as a PWM signal) corresponding to the input digital signal, and thus each of them is composed of two switches 41 and 42, and one switch 41 is a voltage source (not shown) to output the setting voltage V _R, the other switch 42 are connected to ground (zero potential) as a reference voltage source. The output end of the PWM 32 is via an input resistor 34 of 100 KΩ, and the output end of the PWM 33 is via an input resistor 35 of 100 MΩ (weighted 1/1000 times that of the input resistor 34). Both are connected to the inverting input terminals of 38. The operational amplifier 38 is connected to the feedback resistor 36 and the feedback capacitor 37 of 100 KΩ, and outputs an analog signal corresponding to the 16-bit digital signal output from the digital circuit 31.

[0003]

[Problems to be solved by the device]

 In the conventional D / A converter described above, since the upper bit and the lower bit are weighted and added by the input resistor, if the weighting is not accurate, there is a step larger than the resolution at the joint between the upper bit and the lower bit. Occurs. That is, it is necessary to correct the joint. Therefore, a highly accurate element is required, and the D / A converter becomes expensive.

An object of the present invention is to provide a D / A converter that eliminates the step difference between the upper bit and the lower bit without using a highly accurate element.

[0005]

[Means for Solving the Problems]

 The D / A converter of the present invention outputs a voltage corresponding to the value indicated by the lower digit of a given digital signal, an integrator circuit for averaging the voltage at the input terminal, a constant voltage source for generating a preset voltage. Lower digit converter, a first switch provided between the constant voltage source and the input terminal of the integrating circuit, and a second switch provided between the lower digit converter and the input terminal of the integrating circuit Switch, a third switch provided between the zero potential point and the input terminal of the integrating circuit, and the first switch is turned on for a time corresponding to the value indicated by the upper digit of the digital signal, The first switch is turned on when the first switch is not turned on. The second switch is turned on for the minimum unit time, and the first switch is turned on when neither the first switch nor the second switch is turned on. Three Sui And a control means for turning on the switch.

[0006]

[Action]

 The first switch outputs a PWM signal having a time width corresponding to the upper digit digital signal. The second switch outputs a pulse amplitude modulation signal (hereinafter referred to as a PAM signal) of the voltage according to the lower digit digital signal when the output of the first switch is not performed. The third switch outputs a zero potential when the outputs of the first and second switches are not being performed. The average value of the outputs of the first, second, and third switches becomes an analog voltage corresponding to the digital signal. Since the maximum amplitude of the PAM signal can be easily adjusted, the step difference between the upper bit and the lower bit can be easily eliminated.

[0007]

【Example】

 Next, an embodiment of the present invention will be described with reference to the drawings. FIG. 1 is a circuit diagram showing a D / A converter of one embodiment of the present invention, and FIG. 2 is a timing chart showing the operation of this embodiment.

A digital circuit (not shown) including a microcomputer, a logic circuit, etc. outputs a high-order 8 bits and a low-order 8 bits, ie, a 16-bit digital signal. The first integration circuit including the resistor 5, the capacitor 6, and the operational amplifier 7 has a time constant of the voltage VI at the input terminal 4 of about 1 to several tens of times one cycle TS (TS is, for example, 1 second) of the digital signal. Integrate and average. The first switch 1 outputs a PWM signal, and as shown in FIG. 2, the time TR corresponding to the value indicated by the signal a of the higher 8 bits of the digital signal given by the above digital circuit per period TS. The digital circuit is controlled so as to connect the constant voltage source (not shown) that outputs the preset voltage VR to the input end 4 of the first integrating circuit. Since the on-time of the first switch 1 is proportional to the binary value indicated by the signal a, it is 1/256 seconds, for example, for the minimum unit binary number 00000001. As shown in FIG. 2, when the first switch 1 is not turned on, the second switch 2 is the minimum unit time TW for which the first switch is turned on per cycle TS 1/256 seconds. Only the signal b is supplied from a digital circuit (not shown) and turned on, and is controlled by the digital circuit so as to connect the output terminal of the operational amplifier 13 and the input terminal 4 of the first integrating circuit. As shown in FIG. 2, the third switch 3 connects the ground (zero potential) and the input terminal 4 of the first integrating circuit when the first and second switches 1 and 2 are not turned on. The digital circuit is controlled to connect. The fourth switch 8 is turned on for a period corresponding to the value indicated by the signal d of the upper 8 bits of the digital signal per one cycle TS, and outputs a constant voltage source (not shown) that outputs the set voltage VR. 11, an input terminal of a second integrating circuit including a capacitor 12 and an operational amplifier 13 is connected. The fifth switch 9 is controlled by the signal d inverted by the inverter 10 so as to turn on when the fourth switch 8 is not on, and connects the ground and the input terminal of the second integrating circuit. . The second integrator circuit outputs a PAM signal, has a time constant set to about several times to several tens of times of one cycle TS, and outputs the correction voltage VF. An IC D / A converter may be used for the second integrating circuit. With the above configuration, the output voltage VO = VR · (TR / TS) + VF · (TW / TS) of the D / A converter can be obtained.

Table 1 shows an example of the relationship between the numerical value (hexadecimal number) of the digital signal, the ON time of the switches 1, 2, and 3 and the correction voltage VF. Since the maximum amplitude of the correction voltage VF is 255/256 when the digital signal (00FF) ₁₆ is used, there is no step difference between the upper bit and the lower bit.

[0010]

[Table 1]

[0011]

[Effect of device]

 As described above, the present invention outputs the average value by outputting the high-order digit with the PWM signal and the low-order digit with the PAM signal, so that the step difference between the high-order bit and the low-order bit can be obtained without using a high-precision element. There is an effect that can be eliminated.

[Brief description of drawings]

FIG. 1 is a circuit diagram showing a D / A converter according to an embodiment of the present invention.

FIG. 2 is a timing chart showing the operation of this embodiment.

FIG. 3 is a circuit diagram showing a conventional example of a D / A converter.

[Explanation of symbols]

 1, 2, 3, 8, 9 Switch 4 Input terminal of the first integrating circuit 5,11 Resistor 6,12 Capacitor 7,13 Operational amplifier

Claims (1)

[Scope of utility model registration request] 1. An integrator circuit for averaging the voltage at the input end, a constant voltage source for generating a preset voltage, and a lower digit for outputting a voltage according to the lower digit of a given digital signal. A converter, a first switch provided between the constant voltage source and the input terminal of the integrating circuit, and a second switch provided between the lower digit converter and the input terminal of the integrating circuit, A third switch provided between the point of zero potential and the input terminal of the integrating circuit, and the first switch is turned on for a time corresponding to the value indicated by the higher digit of the digital signal, and the first switch is turned on. When not set, the second switch is turned on for the minimum unit time for turning on the first switch, and the first and second switches are turned on.
A digital / analog converter having control means for turning on the third switch when none of the switches is turned on.