JPH06283640A - Method for mounting semiconductor element in casing with mechanical clip - Google Patents

Method for mounting semiconductor element in casing with mechanical clip

Info

Publication number
JPH06283640A
JPH06283640A JP5310808A JP31080893A JPH06283640A JP H06283640 A JPH06283640 A JP H06283640A JP 5310808 A JP5310808 A JP 5310808A JP 31080893 A JP31080893 A JP 31080893A JP H06283640 A JPH06283640 A JP H06283640A
Authority
JP
Japan
Prior art keywords
chip
clip device
support
semiconductor element
casing
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Withdrawn
Application number
JP5310808A
Other languages
Japanese (ja)
Inventor
Guenther Dr Schuster
ギュンター・シユスター
Walter Pfeiffer
ヴァルター・プファイファー
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Airbus Defence and Space GmbH
Original Assignee
Deutsche Aerospace AG
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Deutsche Aerospace AG filed Critical Deutsche Aerospace AG
Publication of JPH06283640A publication Critical patent/JPH06283640A/en
Withdrawn legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
    • H01L23/495—Lead-frames or other flat leads
    • H01L23/49541—Geometry of the lead-frame
    • H01L23/49548—Cross section geometry
    • H01L23/49551—Cross section geometry characterised by bent parts
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
    • H01L21/50—Assembly of semiconductor devices using processes or apparatus not provided for in a single one of the subgroups H01L21/06 - H01L21/326, e.g. sealing of a cap to a base of a container
    • H01L21/52—Mounting semiconductor bodies in containers
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/71—Means for bonding not being attached to, or not being formed on, the surface to be connected
    • H01L24/72—Detachable connecting means consisting of mechanical auxiliary parts connecting the device, e.g. pressure contacts using springs or clips
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/013—Alloys
    • H01L2924/0132—Binary Alloys
    • H01L2924/01322—Eutectic Alloys, i.e. obtained by a liquid transforming into two solid phases
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/095—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00 with a principal constituent of the material being a combination of two or more materials provided in the groups H01L2924/013 - H01L2924/0715
    • H01L2924/097—Glass-ceramics, e.g. devitrified glass
    • H01L2924/09701—Low temperature co-fired ceramic [LTCC]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10—Details of semiconductor or other solid state devices to be connected
    • H01L2924/11—Device type
    • H01L2924/14—Integrated circuits
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/30—Technical effects
    • H01L2924/35—Mechanical effects
    • H01L2924/351—Thermal stress

Abstract

PURPOSE: To fix a chip to a prearranged position, by mechanically clipping the chip without applying a force to a retainer of the chip, and engaging it. CONSTITUTION: A lead frame consists of a bearing 1 to installation of a chip 3 and a spring element 2. By an automatic machine, the spring element 2 is bent upward, and the chip 3 is inserted in the arrow direction. After the spring is closed, the chip 3 is clamped and adjusted at the same time. The chip 3 is practically coupled to the retainer without thermal stress, and auxiliary agents such as adhesive agent and preform are unnecessary. As a result, flux vapor or residue of welding flux is not generated. Thermal treatment of the chip and the retainer is also made unnecessary.

Description

【発明の詳細な説明】Detailed Description of the Invention

【０００１】[0001]

【産業上の利用分野】この発明は、チップをその支持体
に機械的クリップのみによって力を加えないで装着可能
にして且つ予定された位置に保持するケーシングの中に
収納される支持体に半導体チップを取り付ける方法に関
する。BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a semiconductor mounted on a support body which is housed in a casing which allows the chip to be mounted on the support body only by a mechanical clip without applying force and which holds the chip in a predetermined position. It relates to a method of mounting a chip.

【０００２】[0002]

【従来の技術】集積回路の製造時には半導体素子（チッ
プ）を１個の枠（リードフレーム）或いはケーシング底
部に連結する。その後ボンドによって多数の対外界電気
結合部が形成され、最後にケーシングを被い、リードフ
レームを接着剤で包囲する。2. Description of the Related Art When manufacturing an integrated circuit, a semiconductor element (chip) is connected to a frame (lead frame) or a casing bottom. The bond then forms a number of external electrical connections, and finally covers the casing and surrounds the leadframe with an adhesive.

【０００３】ケーシング底部或いはリードフレーム（以
下単に支持体という）上にチップを結合するには接着、
共融ボンド及びろうづけ等の公知の方法が利用される。
接着の場合にはペースト状の接着剤を支持体上に塗り付
るか或いは接着箔（プレフォーム）を支持体上に置く。
続いてチップを接着剤上に置くか或いは接着剤中に押し
込む。この場合接着剤は導電性或いは誘電絶縁性をもつ
ことがある。続いて約１２０度Ｃで３０分以上熱処理す
ると接着剤は硬化してチップは支持体に結合される。To bond a chip to the bottom of a casing or a lead frame (hereinafter simply referred to as a support), adhesive bonding,
Known methods such as eutectic bonding and brazing are used.
In the case of adhesion, a paste adhesive is applied on the support or an adhesive foil (preform) is placed on the support.
The chip is then placed on or pressed into the adhesive. In this case, the adhesive may have conductivity or dielectric insulation. Subsequent heat treatment at about 120 ° C. for more than 30 minutes cures the adhesive and bonds the chip to the support.

【０００４】共融ボンドの場合にはチップを約４００度
Ｃで金を覆層した支持体上に押しつけてＳｉとＡｕの共
融がチップを支持体に結合するまで横方向に移動させ
る。場合によっては金プレフォームをも支持体とチップ
の間に使用する。In the case of a eutectic bond, the tip is pressed at about 400 ° C. onto a gold overlaid support to move laterally until the eutectic of Si and Au bonds the tip to the support. Gold preforms are also optionally used between the support and the chips.

【０００５】ろうづけの場合はチップを支持体上に固定
するために低融点の金属はんだ、大抵はプレフォームを
使用する。その際場合によっては溶接フラックスの使用
も必要である。In the case of brazing, a low melting metal solder, usually a preform, is used to fix the chip on the support. In that case, it may be necessary to use welding flux.

【０００６】これらの方法には特に、中間製品の熱処理
を必要とするという欠点がある。支持体とチップと結合
物層との間の膨張係数の差により更にチップ中に熱によ
る機械的ストレスが生じる。These methods have the particular drawback of requiring heat treatment of the intermediate product. The difference in the coefficient of expansion between the support, the chip and the bond layer also causes thermal mechanical stress in the chip.

【０００７】[0007]

【発明が解決しようとする課題】この発明の課題は、半
導体チップを支持体上に力を加えずに装着でき且つ予定
の位置に固定することにある。SUMMARY OF THE INVENTION An object of the present invention is to mount a semiconductor chip on a support without applying force and to fix it at a predetermined position.

【０００８】[0008]

【問題を解決するための手段】以上の課題はこの発明に
よって、チップをその支持体に力を加えないで機械的に
クリップすることによってのみ装着可能にして且つ予定
された位置に保持することによって解決される。SUMMARY OF THE INVENTION It is an object of the invention, according to the invention, to make a chip mountable and to hold it in its intended position only by mechanically clipping it without exerting a force on its support. Will be resolved.

【０００９】チップを支持体上に機械的にとめる際先ず
支持体をチップアーキテクチャーに合わせて打ち抜き且
つ折り曲げる。In mechanically fastening the chip onto the support, the support is first stamped and bent to the chip architecture.

【００１０】[0010]

【実施例】図１はリードフレームの重要な部分の垂直断
面の一例を示す。符号１はチップの対設備軸受、２はば
ね要素である。DESCRIPTION OF THE PREFERRED EMBODIMENTS FIG. 1 shows an example of a vertical section of an important part of a lead frame. Reference numeral 1 is a bearing for the equipment of the chip, and 2 is a spring element.

【００１１】自動機械によってばね要素２を上へ折り曲
げ、図２に示すようにチップ３を矢印の方向に挿入す
る。ばねを閉じた後チップを挟持し同時に調節する。図
３はリードフレームの重要な部分の平面図で、ボンドク
ッション４とコンタクトウェブ５のみがボンドによって
相互に電気的に連結されている。そののちカプセル入れ
を実施できる。The spring element 2 is bent upward by an automatic machine and the tip 3 is inserted in the direction of the arrow as shown in FIG. After closing the spring, clamp the tip and adjust at the same time. FIG. 3 is a plan view of an important part of the lead frame, in which only the bond cushion 4 and the contact web 5 are electrically connected to each other by a bond. After that, encapsulation can be performed.

【００１２】クリップの方法には公知の方法と比較して
一連の利点がある。即ちチップと支持体の結合は事実上
熱ストレスなしである。接着剤或いはプレフォームのよ
うな助材の使用は省かれ、従って融材蒸気或いは溶接フ
ラックスの残渣も生じない。チップと支持体の温度処理
も同じく必要ではない。The clipping method has a series of advantages over known methods. That is, the bond between the chip and the support is virtually free of heat stress. The use of auxiliaries such as adhesives or preforms is dispensed with, so that no residue of melt vapor or welding flux is produced. Neither is the temperature treatment of the chip and the support necessary.

【００１３】この方法は特に、温度変化に原因する機械
力及び応力に特に敏感に反応する半導体チップ、たとえ
ば圧力センサー及び加速センサーに適している。しかし
また通信工学の他の半導体チップも、特に個数が多いと
きにこの方法によって廉価に取り付けることができる。This method is particularly suitable for semiconductor chips which are particularly sensitive to mechanical forces and stresses due to temperature changes, such as pressure and acceleration sensors. However, also other semiconductor chips of communication engineering can be mounted inexpensively by this method, especially when the number is large.

【００１４】[0014]

【効果】この発明の構成により、半導体チップを、特に
個数が多いとき廉価に取り付けることができる。[Effects] With the structure of the present invention, semiconductor chips can be mounted at low cost, especially when the number of semiconductor chips is large.

【図面の簡単な説明】[Brief description of drawings]

【図１】リードフレームの重要な部分の垂直断面の例示
図である。FIG. 1 is an exemplary view of a vertical section of an important part of a lead frame.

【図２】軸受けとばね要素の間に挿入されたチップの図
である。FIG. 2 is a view of a tip inserted between a bearing and a spring element.

【図３】リードフレームの重要な部分の平面図である。FIG. 3 is a plan view of an important part of the lead frame.

【符号の説明】[Explanation of symbols]

１ 対設軸受 ２ ばね要素 ３ チップ ４ コンタクトウェブ 1 Opposite bearing 2 Spring element 3 Tip 4 Contact web

Claims (10)

【特許請求の範囲】[Claims] 【請求項１】 ケーシングの中に収納される支持体に半
導体チップを取り付ける方法において、チップをその支
持体に力を加えないで機械的にクリップすることによっ
てのみ装着可能にして且つ予定された位置に保持するこ
とを特徴とする方法。1. A method of mounting a semiconductor chip on a support housed in a casing, wherein the chip can be mounted only by mechanically clipping it without applying force to the support and at a predetermined position. A method characterized by holding in. 【請求項２】 チップとクリップ装置との結合部に通電
することを特徴とする請求項１の装置。2. The device of claim 1, wherein the connection between the tip and the clip device is energized. 【請求項３】 チップとクリップ装置との結合部を誘電
的に絶縁することを特徴とする請求項１または２の方
法。3. The method according to claim 1, wherein the joint between the tip and the clip device is dielectrically insulated. 【請求項４】 半導体素子を力を加えないでクリップ装
置の中に挿入することを特徴とする請求項１〜３のいず
れか一の方法。4. The method according to claim 1, wherein the semiconductor element is inserted into the clip device without applying force. 【請求項５】 半導体素子の縁部のかどを丸めるか或い
は削ることを特徴とする請求項１〜４のいずれか一の方
法。5. The method according to claim 1, wherein the edge of the semiconductor element is rounded or ground. 【請求項６】 クリップ装置をケーシング底部或いは枠
（リードフレーム）の構成部分とすることを特徴とする
請求項１〜５のいずれか一の方法。6. The method according to claim 1, wherein the clip device is a component of a casing bottom or a frame (lead frame). 【請求項７】 クリップ装置を金属、ガラス、セラミッ
ク或いはプラスチックから製造することを特徴とする請
求項１〜６のいずれか一の方法。7. The method according to claim 1, wherein the clip device is made of metal, glass, ceramic or plastic. 【請求項８】 クリップ装置で半導体素子の位置決めを
行うことを特徴とする請求項１〜７のいずれか一の方
法。8. The method according to claim 1, wherein the semiconductor device is positioned by a clip device. 【請求項９】 クリップ装置を２個の別体の部分から構
成し、これらの部分を半導体素子の挿入の後に接合する
ことを特徴とする請求項１〜８のいずれか一の方法。9. The method according to claim 1, wherein the clip device is composed of two separate parts, which are joined after the insertion of the semiconductor element. 【請求項１０】 クリップ装置の接合を破壊せずに再び
取り外し可能にすることを特徴とする請求項９の方法。10. The method of claim 9 wherein the clip device is re-removable without breaking the joint.
JP5310808A 1992-12-16 1993-12-10 Method for mounting semiconductor element in casing with mechanical clip Withdrawn JPH06283640A (en)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
DE4242566:2 1992-12-16
DE4242566A DE4242566A1 (en) 1992-12-16 1992-12-16 Process for mounting semiconductor components in housings by mechanical clamping

Publications (1)

Publication Number Publication Date
JPH06283640A true JPH06283640A (en) 1994-10-07

Family

ID=6475504

Family Applications (1)

Application Number Title Priority Date Filing Date
JP5310808A Withdrawn JPH06283640A (en) 1992-12-16 1993-12-10 Method for mounting semiconductor element in casing with mechanical clip

Country Status (4)

Country Link
JP (1) JPH06283640A (en)
DE (1) DE4242566A1 (en)
FR (1) FR2699328A1 (en)
GB (1) GB2274021A (en)

Families Citing this family (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE10319470A1 (en) * 2003-04-29 2004-11-25 W. C. Heraeus Gmbh & Co. Kg Metal-plastic composite component and method for its production
WO2006022591A1 (en) * 2004-08-26 2006-03-02 Infineon Technologies Ag Packaging of integrated circuits to lead frames
DE102014216770A1 (en) * 2014-08-22 2016-02-25 Zf Friedrichshafen Ag Sensor module assembly

Family Cites Families (12)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS60195943A (en) * 1984-03-19 1985-10-04 Hitachi Ltd Semiconductor device
US4816427A (en) * 1986-09-02 1989-03-28 Dennis Richard K Process for connecting lead frame to semiconductor device
US4766478A (en) * 1986-09-02 1988-08-23 Dennis Richard K Lead frame for semi-conductor device and process of connecting same
DE3636373A1 (en) * 1986-10-25 1988-05-05 Heraeus Gmbh W C Connecting clip, method of producing a connecting clip and use of two connecting clips as connecting lugs for a varistor
DE3701310A1 (en) * 1987-01-17 1988-07-28 Bodenseewerk Geraetetech Contact-making device for making contact with surface-mounted integrated circuits
US4870224A (en) * 1988-07-01 1989-09-26 Intel Corporation Integrated circuit package for surface mount technology
US4999740A (en) * 1989-03-06 1991-03-12 Allied-Signal Inc. Electronic device for managing and dissipating heat and for improving inspection and repair, and method of manufacture thereof
US4972294A (en) * 1989-04-03 1990-11-20 Motorola, Inc. Heat sink clip assembly
JPH02268459A (en) * 1989-04-10 1990-11-02 Nec Corp Semiconductor package
DE3924823A1 (en) * 1989-07-27 1991-02-21 Telefunken Electronic Gmbh Semiconductor module with several semiconductors on basic substrate - has cover substrate for all semiconductors with conductive track configuration with terminal face(s)
US5057901A (en) * 1989-09-27 1991-10-15 Die Tech, Inc. Lead frame for semi-conductor device
JPH0437160A (en) * 1990-06-01 1992-02-07 Hitachi Ltd Lead frame and assembly method of semiconductor device which uses lead frame

Also Published As

Publication number Publication date
DE4242566A1 (en) 1994-06-23
GB2274021A (en) 1994-07-06
FR2699328A1 (en) 1994-06-17
GB9325637D0 (en) 1994-02-16

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Effective date: 20010306