DE4242566A1 - Process for mounting semiconductor components in housings by mechanical clamping - Google Patents

Process for mounting semiconductor components in housings by mechanical clamping

Info

Publication number
DE4242566A1
DE4242566A1 DE4242566A DE4242566A DE4242566A1 DE 4242566 A1 DE4242566 A1 DE 4242566A1 DE 4242566 A DE4242566 A DE 4242566A DE 4242566 A DE4242566 A DE 4242566A DE 4242566 A1 DE4242566 A1 DE 4242566A1
Authority
DE
Germany
Prior art keywords
chip
clamping device
indicates
semiconductor component
housings
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Ceased
Application number
DE4242566A
Other languages
German (de)
Inventor
Walter Dipl Ing Pfeiffer
Guenther Dr Schuster
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Conti Temic Microelectronic GmbH
Original Assignee
Deutsche Aerospace AG
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Deutsche Aerospace AG filed Critical Deutsche Aerospace AG
Priority to DE4242566A priority Critical patent/DE4242566A1/en
Priority to JP5310808A priority patent/JPH06283640A/en
Priority to FR9314928A priority patent/FR2699328A1/en
Priority to GB9325637A priority patent/GB2274021A/en
Publication of DE4242566A1 publication Critical patent/DE4242566A1/en
Ceased legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/48Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/488Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
    • H01L23/495Lead-frames or other flat leads
    • H01L23/49541Geometry of the lead-frame
    • H01L23/49548Cross section geometry
    • H01L23/49551Cross section geometry characterised by bent parts
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
    • H01L21/50Assembly of semiconductor devices using processes or apparatus not provided for in a single one of the subgroups H01L21/06 - H01L21/326, e.g. sealing of a cap to a base of a container
    • H01L21/52Mounting semiconductor bodies in containers
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/71Means for bonding not being attached to, or not being formed on, the surface to be connected
    • H01L24/72Detachable connecting means consisting of mechanical auxiliary parts connecting the device, e.g. pressure contacts using springs or clips
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/013Alloys
    • H01L2924/0132Binary Alloys
    • H01L2924/01322Eutectic Alloys, i.e. obtained by a liquid transforming into two solid phases
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/095Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00 with a principal constituent of the material being a combination of two or more materials provided in the groups H01L2924/013 - H01L2924/0715
    • H01L2924/097Glass-ceramics, e.g. devitrified glass
    • H01L2924/09701Low temperature co-fired ceramic [LTCC]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10Details of semiconductor or other solid state devices to be connected
    • H01L2924/11Device type
    • H01L2924/14Integrated circuits
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/30Technical effects
    • H01L2924/35Mechanical effects
    • H01L2924/351Thermal stress

Abstract

A chip 3 is inserted without force into its holder and held in its intended position by mechanical clamping only. In this respect, respective counter mounts 1 and spring elements 2 may be previously punched out from the holder material, and adapted, by bending, to the chip dimensions, the spring elements then serving to hold the chip relative to the counter mounts. After mounting and the making of required electrical connections, the holder will be accommodated in a housing, e.g. by encapsulation. <IMAGE>

Description

Die Erfindung betrifft ein Verfahren, bei dem das Halbleiterbauelement (Chip) durch eine mechanische Klemmvorrichtung im Gehäuse gehalten wird.The invention relates to a method in which the semiconductor component (Chip) is held in the housing by a mechanical clamping device.

Bei der Herstellung eines IC′s wird das Halbleiterbauelement (Chip) mit einem Rahmen (Leadframe) oder einem Gehäuseboden verbunden. Hernach wird durch Bonden eine Vielzahl von elektrischen Verbindungen zur Außenwelt hergestellt, und zuletzt wird das Gehäuse verdeckelt bzw. das Leadframe mit Kunststoff ummantelt.In the manufacture of an IC, the semiconductor component (chip) is included connected to a frame (leadframe) or a housing base. After that will by bonding a variety of electrical connections to the outside world manufactured, and finally the housing is capped or the lead frame covered with plastic.

Für die Verbindung des Chips auf Gehäuseboden oder Leadframe (im folgen­ den kurz Träger genannt) stehen bekannte Verfahren wie das Kleben, das eutektische Bonden und das Löten zur Verfügung.For connecting the chip to the case bottom or lead frame (in the following known as the carrier) are known methods such as gluing eutectic bonding and soldering are available.

Beim Kleben wird ein pastöser Kleber auf den Träger aufgebracht oder es wird eine Klebefolie (Preform) auf den Träger gelegt; anschließend wird der Chip auf den Kleber gelegt bzw. in den Kleber eingedrückt. Die Kle­ ber können hierbei elektrisch leitende oder dielektrisch-isolierende Ei­ genschaften haben. Durch eine anschließende Wärmebehandlung bei ca. 120°C über ca. 30 Minuten hinweg wird der Kleber ausgehärtet und der Chip mit dem Träger verbunden.When gluing, a pasty adhesive is applied to the carrier or it an adhesive film (preform) is placed on the carrier; then will the chip is placed on the adhesive or pressed into the adhesive. The Kle In this case, electrically conductive or dielectric-insulating egg have properties. Subsequent heat treatment at approx. 120 ° C The adhesive and the chip are cured over about 30 minutes connected to the carrier.

Beim eutektischen Bonden wird der Chip bei ca. 400°C auf den goldbe­ schichteten Träger gedrückt und lateral bewegt, bis das Si/Au-Eutektikum den Chip mit dem Träger verbindet. Gegebenenfalls finden auch Goldpre­ forms zwischen Träger und Chip Verwendung.With eutectic bonding, the chip is placed on the gold at approx. 400 ° C stratified carrier pressed and moved laterally until the Si / Au eutectic connects the chip to the carrier. If necessary, also find gold price forms between carrier and chip use.

Beim Löten wird ein niedrig schmelzendes Metallot, meist als Preform, verwendet, um den Chip auf den Träger zu befestigen. Dabei ist ggf. auch die Verwendung von Flußmittel erforderlich.When soldering, a low-melting metal solder, usually as a preform, used to attach the chip to the carrier. This may also include the use of flux is required.

Die bekannten Verfahren haben insbesondere die Nachteile, daß eine ther­ mische Behandlung des Zwischenproduktes nötig ist. Unterschiedliche Aus­ dehnungskoeffizienten zwischen Träger, Chip und Verbindungsschicht er­ zeugen des weiteren thermomechanischen Streß im Chip.The known methods have the particular disadvantages that a ther mixing treatment of the intermediate is necessary. Different out  expansion coefficient between carrier, chip and connection layer testify further thermomechanical stress in the chip.

Beim mechanischen Klemmen des Chips auf den Träger wird zunächst der Träger passend zur Chiparchitektur gestanzt und gebogen.When the chip is mechanically clamped onto the carrier, the Carrier punched and bent to match the chip architecture.

Fig. 1 zeigt beispielhaft einen vertikalen Schnitt durch den relevanten Teil des Leadframes, wobei 1 das Gegenlager des Chips und 2 das Feder­ element darstellt. Fig. 1 shows an example of a vertical section through the relevant part of the lead frame, 1 representing the counter bearing of the chip and 2 the spring element.

Mittels eines Automaten werden die Federelemente 2 aufgebogen und ent­ sprechend der Fig. 2 der Chip 3 in Pfeilrichtung eingesetzt. Nach Schließen der Federn ist der Chip eingespannt und gleichzeitig justiert.By means of an automatic machine, the spring elements 2 are bent up and accordingly the chip 3 used in FIG. 2 in the direction of the arrow. After closing the springs, the chip is clamped and adjusted at the same time.

Fig. 3 zeigt die Aufsicht auf den relevanten Teil des Leadframes, wobei nun die Bondpads 4 und die Kontaktstege 5 durch Bonden elektrisch mit­ einander verbunden werden. Danach kann die Verkapselung erfolgen. Fig. 3 shows the top view of the relevant part of the leadframe, where now the bonding pads 4 and the contact webs 5 are connected electrically by bonding with each other. The encapsulation can then take place.

Das Verfahren des Klemmens hat eine Reihe von Vorteilen gegenüber den bekannten Verfahren: Die Verbindung von Chip und Träger ist praktisch thermostreßfrei; die Verwendung von Hilfsmitteln, wie Kleber oder Pre­ form, entfällt und somit treten auch keine Lösemitteldämpfe oder Fluß­ mittelrückstände in Erscheinung; eine Temperaturbehandlung von Chip und Träger ist ebenfalls nicht erforderlich.The method of clamping has a number of advantages over that known methods: The connection of chip and carrier is practical thermal stress free; the use of tools such as glue or pre shape, omitted and therefore no solvent vapors or flow medium residues in appearance; a temperature treatment of chip and Carrier is also not required.

Das Verfahren eignet sich insbesondere für Halbleiterchips, die auf me­ chanische Kräfte und Spannungen, verursacht durch Temperaturwechsel, be­ sonders empfindlich reagieren, wie z. B. Drucksensoren und Beschleuni­ gungssensoren. Aber auch andere Halbleiterchips der Nachrichtentechnik können mit diesem Verfahren, insbesondere bei großen Stückzahlen, ko­ stengünstig montiert werden.The method is particularly suitable for semiconductor chips based on me chanic forces and tensions caused by temperature changes, be react particularly sensitive, such as B. Pressure sensors and accelerators sensors. But also other semiconductor chips in communications technology can with this method, especially with large quantities, ko be installed at low cost.

Claims (10)

1. Verfahren zur Montage von Halbleiterbauelementen in Gehäusen, dadurch gekennzeichnet, daß das Halbleiterbauelement mit einer Klemm­ einrichtung befestigt wird.1. A method for mounting semiconductor components in housings, characterized in that the semiconductor component is fastened with a clamping device. 2. Verfahren nach Anspruch 1, dadurch gekennzeichnet, daß die Ver­ bindung von Chip und Klemmeinrichtung elektrisch leitend ist.2. The method according to claim 1, characterized in that the Ver Binding of chip and clamping device is electrically conductive. 3. Verfahren nach einem der vorhergehenden Ansprüche, dadurch ge­ kennzeichnet, daß die Verbindung von Chip und Klemmeinrichtung dielek­ trisch isolierend ist.3. The method according to any one of the preceding claims, characterized ge indicates that the connection of chip and clamping device dielek is tric isolating. 4. Verfahren nach einem der vorhergehenden Ansprüche, dadurch ge­ kennzeichnet, daß das Halbleiterbauelement kraftfrei in die Klemmein­ richtung eingesetzt wird.4. The method according to any one of the preceding claims, characterized ge indicates that the semiconductor component is force-free in the clamping direction is used. 5. Verfahren nach einem der vorhergehenden Ansprüche, dadurch ge­ kennzeichnet, daß die Kanten des Halbleiterbauelementes abgerundet oder abgeschrägt sind.5. The method according to any one of the preceding claims, characterized ge indicates that the edges of the semiconductor component are rounded or are beveled. 6. Verfahren nach einem der vorhergehenden Ansprüche, dadurch ge­ kennzeichnet, daß die Klemmeinrichtung Bestandteil des Gehäusebodens oder des Rahmens (Leadframe) ist.6. The method according to any one of the preceding claims, characterized ge indicates that the clamping device is part of the housing base or the frame (lead frame). 7. Verfahren nach einem der vorhergehenden Ansprüche, dadurch ge­ kennzeichnet, daß die Klemmeinrichtung aus Metall, Glas, Keramik oder Kunststoff gefertigt ist. 7. The method according to any one of the preceding claims, characterized ge indicates that the clamping device made of metal, glass, ceramic or Plastic is made.   8. Verfahren nach einem der vorhergehenden Ansprüche, dadurch ge­ kennzeichnet, daß mit der Klemmeinrichtung eine Positionierung des Halbleiterbauelementes bewirkt wird.8. The method according to any one of the preceding claims, characterized ge indicates that with the clamping device a positioning of the Semiconductor component is effected. 9. Verfahren nach einem der vorhergehenden Ansprüche, dadurch ge­ kennzeichnet, daß die Klemmeinrichtung aus zwei separaten Teilen be­ steht, die nach Einlegen des Halbleiterbauelements gefügt werden.9. The method according to any one of the preceding claims, characterized ge indicates that the clamping device be made of two separate parts stands, which are added after inserting the semiconductor component. 10. Verfahren nach Anspruch 9, dadurch gekennzeichnet, daß die Fü­ gung der Klemmeinrichtung wieder zerstörungsfrei lösbar ist.10. The method according to claim 9, characterized in that the Fü supply of the clamping device can be released again without being destroyed.
DE4242566A 1992-12-16 1992-12-16 Process for mounting semiconductor components in housings by mechanical clamping Ceased DE4242566A1 (en)

Priority Applications (4)

Application Number Priority Date Filing Date Title
DE4242566A DE4242566A1 (en) 1992-12-16 1992-12-16 Process for mounting semiconductor components in housings by mechanical clamping
JP5310808A JPH06283640A (en) 1992-12-16 1993-12-10 Method for mounting semiconductor element in casing with mechanical clip
FR9314928A FR2699328A1 (en) 1992-12-16 1993-12-13 Method for mounting semiconductor components in mechanical lock housings
GB9325637A GB2274021A (en) 1992-12-16 1993-12-15 A Method of mounting a semi-conductor chip in a holder by mechanical clamping

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
DE4242566A DE4242566A1 (en) 1992-12-16 1992-12-16 Process for mounting semiconductor components in housings by mechanical clamping

Publications (1)

Publication Number Publication Date
DE4242566A1 true DE4242566A1 (en) 1994-06-23

Family

ID=6475504

Family Applications (1)

Application Number Title Priority Date Filing Date
DE4242566A Ceased DE4242566A1 (en) 1992-12-16 1992-12-16 Process for mounting semiconductor components in housings by mechanical clamping

Country Status (4)

Country Link
JP (1) JPH06283640A (en)
DE (1) DE4242566A1 (en)
FR (1) FR2699328A1 (en)
GB (1) GB2274021A (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2004096513A2 (en) * 2003-04-29 2004-11-11 W.C. Heraeus Gmbh Metal-plastic composite component and methods for the production thereof
DE102014216770A1 (en) * 2014-08-22 2016-02-25 Zf Friedrichshafen Ag Sensor module assembly

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7645639B2 (en) 2004-08-26 2010-01-12 Infineon Technologies Ag Packaging of integrated circuits to lead frames

Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE3636373A1 (en) * 1986-10-25 1988-05-05 Heraeus Gmbh W C Connecting clip, method of producing a connecting clip and use of two connecting clips as connecting lugs for a varistor
DE3701310A1 (en) * 1987-01-17 1988-07-28 Bodenseewerk Geraetetech Contact-making device for making contact with surface-mounted integrated circuits
US4870224A (en) * 1988-07-01 1989-09-26 Intel Corporation Integrated circuit package for surface mount technology
DE3924823A1 (en) * 1989-07-27 1991-02-21 Telefunken Electronic Gmbh Semiconductor module with several semiconductors on basic substrate - has cover substrate for all semiconductors with conductive track configuration with terminal face(s)

Family Cites Families (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS60195943A (en) * 1984-03-19 1985-10-04 Hitachi Ltd Semiconductor device
US4816427A (en) * 1986-09-02 1989-03-28 Dennis Richard K Process for connecting lead frame to semiconductor device
US4766478A (en) * 1986-09-02 1988-08-23 Dennis Richard K Lead frame for semi-conductor device and process of connecting same
US4999740A (en) * 1989-03-06 1991-03-12 Allied-Signal Inc. Electronic device for managing and dissipating heat and for improving inspection and repair, and method of manufacture thereof
US4972294A (en) * 1989-04-03 1990-11-20 Motorola, Inc. Heat sink clip assembly
JPH02268459A (en) * 1989-04-10 1990-11-02 Nec Corp Semiconductor package
US5057901A (en) * 1989-09-27 1991-10-15 Die Tech, Inc. Lead frame for semi-conductor device
JPH0437160A (en) * 1990-06-01 1992-02-07 Hitachi Ltd Lead frame and assembly method of semiconductor device which uses lead frame

Patent Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE3636373A1 (en) * 1986-10-25 1988-05-05 Heraeus Gmbh W C Connecting clip, method of producing a connecting clip and use of two connecting clips as connecting lugs for a varistor
DE3701310A1 (en) * 1987-01-17 1988-07-28 Bodenseewerk Geraetetech Contact-making device for making contact with surface-mounted integrated circuits
US4870224A (en) * 1988-07-01 1989-09-26 Intel Corporation Integrated circuit package for surface mount technology
DE3924823A1 (en) * 1989-07-27 1991-02-21 Telefunken Electronic Gmbh Semiconductor module with several semiconductors on basic substrate - has cover substrate for all semiconductors with conductive track configuration with terminal face(s)

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2004096513A2 (en) * 2003-04-29 2004-11-11 W.C. Heraeus Gmbh Metal-plastic composite component and methods for the production thereof
WO2004096513A3 (en) * 2003-04-29 2005-07-28 Heraeus Gmbh W C Metal-plastic composite component and methods for the production thereof
DE102014216770A1 (en) * 2014-08-22 2016-02-25 Zf Friedrichshafen Ag Sensor module assembly

Also Published As

Publication number Publication date
FR2699328A1 (en) 1994-06-17
GB2274021A (en) 1994-07-06
GB9325637D0 (en) 1994-02-16
JPH06283640A (en) 1994-10-07

Similar Documents

Publication Publication Date Title
DE3414961C2 (en)
DE69920606T2 (en) An assembly of bonded dense wafers forming a structure with a vacuum chamber and methods of making same
EP1602625A1 (en) Semiconductor module with a semiconductor sensor and a plastic package and its method of fabrication.
EP0646971B1 (en) Two-terminal SMT-miniature-housing of semiconductor device and process of manufacturing the same
DE1260034B (en) A method of manufacturing a sealing frame for encapsulating a semiconductor device
KR950024315A (en) Lead frame for semiconductor and manufacturing method
DE4242566A1 (en) Process for mounting semiconductor components in housings by mechanical clamping
DE102010029550A1 (en) Method for the production of semiconductor devices and corresponding semiconductor device
DE112005003629T5 (en) IC package and method of manufacturing an IC package
DE10345377B4 (en) Semiconductor module and method for producing a semiconductor module
DE10058593A1 (en) Packaged electronic component and method for packaging an electronic component
EP0185244A1 (en) Electrical power component
DE112006003866B4 (en) A reduced voltage electronic multi-chip package and method of making the same
DE19531970A1 (en) Method for producing a connection between at least two electrical conductors, one of which is arranged on a carrier substrate
DE69534936T2 (en) Method for connecting integrated circuit chips to substrates
DE10120928C1 (en) Production of contact joint between semiconductor chip and substrate comprises applying hardenable conducting adhesive on contact surfaces of substrate and chip, joining, and hardening adhesive to form contact joint
EP0691626A2 (en) Data carrier comprising an integrated circuit module
DE10133361C2 (en) Process for the production of packaging for semiconductor chips
DE102004031318A1 (en) Premold housing for receiving a component, useful particularly for preparing microelectronic or sensor modules, comprises housing body and metal lead frame
DE19917438A1 (en) Circuit arrangement for e.g. image sensor comprises carrier plate with contacts connected to image sensor via flip-chip mounting
DE102018216282A1 (en) Method of manufacturing a MEMS sensor
DE4231705C2 (en) Semiconductor device with a system carrier and an associated semiconductor chip and method for their production
DE10243947B4 (en) Electronic component with at least one semiconductor chip and method for its production
DE102010041261A1 (en) Flip-chip arrangement with a cooling element and method for producing a flip-chip arrangement
DE19816309B4 (en) Method for direct mounting of silicon sensors and sensors manufactured thereafter

Legal Events

Date Code Title Description
OP8 Request for examination as to paragraph 44 patent law
8127 New person/name/address of the applicant

Owner name: TEMIC TELEFUNKEN MICROELECTRONIC GMBH, 74072 HEILB

8131 Rejection