JPH06276396A - Decoder and device in common use for coding and decoding - Google Patents

Abstract

PURPOSE:To test the decoding processing in a state close to the real operation by using a counter to be sharing at the time of decoding and at the time of test and performing an output of a comparator synchronously with a run length detection timing in the case of a rest request. CONSTITUTION:A color fed from a decoding section 2 is latched in a latch 3a, a run length is latched in a counter 4 and a shift register 5 receiving an output of the latch 3a is shifted by a value set to the counter 4. Thus, the content of the register 5 is outputted to an output section 6 for each shift. Upon a test request, the counter 4 is cleared to input coded picture information to an input section 1. Then the counter 4 does not latch the run length and counts up an output of the run length from the decoding section 2 once per twice and the value is coincident with an output run length from the decoding section 2. Thus, an error in a table and decoding processing is tested by providing an output of the comparator 7 for each run length output of the decoding section 2.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a decoding device and an encoding / coding device.
The present invention relates to a decoding / combining device, and more specifically, it can be applied to a test technique for an encoding process and a decoding process using a table of a facsimile device. In particular, the table can be displayed without increasing the output amount at the time of the test. The present invention relates to a decoding device and a combined encoding / decoding device capable of testing the used decoding process and encoding process in a state close to actual operation.

[0002]

2. Description of the Related Art Generally, as a compression encoding method of image information in a facsimile, MH (Modified Huf) specified by an international standard is intended to ensure communication and compatibility.
fman), MR (Modified Relative Element adress desi
gnate) and MMR (Modified MR) coding systems are widely used. In these encoding methods, image information is a two-dimensional code representing a code indicating a white run length, a code indicating a black run length, and a correspondence between a white / black change point and a white / black change point on a reference line. Expressed in combination with the code that indicates the activation mode. In particular, the code indicating the white run length and the code indicating the black run length have a code system as shown in the terminating code of FIG. 6, and are used in any deviation of the above-mentioned encoding method.

By the way, in recent years, as the communication speed between facsimile terminals such as ISDN has been improved and the functions such as dual access have been upgraded, the speed of compression encoding of image information and decoding / reproduction of compression encoded image information has been improved. There is an increasing demand for the above, and therefore, the LSI of the compression encoding / decoding / reproducing apparatus has been promoted. However, encoding
When the decoding device is integrated into an LSI, appearance of defects in the LSI manufacturing process is unavoidable, and it is necessary to test whether or not the circuit inside the LSI operates properly in order to remove them. It is desirable that this test be performed on all circuits incorporated in the LSI, and that it is a test that encourages the actual operation of the LSI.

Conventionally, for example, Japanese Patent Laid-Open No. 21897/1990.
In the test facilitation circuit reported in Japanese Patent Publication No. 5, a test control circuit is added to the control unit of each functional element, and in the test mode, the operation result of the functional element alone is output and compared with the expected value. ing.

[0005]

However, in the conventional encoding / decoding apparatus as described above, it is necessary to incorporate a table corresponding to the code table of FIG. 6, and all the codes in this table must be stored. There was a problem that it was very difficult to urge the test to the actual operation. For example, in order to test the decoding operation for 2560 codes, it is necessary to obtain an output of 2560 pixels. If such a test is carried out for all codes, a huge amount of test is required and the test time is huge. It takes a very long time and is very difficult.

In order to solve this, a method of incorporating a test circuit in the LSI can be considered, and an easy method is as follows.
It is conceivable to provide a test input / output terminal on the LSI to directly access and output the table. However, this method increases the number of test terminals and only tests the table itself. There is an inconvenience that the test for the encoding process and the decoding process cannot be performed in a state close to the actual operation.

Therefore, the present invention is a decoding device and an encoding / decoding device that can test a decoding process and an encoding process using a table in a state close to actual operation without increasing the output amount at the time of testing. It is intended to provide a combined use device.

[0008]

The invention according to claim 1 is
In a decoding device for MH (Modified Huffman) coded image information, a counter used both for decoding and for testing,
It is characterized in that it has a comparator for comparing the output of the counter and the run length after decoding, and a control unit for controlling the output of the comparator in synchronization with the run length detection timing at the time of a test request. .

The invention according to claim 2 is characterized in that, in the invention according to claim 1, there is provided an output section for outputting the output of the comparator as reproduced image information when a test request is made. . The invention according to claim 3 is MH (Mo
dified Huffman) In a device for both encoding and decoding of codes, a counter that is used for both encoding and testing,
It has a comparator for comparing the output of the counter and the run length after decoding, and a control unit for controlling the output of the comparator in synchronization with the run length detection timing at the time of a test request. Is.

The invention according to claim 4 is characterized in that, in the invention according to claim 3, there is an output section for outputting the output of the comparator as reproduced image information when a test request is made. .

[0011]

In the conventional Japanese Unexamined Patent Publication No. 2-218975, a test control circuit is added to the control unit of each functional element, and in the test mode, the operation result of the functional element alone is output and compared with the expected value. However, in the present invention, a value corresponding to the expected value is created inside the LSI, and the comparison result of the value and the output value of the functional element to be tested is output to the outside, so that In addition to reducing the amount of output, by providing the test control circuit in a circuit (counter) separate from the functional element to be tested, the test control circuit can be tested by operating the functional element to be tested normally. can do. Hereinafter, the operation of the present invention will be described for each claim.

According to the first aspect of the present invention, in the decoding device for MH coded image information, a counter which is used both for decoding and for testing is used, and the output of this counter and the run length after decoding are compared by a comparator. When the test request is issued, the control section can appropriately control so that the comparator output is performed in synchronization with the run length detection timing. For this reason, the MH code table and the decoding process using the table can be tested in a state close to the actual operation by slightly adding a circuit without increasing the output amount at the time of the test.

According to the invention described in claim 2, in the invention described in claim 1, when there is a test request, the output of the comparator can be output at the output section as reproduced image information. Therefore, the effect of the invention described in claim 1 can be efficiently obtained without increasing the number of input / output terminals. According to the third aspect of the present invention, in the combined MH code encoding / decoding device, a counter that is used both for decoding and for testing is used, and the output of this counter and the run length after decoding are compared by a comparator, When a test request is issued, the control section can appropriately control so that the comparator output is performed in synchronization with the run length detection timing. For this reason, the MH code table and the decoding process using the table can be tested in a state close to the actual operation by slightly adding a circuit without increasing the output amount at the time of the test, and the table and the code of the encoding unit can be tested. It can also be used as a test for chemical processing.

According to the invention described in claim 4, in the invention described in claim 3, when there is a test request, the output of the comparator can be output as reproduction image information at the output section. Therefore, the effect of the invention described in claim 3 can be efficiently obtained without increasing the number of input / output terminals.

[0015]

Embodiments of the present invention will be described below with reference to the drawings. (Embodiment 1) FIG. 1 is a block diagram showing the configuration of a decoding device according to Embodiment 1 of the present invention (claim 1). This Figure 1
The decoding / reproducing operation will be described below. First, the coded image information supplied from the coded image information input unit 1 is divided into code units by the decoding unit 2 and compared with the above-described table of FIG. 6 to be decoded into color and run length forms. Next, in the image reproducing unit, the color supplied from the decoding unit 2 is latched in the latch 3a, the run length is latched in the counter 4, and the shift register 5 having the output of the latch 3a as an input is set in the counter 4. Shift by the value.
In this way, the image is reproduced by the number of pixels of the run length, and the reproduced image is output by outputting the value of the shift register 5 to the output unit 6 for each fixed amount of shift of the shift register 5. The comparator 7 compares the output of the counter 4 with the run length after signing, latches the compared value in the latch 3b, and then outputs the value of the latch 3b to the output unit 6.

When there is a test request, the counter 4 is cleared first, and the coded image information input unit 1 receives white run length 0, black run length 0, white run length 1, black run length 1, white run. Length 2 ... White run length 63
Like black run length 63, white and black each start with an image of 0 run length, and each combination of images increases by 1 pixel in sequence, and a code for an image of a combination of 63 run lengths Enter the transformation information. Therefore, the run length output from the decoding unit 2 is 0 to 63.
Is output twice each. Therefore, the counter 4 does not latch the run-length value, but controls the counter to count up the run-length output from the decoding unit 2 at a rate of once every two times. It matches the output run length value. Therefore, by outputting the value of the comparator 7 for each run length output of the decoding unit 2, it is tested whether or not there is an error in the table and the decoding process of the decoding unit 2.

Here, the decoding unit 2 in the test mode
The control flow of the counter 4 and the comparator 7 is shown in the flow chart of FIG.
It will be explained using a table. First, if there is a test request,
Clear Unta 4 (Process S₂), Enter the test pattern
Force to perform the decoding process (process S₂, S₃). Recovery process
After that, the comparison result of the counter 4 and the decoding result is output (process S
_Four, S_Five), The decryption process is performed again (process S)₆). Decryption process
After that, the comparison result between the counter 4 and the decoding result is output (processing
S₈), When all the test patterns are decoded (process S
₉), End the test, and then merge all test patterns
If processing is not completed, the counter 4
(Process S_Ten), Process S₃Return to the same as above
Perform processing.

As described above, in this embodiment, in the decoding apparatus for MH encoded image information, the counter 4 which is used both for decoding and for testing is used, and the output of this counter 4 and the run length after decoding are compared. When the comparison is performed in step 7 and a test request is made, the control is appropriately performed so that the comparator 7 outputs in synchronization with the run length detection timing. For this reason, the MH code table and the decoding process using the table can be tested in a state close to the actual operation by slightly adding a circuit without increasing the output amount at the time of the test. (Embodiment 2) FIG. 3 is a block diagram showing a configuration of a decoding device according to Embodiment 2 of the present invention (claim 2). In this embodiment, the characteristic part corresponding to claim 2 will be specifically described.
The control of the decoding unit 2, the counter 4, and the comparator 7 in FIG. In FIG. 3, the same reference numerals as those in FIG. 1 indicate the same or corresponding portions, and 11 indicates the value of the latch 3a for latching the color supplied from the decoding unit 2 and the output of the counter 4 and the run after decoding. It is a selector to which the value of the latch 3b into which the value obtained by comparing the length with the comparator 7 is latched is input. In this embodiment,
When there is a test request, the comparison result of the selector 11 is input to the shift register 5, and the shift register 5 reproduces the test result by controlling to shift in synchronization with the run length output timing of the decoding unit 2. The image is imitated and output.

As described above, in this embodiment, when the test is requested, the output of the comparator 7 is output as the reproduced image information. Therefore, the effect of the first embodiment can be efficiently obtained without increasing the number of input / output terminals. (Embodiment 3) FIG. 4 is a block diagram showing the structure of a combined encoding / decoding device according to Embodiment 3 of the present invention (claim 3). 4, the same reference numerals as those in FIG. 3 indicate the same or corresponding parts. The value of the counter 4 and the decoded run length are input to the comparator 7 as in the first embodiment, and the value of the counter 23 is further input. The comparison result of the comparator 7 is Similar to the first embodiment, it is input to the latch 3b and further input to the output unit 6. In this embodiment, the decoding operation is the same as that in the first embodiment, and therefore the description thereof is omitted, and the encoding operation will be specifically described. First, the image information input section 21
When the image information is given to the changing point detecting unit 22, the number of pixels until the changing point is detected is counted by the counter 23, and the color at that time is stored in the latch 24. Next, when a change point is detected, the color at that time and the value of the counter 23 are given to the encoding unit 25, and the encoding unit 25 encodes based on the table of FIG. 6 and outputs the result. ,
Image information is encoded. When a test request is made, the test result of the decoding unit 2 is obtained by controlling the count-up of the counter 23 in the same manner as in the first embodiment, and the test of the encoding unit 25 is performed without inputting image information. You can get the output.

As described above, in this embodiment, in the combined MH code encoding / decoding device, the counter 4 which is used both for decoding and for testing is used, and the output of this counter 4 and the run length after decoding are used. When the comparator 7 compares and requests a test, the comparator 7 is appropriately controlled so as to output the comparator 7 in synchronization with the run length detection timing.
For this reason, the MH code table and the decoding process using the table can be tested in a state close to the actual operation by slightly adding a circuit without increasing the output amount at the time of the test, and the table of the encoding unit 25 and It can also be used for testing the encoding process. (Embodiment 4) FIG. 4 is a block diagram showing the structure of an encoding / decoding device according to Embodiment 4 of the present invention (claim 4).
In the present embodiment, the characteristic portion corresponding to claim 4 will be specifically described, and the control of the decoding unit 2, the counter 4, and the comparator 7 in FIG. 4, the same reference numerals as those in FIG. 3 indicate the same or corresponding portions, and 11a is a latch 3 for latching the color supplied from the merging unit 2.
It is a selector to which the value of a is input and the value of the latch 3b into which the value obtained by comparing the outputs of the counters 4 and 23 and the decoded run length by the comparator 7 is input. In this embodiment, when there is a test request, the selector
The comparison result at 11 is input to the shift register 5, and the shift register 5 outputs the test result while imitating the reproduced image by controlling so as to shift in synchronization with the run length output timing of the decoding unit 2. To do.

As described above, in this embodiment, when the test is requested, the output of the comparator 7 is output as the reproduced image information. Therefore, the effect of the third embodiment can be efficiently obtained without increasing the number of input / output terminals.

[0022]

According to the present invention, there is an effect that the decoding process and the encoding process using the table can be tested in a state close to the actual operation without increasing the output amount at the time of the test.

[Brief description of drawings]

FIG. 1 is a block diagram showing a configuration of a decoding device according to a first embodiment of the present invention.

FIG. 2 is a flowchart showing a control flow of the decoding unit, the counter, and the comparator in the test mode according to the first embodiment of the present invention.

FIG. 3 is a block diagram showing a configuration of a decoding device according to a second embodiment of the present invention.

FIG. 4 is a block diagram showing a configuration of a combined encoding / decoding device according to a third embodiment of the present invention.

FIG. 5 is a block diagram showing the configuration of a combined encoding / decoding device according to a fourth embodiment of the present invention.

FIG. 6 is a diagram showing a terminating code.

[Explanation of symbols]

 1 coded image information input unit 2 decoding unit 3a, 3b, 24 latch 4, 23 counter 5 shift register 6 output unit 7 comparator 11 selector 21 image information input unit 22 change point detection unit 25 coding unit

Claims (4)

[Claims] 1. A decoding device for MH (Modified Huffman) coded image information, a counter used for both decoding and testing, a comparator for comparing the output of the counter and the decoded run length, and a test. And a control unit that controls the output of the comparator in synchronization with the run length detection timing when requested. 2. The decoding apparatus according to claim 1, further comprising an output unit for outputting the output of the comparator as reproduced image information when a test request is made. 3. Encoding of MH (Modified Huffman) code
In a decoding / combining device, a counter used for both encoding and testing, a comparator for comparing the output of the counter with the run length after decoding, and the comparison in synchronization with the run length detection timing when a test is requested. And an encoding / decoding device having a control unit for controlling so as to perform a digital output. 4. The combined encoding / decoding apparatus according to claim 3, further comprising an output unit for outputting the output of the comparator as reproduced image information when a test request is made.