JPH062711U - Resin-sealed semiconductor device - Google Patents

Resin-sealed semiconductor device

Info

Publication number
JPH062711U
JPH062711U JP4482192U JP4482192U JPH062711U JP H062711 U JPH062711 U JP H062711U JP 4482192 U JP4482192 U JP 4482192U JP 4482192 U JP4482192 U JP 4482192U JP H062711 U JPH062711 U JP H062711U
Authority
JP
Japan
Prior art keywords
resin
semiconductor device
leads
bending
lead
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP4482192U
Other languages
Japanese (ja)
Inventor
英二 萩本
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp filed Critical NEC Corp
Priority to JP4482192U priority Critical patent/JPH062711U/en
Publication of JPH062711U publication Critical patent/JPH062711U/en
Pending legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481Disposition
    • H01L2224/48151Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48245Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481Disposition
    • H01L2224/48151Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48245Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
    • H01L2224/48247Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item

Landscapes

  • Wire Bonding (AREA)
  • Lead Frames For Integrated Circuits (AREA)

Abstract

(57)【要約】 【目的】 樹脂封止型半導体装置におけるリードフレー
ムの内部リードのふらつきによるショート等の不良を防
止する。 【構成】 内部リード1の一部に曲げ加工部2を設け
る。これにより、細長い内部リードの左右方向の曲げ剛
性が向上し、内部リードのふらつきが減少し、内部リー
ド間で接触すること等によるショート等を防止できる。
(57) [Abstract] [Purpose] To prevent defects such as short circuits due to fluctuations in the internal leads of the lead frame in a resin-sealed semiconductor device. [Structure] A bending portion 2 is provided on a part of the inner lead 1. As a result, the bending rigidity of the elongated inner leads in the left-right direction is improved, fluctuation of the inner leads is reduced, and it is possible to prevent a short circuit or the like due to contact between the inner leads.

Description

【考案の詳細な説明】[Detailed description of the device]

【0001】[0001]

【産業上の利用分野】[Industrial applications]

本考案は樹脂封止型半導体装置の構造に関し、特にリードフレームに設けた内 部リードが細長い場合に効果の大きい構造に関する。 The present invention relates to a structure of a resin-encapsulated semiconductor device, and more particularly to a structure having a great effect when an inner lead provided in a lead frame is elongated.

【0002】[0002]

【従来の技術】[Prior art]

従来、半導体装置用リードフレームはプレス法又はエッチング法によって作ら れている。プレス法は製造コストが低く、大量生産するリードフレーム用の製造 方法として多用されている。 Conventionally, a lead frame for a semiconductor device is manufactured by a pressing method or an etching method. The pressing method has a low manufacturing cost and is widely used as a manufacturing method for mass-produced lead frames.

【0003】 半導体チップの製造技術が進歩してチップの配線ルールが1ミクロンを下回る ようになると、その機能を満たす素子(チップ)サイズは小さくても良く、チッ プとリードフレームの内部リードとを結線するボンディングワイヤが接着される ボンディングパッドのピッチをつめないと、チップサイズを縮小して歩留りを向 上させるダウンサイジングの効果は十分に得られなくなってきた。これに対応す るリードフレームの内部リードは狭ピッチを実現しなければならなくなり、細長 くならざるを得なくなってきた。As the semiconductor chip manufacturing technology advances and the chip wiring rule falls below 1 micron, the element (chip) size that fulfills the function may be small, and the chip and the internal lead of the lead frame may be separated. If the pitch of the bonding pads to which the bonding wires to be connected are bonded is not reduced, the downsizing effect of reducing the chip size and improving the yield has become insufficient. Corresponding to this, the inner lead of the lead frame has to be made narrower and narrower.

【0004】[0004]

【考案が解決しようとする課題】[Problems to be solved by the device]

かかる内部リードの構造は横(左右)方向に変形しやすく、ハンドリング中に 変形し、内部リード間の絶縁間隔を維持することが困難になってきた。このこと は、近年の多ピン化にあってリードフレームの板厚が薄くなり、また材料が鉄ニ ッケル合金から銅合金になってくると顕著となる。 The structure of the inner lead is easily deformed in the lateral (left and right) direction, and is deformed during handling, making it difficult to maintain the insulation distance between the inner leads. This becomes remarkable when the thickness of the lead frame becomes thin due to the increase in the number of pins in recent years, and when the material is changed from the iron nickel alloy to the copper alloy.

【0005】 特に樹脂封止の際に充填される樹脂によって内部リードの変形が生じやすくな り、内部リード間でショートを引き起こすばかりでなく、内部リード先端部にボ ンディングされたワイヤの変形をも誘発してショート,エッジタッチ等を生じ、 品質上問題となる。Particularly, the resin filled at the time of resin sealing easily deforms the internal leads, which not only causes a short circuit between the internal leads but also deforms the wire bonded to the tips of the internal leads. It causes a short circuit, an edge touch, etc., which causes quality problems.

【0006】 本考案の目的は、細長い内部リードであっても横ぶれ(左右方向)変形を起こ しにくい構造の樹脂封止型半導体装置を提供することにある。An object of the present invention is to provide a resin-sealed semiconductor device having a structure in which lateral slant (horizontal direction) deformation is unlikely to occur even with an elongated inner lead.

【0007】[0007]

【課題を解決するための手段】[Means for Solving the Problems]

前記目的を達成するため、本考案に係る樹脂封止型半導体装置は、リードフレ ームのアイランド上の素子と、アイランド周囲に配置した複数の内部リードとが ボンディングワイヤで結線され、その周囲が樹脂により機密封止される構造の樹 脂封止型半導体装置であって、 前記複数の内部リードのうち全部又は一部の内部リードは、曲げ加工により剛 性を増大させた曲げ加工部を有するものである。 In order to achieve the above-mentioned object, in the resin-sealed semiconductor device according to the present invention, an element on the island of the lead frame and a plurality of internal leads arranged around the island are connected by a bonding wire, and the periphery is surrounded by the resin. A resin-sealed semiconductor device having a structure hermetically sealed by a method, wherein all or some of the plurality of internal leads have a bent portion whose rigidity is increased by bending. Is.

【0008】[0008]

【作用】[Action]

細長い内部リードの一部に曲げ加工を施し、曲げ剛性を向上させることにより 、内部リードのふらつきを減少させる。 By bending a part of the slender inner lead to improve the bending rigidity, the fluctuation of the inner lead is reduced.

【0009】[0009]

【実施例】【Example】

以下、本考案の実施例を図により説明する。図1は、本考案の一実施例を示す 斜視図、図2は、図1の内部リードを示す平面図、図3,図4は、本考案の他の 実施例に係る内部リードを示す平面図、図5〜図7は、アイランドと内部リード との関係を示す図である。 Embodiments of the present invention will be described below with reference to the drawings. 1 is a perspective view showing an embodiment of the present invention, FIG. 2 is a plan view showing an inner lead of FIG. 1, and FIGS. 3 and 4 are planes showing an inner lead according to another embodiment of the present invention. FIGS. 5 to 7 are views showing the relationship between the island and the internal lead.

【0010】 図において、本考案は、リードフレームのアイランド3の半導体チップ(素子 )4と、アイランド3の周囲に配置した複数の内部リード1,1………との間が 図示しないボンディングワイヤにより結線され、その周囲が樹脂により機密封止 される構造の樹脂封止型半導体装置を対象とするものである。In the drawing, the present invention uses a bonding wire (not shown) between a semiconductor chip (element) 4 of an island 3 of a lead frame and a plurality of internal leads 1, 1 ... It is intended for a resin-sealed semiconductor device having a structure in which wires are connected and the periphery thereof is hermetically sealed with resin.

【0011】 このものにおいては、半導体チップ4のサイズが小さくなると、隣接する内部 リード1,1間のピッチが狭くなり、内部リード1が細長く成形されることとな り、その剛性が低下することとなる。In this case, when the size of the semiconductor chip 4 becomes smaller, the pitch between the adjacent inner leads 1 and 1 becomes narrower, and the inner leads 1 are formed elongated and the rigidity thereof decreases. Becomes

【0012】 そこで、本考案は、複数の内部リード1,1……のうち全部又は一部の内部リ ードに、曲げ加工により剛性を増大させた曲げ加工部2を有している。内部リー ド1では、この曲げ加工部2により、曲げモーメントを受ける長さが分割される ため、変位すなわち横方向のふらつきを減少させることができる。Therefore, in the present invention, all or some of the inner leads of the plurality of inner leads 1, 1 ... Have a bending portion 2 whose rigidity is increased by bending. In the inner lead 1, the bending portion 2 divides the length that receives the bending moment, so that the displacement, that is, the lateral fluctuation can be reduced.

【0013】 内部リード1の曲げ加工部2は、図2の場合、内部リード1の長さ方向に2段 に折曲げ方向が異なる曲げ部をもつ段差構造2aを曲げ加工により成形して構成 したものである。In the case of FIG. 2, the bent portion 2 of the inner lead 1 is formed by bending a step structure 2a having two bent portions with different bending directions in the length direction of the inner lead 1. It is a thing.

【0014】 また、図3の場合、曲げ加工部2は、内部リード1の幅方向にチャンネル状の U字型曲げ部をもつ溝構造2bを曲げ加工により成形して構成したものである。Further, in the case of FIG. 3, the bent portion 2 is formed by bending a groove structure 2 b having a channel-shaped U-shaped bent portion in the width direction of the inner lead 1.

【0015】 また、図4の場合、曲げ加工部2は、内部リード1の幅方向の中央部に細長い ディンプル2cを曲げ加工により成形して構成したものである。In addition, in the case of FIG. 4, the bending portion 2 is formed by forming an elongated dimple 2 c in the center portion of the inner lead 1 in the width direction by bending.

【0016】 また、図2に示す曲げ加工部をなす段差構造2aの曲げ方向は、図5に示すよ うに上向きであってもよく、図6に示すように下向きであってもよい。図6の場 合、アイランド3にディンプル加工をしてその高さを内部リード1の先端部の高 さ位置まで低くしてある。また図7に示すように、アイランド3及び内部リード 1にディンプル加工5を施してもよい。Moreover, the bending direction of the step structure 2a forming the bending portion shown in FIG. 2 may be upward as shown in FIG. 5 or downward as shown in FIG. In the case of FIG. 6, the island 3 is dimple-processed and its height is lowered to the height position of the tip portion of the inner lead 1. Further, as shown in FIG. 7, dimple processing 5 may be applied to the island 3 and the inner lead 1.

【0017】[0017]

【考案の効果】[Effect of device]

以上説明したように本考案は、内部リードに曲げ加工を施して剛性を補強した ため、内部リードが細長く成形された場合でも横振れを防止でき、内部リード間 ピッチを狭く設定した場合でも隣接の内部リード間がショートすることがなく、 しかも内部リードにボンディングされたワイヤの変形を誘発することがなく、品 質を向上できる。 As described above, according to the present invention, since the inner leads are bent to reinforce the rigidity, lateral runout can be prevented even when the inner leads are formed elongated, and even if the pitch between the inner leads is set to be narrow, It is possible to improve the quality without causing a short circuit between the inner leads and inducing the deformation of the wire bonded to the inner leads.

【図面の簡単な説明】[Brief description of drawings]

【図1】本考案の一実施例を示す斜視図である。FIG. 1 is a perspective view showing an embodiment of the present invention.

【図2】図1の内部リードを示す平面図である。FIG. 2 is a plan view showing an internal lead of FIG.

【図3】本考案の他の実施例に係る内部リードを示す平
面図である。
FIG. 3 is a plan view showing an inner lead according to another embodiment of the present invention.

【図4】本考案の他の実施例に係る内部リードを示す平
面図である。
FIG. 4 is a plan view showing an inner lead according to another embodiment of the present invention.

【図5】アイランドと内部リードとの関係を示す図であ
る。
FIG. 5 is a diagram showing a relationship between islands and internal leads.

【図6】アイランドと内部リードとの関係を示す図であ
る。
FIG. 6 is a diagram showing a relationship between islands and internal leads.

【図7】アイランドと内部リードとの関係を示す図であ
る。
FIG. 7 is a diagram showing a relationship between islands and internal leads.

【符号の説明】[Explanation of symbols]

1 内部リード 2 曲げ加工部 3 アイランド 4 半導体チップ(素子) 1 Internal lead 2 Bending part 3 Island 4 Semiconductor chip (element)

Claims (1)

【実用新案登録請求の範囲】[Scope of utility model registration request] 【請求項1】 リードフレームのアイランド上の素子
と、アイランド周囲に配置した複数の内部リードとがボ
ンディングワイヤで結線され、その周囲が樹脂により機
密封止される構造の樹脂封止型半導体装置であって、 前記複数の内部リードのうち全部又は一部の内部リード
は、曲げ加工により剛性を増大させた曲げ加工部を有す
ることを特徴とする樹脂封止型半導体装置。
1. A resin-encapsulated semiconductor device having a structure in which an element on an island of a lead frame and a plurality of internal leads arranged around the island are connected by a bonding wire, and the periphery thereof is hermetically sealed with resin. The resin-encapsulated semiconductor device according to claim 1, wherein all or some of the plurality of inner leads have a bending portion whose rigidity is increased by bending.
JP4482192U 1992-06-04 1992-06-04 Resin-sealed semiconductor device Pending JPH062711U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP4482192U JPH062711U (en) 1992-06-04 1992-06-04 Resin-sealed semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP4482192U JPH062711U (en) 1992-06-04 1992-06-04 Resin-sealed semiconductor device

Publications (1)

Publication Number Publication Date
JPH062711U true JPH062711U (en) 1994-01-14

Family

ID=12702118

Family Applications (1)

Application Number Title Priority Date Filing Date
JP4482192U Pending JPH062711U (en) 1992-06-04 1992-06-04 Resin-sealed semiconductor device

Country Status (1)

Country Link
JP (1) JPH062711U (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2020009996A (en) * 2018-07-12 2020-01-16 株式会社三井ハイテック Lead frame and semiconductor device

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2020009996A (en) * 2018-07-12 2020-01-16 株式会社三井ハイテック Lead frame and semiconductor device
CN110718527A (en) * 2018-07-12 2020-01-21 株式会社三井高科技 Lead frame and semiconductor device
CN110718527B (en) * 2018-07-12 2022-07-05 株式会社三井高科技 Lead frame and semiconductor device

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