JPH06268205A - Electrostatic induction type semiconductor device having electrostatic induction main electrode short-circuit structure - Google Patents

Abstract

PURPOSE:To reduce the quantity of turn-OFF leas-out charge by providing an electrostatic induction cathode short-circuit region surrounding by a cathode diffusion layer, in an element structure having distribution type main electrode structure. CONSTITUTION:The diagram mentioned separately is an example in which an electrostatic induction cathode short-circuit structure and an electrostatic anode short-circuit structure are combined. No.6 in the diagram is an n<+> short-circuit layer. As electrostatic effect is utilized in the above-mentioned anode short-circuit structure, it becomes an SI anode short-circuit structure. An n<+> cathode region 11 is divided into small regions, and the cathode short-circuit region, in which electrostatic induction effect is utilized, is arranged in such a manner that it is pinched by the cathode region 11. A potential barrier, when can be controlled by electrostatic effect, is formed on the front of a cathode short-circuit region 15, and the p<+> cathode short-circuit region 15 forms the drain of the hole absorbed to a cathode electrode 7a. As above-mentioned, a turn-OFF time can be reduced and a tail time can be reduced by combining the electrostatic induction cathode short-circuit structure and the SI anode short-circuit structure.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to the field of power semiconductor devices, and in particular, in the turn-off switching performance of static induction type devices, the accumulation time and fall time are shortened, and the amount of charge extracted from the gate electrode is conventionally reduced. In a static induction type semiconductor device having a distributed type main electrode structure, which has a significantly reduced turn-off performance compared with the above, a static induction type main electrode short-circuit structure in which the turn-off extraction charge amount is further reduced. The present invention relates to an electric induction type semiconductor device.

[0002]

2. Description of the Related Art Conventionally, various structural ideas for improving the switching performance of a static induction semiconductor device have been proposed. In order to reduce the input capacitance between the gate and the source or between the gate and the cathode with respect to the static induction transistor or the static induction thyristor having the embedded structure as the first conventional example, the electrons from the source region or the cathode region are reduced. A structure for increasing the injection efficiency has already been disclosed in Japanese Patent Laid-Open No. 1-91474 by Nishizawa and Tamamushi. FIG. 22 is a schematic cross-sectional structure diagram of the first conventional example. In FIG. 22, 1 is an n ⁻ high resistance layer, 3 is an anode region, 4 is a gate region, 5 is a channel region, and 11 is a cathode region.

In the first conventional example, a semiconductor region serving as a cathode or a source is provided only above a channel formed between buried gates, and the capacitance between the gate and the cathode or between the gate and the source is reduced to reduce the channel. The switching speed is improved without reducing the current.

Since the high impurity concentration semiconductor region serving as the cathode region or the source region is arranged only above the channel region formed between the buried gates, the junction capacitance between the gate and the cathode region or the source region is higher than that of the conventional one. Also decreases. Therefore, the time constant consisting of the product of the gate resistance and the junction capacitance becomes smaller than before, and the speed at which the gate-cathode voltage or the gate-source voltage propagates to the gate away from the gate electrode becomes faster than before. As a result, turn-on time and turn-off time are reduced, and high-speed switching is possible.

A second conventional example is shown in FIG. FIG. 23
FIG. 4 is a sectional structural view of an electrostatic induction thyristor invented by Kawamura and Morikawa and disclosed in Japanese Patent Laid-Open No. 4-257266. In FIG. 23, 1 is n ⁻ high resistance layer, 3 is p ⁺
Anode region, 4 is gate region, 6 is n ⁺ shorting layer, 7a
Is a cathode electrode, 7b is a gate electrode, 7c is an anode electrode, 11 is an n ⁺ cathode region, and 13 is a p ⁺ short-circuit layer. The object of the invention shown in FIG. 23 is to provide an SI thyristor having an excellent turn-off characteristic and an excellent current capacity and withstand voltage by improving the cathode area utilization rate of the SI thyristor using a short-circuited cathode structure. .

In an electrostatic induction thyristor having an n ⁺ cathode layer and a p ⁺ short-circuit layer on one main surface of an n ⁻ high resistance layer (n ⁻ base layer), a p ⁺ gate layer is provided in the n ⁻ base layer. The n ⁺ cathode layer is formed at a position facing the channel region between the p ⁺ gate layers, and the p ⁺ short-circuit layer is divided into a plurality of layers. It is formed at a position facing at least a part of the formed p ⁺ gate layer, and has a structure as an electrostatic induction thyristor.

That is, the p ⁺ gate layer 4 of the SI thyristor is formed as a buried structure, the p ⁺ short-circuit layer 13 is formed on the upper surface of the gate layer on the cathode surface of the SI thyristor, and the other region is formed on the n ⁺ cathode layer 11. And Therefore, the region serving as the main current path on the cathode surface is the n ⁺ cathode layer 11
Therefore, the effective area utilization rate is increased.

Further, a third conventional example is shown in FIG. Figure 24
FIG. 3 is a sectional structural view of an example of the electrostatic induction thyristor invented by Muraoka and disclosed in Japanese Patent Laid-Open No. 60-152063. In FIG. 24, 1 is an n ⁻ high resistance layer, 1a is a substrate, and 1b is an epitaxial layer. 3 is the second high concentration layer (p ⁺ anode region), 4 is the gate region,
7a is a cathode electrode, 7b is a gate electrode, 7c is an anode electrode, 11 is a first high-concentration layer (n ⁺ cathode region), 1
Reference numeral 2 is a support electrode, and 14 and 14 'are insulating layers. The above invention reduces the effect of the parasitic bipolar transistor formed in the portion where the p ⁺ buried gate region 4 faces the cathode region and the anode region, prevents re-ignition by the parasitic bipolar transistor, and dv / d immediately after turn-off.
The purpose is to improve t resistance and gate loss at turn-on during high frequency operation.

An object of the third prior art invention is to provide a static induction thyristor having a new structure in which the parasitic effect of the conventional static induction thyristor as described above is eliminated and the manufacturing yield is remarkably improved. It is in.

In order to achieve the above object, according to the invention of the third conventional example, the above-mentioned first high-concentration layer is formed in a direction perpendicular to the one side surface of the semiconductor layer from the buried gate region. In view of this, the region directly above the buried gate region has a shallow junction depth of the first high-concentration layer, and the other semiconductor layers are provided with a deep junction depth of the first high-concentration layer.

[0011] Therefore, the gate loss at turn-on during high frequency operation can be reduced, and the manufacturing yield can be significantly improved.

In practicing the invention of the third conventional example, the second high-concentration layer is further buried by observing the other side surface of the semiconductor layer in a direction perpendicular to the other side surface from the buried gate region. The region directly below the embedded gate region may have a shallow junction depth of the second high-concentration layer, and the semiconductor layer other than this may have a deep junction depth of the second high-concentration layer. With this configuration, turn

Further, in carrying out the invention of the third conventional example, in each of the static induction thyristors having the above-described structure, an insulating film is provided between the region directly below the gate region and the anode electrode. May be. With this configuration, the above-mentioned effects can be further enhanced.

In the structure similar to the second conventional example, however, the inventor of the present invention short-circuits the p ⁺ buried gate region 4 and the p ⁺ short-circuit layer 13 at the time of turn-off, and the extra holes are p ^+.
Since it is injected from the short-circuit layer 13 into the n ⁻ high resistance layer region 1,
We have found a phenomenon that the amount of electric charge extracted from the gate electrode 7b is increased. Therefore, they have found the opposite effect of increasing the turn-off time.

On the other hand, in the first conventional example, the main purpose is to reduce the parasitic capacitance and no reference is made to the arrangement of the cathode electrode. Therefore, the flow of holes at turn-on and the hole flow at turn-off are reduced. The flow is uncertain, and no mention is made of the effect of reducing the amount of hole extraction in the present invention described later. In the third conventional example as well, the main purpose is to reduce the effect of the parasitic bipolar transistor and the parasitic diode, and the movement of holes at turn-on and turn-off is not referred to. The effect of reducing the amount of drawn holes was not found.

Further, the present inventor has found that in the static induction device having the buried gate structure, the buried diffusion layer (p ⁺ gate region) immediately below the region where the n ⁺ cathode region is formed diffuses quickly,
Even if the heat treatment time is the same, a wide area is diffused, while the buried diffusion layer (p ⁺ gate area) immediately below the area where the n ⁺ cathode area is not formed is relatively slow in diffusion.
We found the experimental result that the same heat treatment time does not diffuse into a very wide area. That is, FIG. 25 is a schematic cross-sectional structure diagram for explaining the above situation, in which the p ⁺ buried layer immediately below the n ⁺ cathode region is greatly expanded, while the n ⁺
It schematically shows that the p ⁺ buried layer immediately below the region where the cathode region is not formed has a relatively small spread. It is clear from FIG. 25 that the gate-cathode distance varies depending on the buried layer portion. As a result, the p ⁺ gate region and the n ⁺ region are formed in each segment that constitutes the electrostatic induction thyristor.
⁺ Variation in breakdown voltage between the cathode is also clear that tends to occur. In particular, since p ⁺ gate region immediately under n ⁺ cathode region spreads faster in the direction of the n ⁺ cathode region,
Since the substantial distance between the gate and the cathode is reduced, the breakdown voltage between the gate and the cathode is also determined at this portion. Therefore, it is necessary to accurately grasp the condition setting for obtaining the predetermined withstand voltage, and to suppress the withstand voltage variation within the segment and between the segments.

Also in the above-mentioned conventional examples 1 to 3, no proposal has been made on the cathode layout arrangement pattern for suppressing the variation in breakdown voltage due to the variation in diffusion. The reason therefor is that the cathode region is often formed mainly in the past, and is not formed in a non-uniform or non-uniform manner as a distributed structure as in the present invention.

FIG. 26 is a schematic device cross-sectional structural view and a top view of a unit segment portion of a static induction thyristor having a conventional buried gate structure in which a cathode region is uniformly formed in a longitudinal direction and a transverse direction. .

As is apparent from FIG. 26, the cathode electrode 7a is located above the n ⁺ cathode region 11 and the cathode region 1
1 and is not in contact with the n epitaxial layer 10. FIG. 27 shows an example of a typical switching waveform in 1200V-100A of the SI thyristor having such a conventional structure. In FIG. 27, I _T is an anode current waveform, V _D is an anode voltage waveform, I _GP is a gate peak current value, I _RG is a gate current waveform, and V _RG is a gate voltage waveform.

In the waveform of FIG. 27, holes and electrons are separated in the device structure of the SI thyristor by dividing into an ON period t ₀ , an accumulation period t ₁ , a falling period t ₂ and a tail period t _3. 28 to 31 are diagrams schematically showing how they move. That is, FIG. 28 corresponds to the on period t ₀ , FIG. 29 corresponds to the accumulation period t ₁ , FIG. 30 corresponds to the falling period t ₂ , and FIG. 31 corresponds to the tail period t ₃ . 28 to 31, white circles (◯) schematically show holes, and black circles () schematically show electrons.

During the period t ₀ , electrons flow from the cathode to the anode and holes flow from the anode to the cathode via the channel or gate even if the forward bias between the gate and the cathode is not continuously applied (see FIG. 28). When a reverse bias is applied between the gate and the cathode, a hole current from the anode flows into the gate, and holes distributed in the n-epitaxial layer between the gate portion and the channel portion near the gate are also reverse biased. It is pulled and flows into the gate. On the other hand, the electrons continue to flow from the cathode to the anode, but some of them re-enter the cathode region as the potential barrier height in the channel is increased by the reverse gate bias. During the period t ₁ , the hole current flowing from the anode into the gate is iha, the charge amount thereof is Qha, the hole current flowing into the gate from the n epitaxial layer near the channel and between the gate and the cathode is ihb, and the charge amount thereof is Qhb. As described above, assuming that the electron current flowing back into the cathode region is ie and the charge amount thereof is Qe, as shown in FIG.
It is shown in 9.

When the gate extraction charge amount is evaluated, it is 12
At the time of 50V-300A interruption,

[0023]

[Formula 1] Qha + Qhb + Qe = 456.6 (μC)

It was This value is a value obtained from the switching waveform of the SI thyristor having the conventional structure when the L load is applied.

When the depletion layer spreads between the gates and a sufficiently high potential barrier is formed in the channel, the injection of electrons from the cathode region is stopped and the period t ₂ is started, that is, the falling period (see FIG. 30).

Further, FIG. 31 corresponds to the tail period (t ₃ period) and shows how the tail current flows.

The problem of the SI thyristor having the conventional structure is that the value of Qha + Qhb + Qe is extremely large. That is, the amount of charge to be extracted from the gate is extremely large. A particularly important point is that Qhb is large. As described above, since the gate extraction charge amount is large, the gate drive circuit becomes large, and this is also an obstacle for increasing the switching speed of the thyristor.
In addition, the increase in turn-off loss at high temperature has also been a cause of device destruction.

[0028]

SUMMARY OF THE INVENTION It is an object of the present invention to shorten the accumulation time and fall time in the turn-off switching performance of an electrostatic induction type semiconductor device, and to significantly increase the amount of charge extracted from the gate electrode as compared with the conventional one. An electrostatic induction type semiconductor device having a static induction type main electrode short-circuit structure which further reduces the turn-off extraction charge amount in an electrostatic induction type semiconductor device having a distributed type main electrode structure which has a reduced turn-off performance and is easy to use. To provide.

Further, one of the objects of the present invention is to provide a static induction type semiconductor device having a uniformed structure of the static induction main electrode short circuit in which variations in breakdown voltage between the gate and the source or between the gate and the cathode are suppressed. The purpose is to provide.

Further, one of the objects of the present invention is to prevent nonuniformity in distance after diffusion in the layout of the source or the cathode in order to make the withstand voltage variations between the gate and the source or between the gate and the cathode uniform and uniform. An object of the present invention is to provide an electrostatic induction type semiconductor device having an extremely suppressed electrostatic induction main electrode short circuit structure.

More specifically, one of the objects of the present invention is to provide an electrostatic induction type semiconductor device having an electrostatic induction main electrode short-circuit structure capable of effectively extracting a part of the gate extraction charge amount at the time of turn-off also from the cathode or source electrode. To provide.

More specifically, one of the objects of the present invention is to provide a distribution structure in the cathode region or the source region so that a part of the gate extraction charge amount at the time of turn-off can be easily extracted also from the cathode or source electrode, and electrostatic induction. Another object of the present invention is to provide an electrostatic induction type semiconductor device having an electrostatic induction main electrode short circuit structure characterized by providing a short circuit structure.

More specifically, one of the objects of the present invention is to simplify the gate drive circuit by effectively reducing the amount of gate extraction charge at turn-off and to have a convenient and convenient electrostatic induction main electrode short circuit structure. An object is to provide a static induction semiconductor device.

More specifically, one of the objects of the present invention is to provide an electrostatic induction type semiconductor device having an electrostatic induction main electrode short-circuit structure with improved gate loss breakdown resistance at high temperature by reducing the amount of gate extraction charges. To provide.

[0035]

The present invention is a substrate in which a channel is formed in addition to the cathode diffusion layer or the source diffusion layer on the surface where the cathode or source metal electrode is in contact with the semiconductor substrate in the electrostatic induction thyristor or transistor. It has an element structure having a distributed type main electrode structure formed in contact over the surface, and further has an electrostatic induction cathode short circuit or source short circuit structure surrounded by a cathode diffusion layer or a source diffusion layer.

The electrostatic induction main electrode (cathode or source) short-circuit structure means a structure in which a short-circuit structure by the electrostatic induction effect is realized in the cathode region or the source region. Specifically, in the distributed main electrode structure, a short-circuit region of the same conductivity type as the control region but of the opposite conductivity type to the main electrode region is surrounded by a region having a relatively low impurity density surrounded by a region having a relatively high impurity density. Form. The main electrode region and the short circuit region are short-circuited by the main electrode. The short circuit region is surrounded by a depletion layer extending from a region having a relatively high impurity density to a region having a relatively low impurity density. There is a potential barrier whose height is controlled by the electrostatic induction effect between the short circuit region and the control region. Therefore, the carriers flowing between the gate which is the control region and the short-circuit region are subjected to potential barrier control by the electrostatic induction effect. By providing such a short circuit region, the effect of bypassing minority carriers to the main electrode can be enhanced.

Furthermore, in the distributed main electrode structure in which the cathode diffusion layer or the source diffusion layer is distributed and arranged in order to suppress the variation in breakdown voltage, the main electrode short-circuit structure is provided.

The main electrode region is formed of a region having a relatively high impurity density and a region having a relatively low impurity density so that a part of the gate extraction charge amount at the time of turn-off can be easily extracted from the cathode electrode or the source electrode. In addition, a short-circuit region is provided in a part of the region where the impurity density is relatively low, and the electrode structure is formed in contact with the cathode electrode or the source electrode. The region having a relatively low impurity density serves as a so-called conduction channel for bypassing minority carriers which should be extracted from the gate region, the short-circuit region serves as a drain, and a part of the minority carriers also acts as a cathode electrode or a source electrode. It has a structure that further enhances the effect of easy extraction.

The distributed type main electrode structure means a structure in which the impurity density in the main electrode region is not formed uniformly and uniformly, but is formed nonuniformly and nonuniformly. For example, the impurity density is relatively high. It includes a structure in which regions having a relatively low impurity density relative to the regions are distributed and formed. Alternatively, these two regions may be of the same conductivity type or opposite conductivity types. The electrode structure such as the cathode electrode or the source electrode is
Both areas are in contact at least in part. The point is a structure in which a conduction channel for minority carriers is also set in the main electrode region.

On the other hand, the electrostatic induction main electrode short-circuit structure further comprises a main electrode short-circuit structure in the above distributed main electrode structure, and carriers that flow into the short-circuit region are controlled by potential barrier control by the electrostatic induction effect. This is a structure in which a minority carrier absorption effect is further enhanced by providing a short circuit region.

Therefore, the structure of the static induction type semiconductor device having the static induction main electrode short-circuit structure of the present invention is as follows. That is, a first main electrode region formed on the first main surface of the high resistance layer region, and a second main electrode region formed on the first or second main surface of the high resistance layer region, A control region formed in the vicinity of the first main electrode region, the control region forming a channel region in the high resistance layer region, and the first main electrode region and the second main electrode region. In an electrostatic induction type semiconductor device in which a main current conducting between the two is controlled by controlling a height of a potential barrier formed in the channel region, the first main electrode region is relatively opposed to a region having a relatively high impurity density. And a short-circuit region formed in a region having a relatively low impurity density sandwiched between regions having a relatively low impurity concentration and a relatively high impurity density are distributed to each other. The electrode structure in contact with the electrode region has the above-mentioned impurity density. Not only the first region but also a region having a low impurity density and a short-circuit region, the short-circuit region being opposite to the first main electrode region having the same conductivity type as the control region and a relatively high impurity density. Have conductivity type,
An electrostatic induction main electrode short-circuit structure having a potential barrier between the control region and a depletion layer extending from the region having a relatively high impurity density to the region having a relatively low impurity density. It has a configuration as an electrostatic induction type semiconductor element.

Alternatively, in the first main electrode region,
Electrostatic induction main electrode short-circuit structure, wherein a region having a relatively high impurity density and a region having a relatively low impurity density have the same conductivity type as each other and a conductivity type opposite to that of the control region. It has a structure as an electrostatic induction type semiconductor element having.

Alternatively, in the first main electrode region,
The electrostatic induction main electrode short-circuit structure, wherein the region having a relatively low impurity density has a conductivity type opposite to that of the region having a relatively high impurity density, and has the same conductivity type as the control region. It has a structure as an electrostatic induction type semiconductor element having.

Alternatively, the electrode structure in contact with the first main electrode region has ohmic contact with the region having a relatively high impurity density and contacts the region having a relatively low impurity density. The portion has a configuration as an electrostatic induction type semiconductor element having a static induction main electrode short-circuit structure characterized by having non-ohmic contact or Schottky contact.

Alternatively, in the electrode structure in contact with the first main electrode region, the electrode material of the part in contact with the region having the relatively low impurity density is Al, Mo, W, P.
It has a constitution as an electrostatic induction type semiconductor element having an electrostatic induction main electrode short-circuit structure characterized by being composed of t, Ti, Ni or an alloy of these and Si or a silicide layer.

Alternatively, in the first main electrode region,
The region having a relatively high impurity density has a distribution structure divided from each other, and has a structure as an electrostatic induction type semiconductor device having an electrostatic induction main electrode short circuit structure.

Alternatively, the control region has a structure of an electrostatic induction type semiconductor device having a static induction main electrode short-circuit structure characterized by having a buried structure.

Alternatively, the control region has a notch structure, and the control region has a structure as an electrostatic induction type semiconductor element having an electrostatic induction main electrode short-circuit structure.

Alternatively, the control area has a structure of a static induction type semiconductor element having a static induction main electrode short-circuit structure characterized by having a planar structure.

Alternatively, the electrostatic induction type semiconductor element has a structure as an electrostatic induction type semiconductor element having an electrostatic induction main electrode short-circuit structure characterized by being an electrostatic induction thyristor.

Alternatively, the electrostatic induction semiconductor device has a structure as an electrostatic induction semiconductor device having an electrostatic induction main electrode short-circuit structure characterized by being an electrostatic induction transistor.

[0052]

The operation principle of the static induction type semiconductor device having the short circuit structure of the static induction main electrode according to the present invention will be described by taking the static induction thyristor as an example and comparing with the conventional structure.

16 to 21 are views for explaining the operation principle of the electrostatic induction thyristor having the electrostatic induction main electrode (cathode) short-circuit structure of the present invention. FIG. 16 is shown in FIG. However, this is an example in which the cathode electrode 7a partially contacts the n-type region 10 as well. The shape is a combination of an electrostatic induction cathode short circuit and a distributed cathode structure. 17 to 20 show an on period (t ₀ period), an accumulation period (t ₁ period),
Falling period (t ₂ period) is a diagram for explaining the movement of carriers in the tail period (t ₃ period). Further, FIG. 21 is a schematic diagram of a potential distribution corresponding to the structure near the cathode, showing that holes are likely to escape to the cathode electrode. However, FIG. 21 is a schematic diagram,
It does not correspond to FIG.

17 to 20 for explaining the operation principle of the present invention are shown in FIGS. 28 to 31 for explaining the operation principle of the conventional structure.
It corresponds to each.

Compared with the conventional structure, the distributed cathode structure and the effect of electrostatic induction short-circuiting make the present invention faster, the gate peak current value I _GP at turn-off is also reduced, and the gate extraction charge at turn-off. The amount is also small.

Comparing FIG. 17 and FIG. 28, it can be seen that there is not much difference in carrier movement during the ON period (t ₀ period). In the present invention, since the cathode electrode is also in contact with the n epitaxial layer and the p ⁺ cathode short-circuit region 15, the hole current in the ON state is not limited to the n ⁺ cathode region, but the n epitaxial layer having a relatively low impurity density. And p ⁺ cathode short-circuit region 15 to flow into the cathode electrode. Rather, in the on-state, the hole current is caused by the n ⁺ epitaxial layer and p ^{+ which have a} relatively low impurity density.
It is easy to flow to the cathode electrode through the cathode short-circuit region.

A characteristic point in the operation of the present invention appears in the movement of carriers in the accumulation period (t ₁ period) in FIG.
When a reverse bias is applied between the gate and the cathode, the potential (potential) of the gate rises and the potential barrier height of the channel rises. Along with this, holes are extracted from the gate, but the component is mainly Qha due to the hole current iha from the anode. Q due to the component of the hole current ihb due to the holes distributed in the n epitaxial layer (10) near the gate region and between the gate and the cathode
Although a part of hb is extracted from the gate region, ihb mainly flows into the cathode electrode through the p ⁺ cathode short-circuit region 15 and the n-type region 10, and therefore does not serve as a gate extraction charge. This is because holes near the cathode are likely to escape from the short-circuit region formed in the n epitaxial layer to the cathode electrode, as is clear from the potential distribution for holes described later. The ie component is the same as in the conventional example.

Therefore, in the conventional structure, as shown in FIG.
The gate extraction current was iha + ihb + ie, and the gate extraction charge amount was Qha + Qhb + Qe, whereas in the present invention, iha-ihb + i.
e, Qha-Qhb + Qe. Even when compared with a mere distributed type main electrode structure in which the p ⁺ short-circuit region 15 is not set, the gate extraction charge amount is reduced.

By introducing the electrostatic induction main electrode short-circuit structure of the present invention, the gate extraction charge amount at turn-off is considerably reduced as compared with the conventional example.

The falling period (t ₂ shown in FIGS. 19 and 20
(Period) and the tail period (t ₃ period) are the same as those of the conventional structure.

FIG. 21 is a diagram schematically showing the potential distribution corresponding to the structure near the cathode of the SI thyristor having the electrostatic induction cathode short circuit structure of the present invention. A
The potential distributions are indicated by a broken line and a solid line along the −A ′ line and the BB ′ line, respectively. An intrinsic cathode point K ^* having the highest potential barrier against holes is present on the front surface of the p ⁺ cathode short-circuit region 15, and an intrinsic gate point G ^* is present in the gate-gate channel region. It controls the flow of holes and electrons, respectively. As is apparent from the potential distribution, holes are likely to be accumulated at the interface between the cathode electrode and the n-epitaxial layer and the cathode short-circuit region.
The b component mainly tends to flow into the cathode electrode. Therefore, the Qhb component is reduced from the gate extraction charge at turn-off.

[0062]

[Embodiment 1] FIG. 1 is a schematic sectional structural view and a top view of an electrostatic induction type semiconductor device having an electrostatic induction main electrode short-circuit structure as a first embodiment of the present invention. FIG. 1 shows a unit segment portion. Since the p ⁺ region 3 is the anode region, the structure of FIG. 1 corresponds to the static induction thyristor. If the region 3 becomes the n ⁺ region, it becomes a static induction transistor. The thyristor will be described below as an example. In FIG. 1, 1 is an n ⁻ high resistance layer, 4 is a p ⁺ buried gate region,
Reference numeral 5 is a channel region, and 7a, 7b and 7c are a cathode electrode, a gate electrode and an anode electrode, respectively. An n-type region 10 is formed by epitaxial growth or the like.
Reference numeral 11 is an n ⁺ cathode region, and 15 is a cathode short-circuit region. The structural characteristic of the first embodiment is that the cathode electrode 7
That is, a is in contact not only with the n ⁺ cathode region 11 but also with the n-type region 10 and the cathode short-circuit region 15. The n ⁺ cathode region 11 and the cathode short-circuit region 15 are short-circuited by the cathode electrode 7a. The material of the cathode electrode is Al, Al-Si, Mo, W, Pt, T
i, Ni or an alloy layer or a silicide layer thereof. The cathode electrode 7a is in ohmic contact with the n ⁺ cathode region 11 and the cathode short-circuit region 15, but is in ohmic contact, non-ohmic contact, or Schottky contact with the n region 10. There is. n-type region 1
Holes distributed in 0 are n-type region 10 and cathode electrode 11
The impurity density difference is set to n ⁺ (11) and n (10) so that they are easily accumulated at the contact interface with and the cathode short-circuit region, and further, the structure is easily absorbed in the p ⁺ region (cathode short-circuit region) 15. Has become. As is apparent from the top view, the n ⁺ cathode region 11 is formed in a stripe shape, but the peripheral portion is an n-type region 10 having a relatively low impurity density, and n ⁺ (11) n (10 ), The cathode electrode 7a contacts them to form a distributed cathode electrode structure, and the cathode electrode 7a short-circuits the cathode short-circuit region 15 and the n ⁺ cathode region (11). .

The n-type region 10 just needs to be a region where holes are easily accumulated, and may be formed as a p ⁻ region having a relatively lower impurity density than the p ⁺ gate region 4.
In this case, the contact with the cathode electrode 7a is preferably Schottky contact.

In the depleted region between the p ⁺ cathode short-circuit region 15 and the gate region 4, a potential barrier whose height is controlled by the electrostatic induction effect is formed to connect the gate region 4 and the cathode short-circuit region 15. The flow of conducting carriers (holes) is controlled.

That is, the cathode short-circuit region 15 is short-circuited with the n ⁺ cathode region 11 and the n ⁺ cathode region 1
In the n-type region 10 sandwiched by 1s, n ⁺ (11) n (1
0) The depletion layer spreads due to the diffusion potential due to the junction. The depletion layers are connected to each other, and a potential barrier for holes is formed on the front surface of the cathode short-circuit region 15. The position of the intrinsic cathode K ^* having the highest potential barrier height is schematically shown in FIG. As is clear from the potential distribution for holes shown in FIG. 21, the holes distributed on the surface side of K ^* are efficiently absorbed by the cathode short-circuit region 15. By positively introducing such a cathode short circuit region 15, the cathode electrode 7
The holes absorbed in a are equivalent to the formation of the drain region. Compared to the structure in which holes are absorbed by the cathode electrode 7a through a mere Schottky junction, the p ⁺ region (1
5) The structure has a high hole absorption effect due to the diffusion potential of the n (10) junction.

In FIG. 1, the cathode electrode 7a is an n-type region 10
However, it is not always necessary to contact the n-type region 10. That is,
The structure may be such that only n ⁺ (11) p ⁺ (15) is contacted.

[0067]

[Embodiment 2] FIG. 2 is a schematic sectional structural view and a top view of a unit segment portion of an electrostatic induction type semiconductor device having an electrostatic induction main electrode short-circuit structure as a second embodiment of the present invention. FIG. 2 corresponds to a buried gate type SI thyristor. The structural characteristic of FIG. 2 is that the n-type region 10 is sandwiched between the n ⁺ cathode regions 11 and a cathode short-circuit region is set in the sandwiched n-type region 10, and the n ⁺ region 11 is sandwiched between the n ⁺ region 11 and the cathode electrode 7a. N-type region 10 and cathode short-circuit region 15
Is the point of contact.

By introducing a cathode short-circuit structure in such a distributed type main electrode (cathode) structure, holes accumulated in the n-type region 10 having a relatively low impurity density are efficiently discharged from the cathode short-circuit region 15. Cathode electrode 7a
Can be absorbed into. As is clear from the top view, n
^{The +} cathode region 11 is formed in the shape of two stripes, and the cathode short-circuit region is formed in the n-type region sandwiched between the stripes, and the cathode electrode 7a is n ⁺ (11) n (1
0) n ⁺ (11) region and n ⁺ (11) p ⁺ (15) n
⁺ (11) It is crossing the area. The cathode electrode 7a is in ohmic contact with the n ⁺ cathode region (11) and the cathode short-circuit region (15), and in ohmic contact or non-ohmic contact with the n-type region, or Schottky contact. Further, n type region 10 may be formed as a p ⁻ region or ap region having a relatively lower impurity density than p ⁺ gate region 4.

[0069]

Embodiments 3 and 4 FIGS. 3 and 4 show the third and fourth embodiments of the present invention.
FIG. 3 is a schematic cross-sectional structural view and a top view of a unit segment portion of an electrostatic induction type semiconductor element having an electrostatic induction main electrode short circuit structure as an example of FIG.

[0070] Structural features of FIGS. 3 and 4 are in the arrangement pattern of p ⁺ cathode short-circuit regions 15 sandwiched between the arrangement pattern and the n ⁺ cathode region 11 of the n ⁺ cathode region 11. That is, as explained as the problem of the conventional example, the p ⁺ buried gate region 4 immediately below the diffused region of the n ⁺ cathode region 11 spreads widely, and the diffusion depth varies.
In order to solve the problem that the breakdown voltage distribution between the gate and the cathode varies, the n ⁺ cathode region 11 is divided into small regions and arranged in a segment, and the n ⁺ cathode region 11 is sandwiched between the n ⁺ cathode regions 11. p ⁺ cathode short-circuit area 15
Is the point that formed. Since the n ⁺ cathode region 11 is divided and arranged on the region corresponding to the channel region 5, the diffusion variation between the gate and the cathode in the unit segment is alleviated, and the breakdown voltage distribution becomes uniform.

The third embodiment is an example in which the cathode electrode 7a is combined with a striped cathode region, and the cathode electrode 7a has such a distributed cathode region including the n ⁺ cathode region 11 and the n-type region 10 and the p ⁺ cathode short-circuit region 15. As shown in the top view.

In the fourth embodiment of FIG. 4, the n ⁺ cathode region 11 is used.
Remains divided into small areas, no stripes. A p ⁺ cathode short-circuit region 15 is formed in a shape sandwiched between these n ⁺ cathode regions 11. The cathode electrode 11 is n ⁺ (11) p ⁺ (15) n ⁺ (11) p ⁺
(15) ... Crosswise contact with the distributed cathode short-circuit region.

Also in Examples 3 and 4, the cathode electrode 7a is used.
And n ⁺ cathode region 11 and p ⁺ cathode short-circuit region 15
Is ohmic contact, and n-type region 10 is ohmic contact, non-ohmic contact or Schottky contact. Furthermore, the n-type region 10 may be formed as a p ⁻ region or a p region. The point is that the structure is such that holes are accumulated in the n-type region or the p ⁺ cathode short-circuit region where the impurity density is relatively low and are easily absorbed by the cathode electrode 7a.

It is to be noted that the electrostatic induction (SI) main electrode short circuit structure is realized as in the first and second embodiments.
That depletion, together with the cathode short-circuit regions 15 is shorted to the n ⁺ cathode region 11, the n ⁺ A n-type region 10 sandwiched between the cathode region 11, n ⁺ (11) n (10) diffusion potential by bonding Spreads. The depletion layers are connected to each other, and a potential barrier for holes is formed on the front surface of the cathode short-circuit region 15. The position where the potential barrier height is highest is the intrinsic cathode K ^* , and K
The position of ^* is shown schematically in FIGS. Figure 21
As is clear from the potential distribution for holes shown in FIG. 3, holes distributed on the surface side of K ^* are efficiently absorbed by the cathode short-circuit region 15. By positively introducing such a cathode short-circuit region 15, it is equivalent to forming a so-called drain region of holes absorbed in the cathode electrode 7a. Compared with the structure in which holes are absorbed by the cathode electrode 7a through a mere Schottky junction, p ⁺
The structure has a high hole absorption effect due to the diffusion potential of the region (15) n (10) junction.

3 and 4, the cathode electrode 7a has a structure in contact with the n-type region 10, but the n-type region 1 is not always necessary.
Of course, it is not necessary to be in contact with 0. That is, it may be configured to contact only n ⁺ (11) p ⁺ (15).

[0076]

Embodiments 5 and 6 FIGS. 5 and 6 show the fifth and sixth aspects of the present invention.
FIG. 3 is a schematic cross-sectional structural view of a unit segment portion of an electrostatic induction type semiconductor device having an electrostatic induction main electrode short circuit structure as an example of FIG. This is an example of a buried gate type SI thyristor, in which the n ⁺ cathode region 11 is divided into small regions as in the third and fourth embodiments, and the cathode short-circuit region 15 which utilizes the electrostatic induction effect is sandwiched between the cathode regions 11. Has been done. The static induction main electrode (cathode) short-circuit structure of the present invention has a further effect of reducing the amount of gate extraction charges as compared with the distributed main electrode structure having no short-circuit structure, and the accumulation time t _s and the fall time are reduced in the turn-off time. This is a structure in which the turn-off time t _{gq, which} is the sum of the times t _f , is reduced. However, it is difficult to reduce the tail time t _tail peculiar to the thyristor structure only by the distributed main electrode (cathode) structure. Therefore, the fifth embodiment corresponds to an example implemented by combining the electrostatic induction cathode short-circuit structure and the lifetime control.
Lifetime control includes proton irradiation, electron beam irradiation,
A method such as γ-ray irradiation or diffusion of heavy metals is performed. In FIG. 5, the mark (x) indicates a desired defect region formation position in the case of proton irradiation. For example, if the thickness of the p ⁺ anode region 3 is about 5 μm, it is about 15 μm from the anode surface.
Is formed at the position. By forming it in the vicinity of the p ⁺ anode region 3, the lime time of electrons is effectively controlled to reduce the tail time.

On the other hand, the sixth embodiment shown in FIG. 6 is an embodiment in which the electrostatic induction cathode short circuit structure and the electrostatic induction anode short circuit structure are combined. 6 is an n ⁺ short-circuit layer. The anode short-circuit structure in FIG. 6 is an anode short-circuit structure that utilizes the electrostatic induction effect and is an SI anode short-circuit structure. By combining the electrostatic induction cathode short circuit structure and the SI anode short structure, it is possible to reduce the turn-off time t _{gq and} the tail time t _tail . Of course, the lifetime control may be further implemented in the sixth embodiment.

Also in Examples 5 and 6, a potential barrier controllable by the electrostatic induction effect is formed on the front surface of the cathode short-circuit region 15, and the p ⁺ cathode short-circuit region 15 serves as a drain of holes absorbed by the cathode electrode 7a. Has become.

[0079]

Embodiments 7, 8 and 9 FIGS. 7, 8 and 9 are electrostatic induction type semiconductor devices having an electrostatic induction main electrode short-circuit structure as the seventh, eighth and ninth embodiments of the present invention. FIG. 3 is a schematic cross-sectional structure diagram and a top view of a unit segment portion of FIG. Example 7-
9 corresponds to the SI thyristor having the cut gate structure, and each of them is the electrostatic induction main electrode (cathode).
It is characterized by a short circuit structure.

In Example 7, as is clear from FIG. 7, n ⁺
The cathode region 11 is formed in a stripe shape, and the cathode electrode 7a is for the distributed cathode region composed of n ⁺ (11) n (10) and the p ⁺ electrostatic induction cathode short circuit region 15 sandwiched between the n ⁺ cathode regions 11. They are in contact with each other.

In Example 8, as is apparent from FIG. 8, the n ⁺ cathode region 11 is divided into small regions, and the cathode electrode 7a is composed of n ⁺ (11) n (10) distribution cathode region and n ⁺ cathode region 11 It makes lateral contact with the p ⁺ electrostatic induction cathode short circuit region 15 sandwiched between.

In the ninth embodiment, as is clear from FIG. 9, n ⁺
The cathode region 11 is formed in a divided stripe shape and has an n region 10 sandwiched between these regions. Further, a p ⁺ cathode short-circuit region 15 is formed in the n region 10 and the cathode electrode 7a is n. ⁺ (11) n (10) distribution cathode region and n ⁺ (11) p ⁺ (15) n ⁺ (11)
It is in transverse contact with the SI cathode short circuit area.
Holes are easily absorbed by the cathode electrode 7a from the n region (10) sandwiched between the n ⁺ cathode regions 11.

Although all of Examples 7 to 9 use the SI thyristor as an example, if the n ⁺ region is used instead of the p ⁺ anode region 3, the SIT having the cut gate structure can be formed.

The cathode electrode 7a is an n ⁺ cathode region 11
And an ohmic contact with the p ⁺ cathode short-circuit region 15, and an ohmic contact, a non-ohmic contact, or a Schottky contact with the n-type region 10. n-type region 10 is p ⁺
It may be formed as ap ⁻ region or ap region having a relatively lower impurity density than that of the gate region 4. In that case, Schottky contact is desirable.

P ⁺ cathode short-circuit region 15 of Examples 7-9
There is a peak of the potential barrier height at the intrinsic cathode point K ^{* on} the front surface of, and the flowing hole current is controlled. Holes on the surface side from the K ^* point are efficiently absorbed by the cathode short circuit region 15.

[0086]

[Embodiments 10 and 11] FIGS. 10 and 11 show a first embodiment of the present invention.
FIG. 12 is a schematic cross-sectional structure diagram in the vicinity of a main electrode of an electrostatic induction type semiconductor element having a static induction main electrode short-circuit structure as 0th and 11th embodiments. Each of Examples 10 and 11 corresponds to a static gate type semiconductor device having a planar gate structure (planar gate structure). Although it can be formed as a thyristor or a transistor, a thyristor will be described here as an example.

In Example 10 of FIG. 10, the n ⁺ cathode region 11 is formed in two stripes, and the cathode short-circuit region 15 is sandwiched between the n ⁺ cathode regions 11. The cathode electrode 7a is in contact not only with the n ⁺ cathode region 11 but also with the p ⁺ cathode short-circuit region 15. That is, for the electrostatic induction cathode short circuit structure composed of n ⁺ (11) p ⁺ (15) n ⁺ (11), the cathode electrode 7a
Are in transverse contact. The holes distributed in the n ⁻ / p ⁻ region 10a are p mainly sandwiched between the n ⁺ cathode regions 11.
^This is a structure in which the cathode short-circuit region 15 is easily absorbed by the cathode electrode 7a. On the other hand, in Example 11 of FIG. 11, n ⁺
The cathode region 11 is formed in one stripe shape, and the cathode electrode 7a is in contact not only with the n ⁺ cathode region 11 but also with the surrounding n ⁻ / p ⁻ region 10a. Further, in the n ⁺ cathode region 11, a p ⁺ cathode short-circuit region 15 is formed in an island shape. FIG. 12 is a schematic top view of the unit channel portion of Example 11 shown in FIG. It shows a state where the cathode electrode 7a is in transverse contact with the stripe-shaped n ⁺ cathode region 11, the island-shaped p ⁺ cathode short-circuit region 15 and the n ⁻ / p ⁻ region 10a.

[0088]

[Embodiments 12, 13, 14] The electrostatic induction main electrode short-circuit structure of the present invention can be modified in various ways depending on the arrangement pattern of the n ⁺ cathode region 11 and the p ⁺ cathode short-circuit region sandwiched between the n ⁺ cathode regions. Some points are the same in the planar gate structure. 13 to 15 are top views showing examples of the arrangement of the cathode region 11 as described above. That is, FIG. 13 shows a twelfth embodiment of the present invention in which the n ⁺ cathode region 11 is divided into small regions in the unit channel of the planar structure, and p-shaped in an island shape in the cathode region 11. ^{+ The} cathode short-circuit region 15 is arranged. The cathode electrode 7a is composed of n ⁺ (11) n ⁻ / p ⁻ (10a) cathode distribution structure and n ⁺ (11) p ⁺ (15) n ⁺ (11) S.
This is an example of contacting the I cathode short-circuit structure so as to cover the entire structure. FIG. 14 shows a thirteenth embodiment of the present invention, and in the same planar structure, the cathode electrode 7a is provided for the n ⁺ cathode region 11 arranged in a plurality of channels and the p ⁺ cathode short-circuit region 15 therein. In this example, the contact is made transversely and also to the n ⁻ / p ⁻ region 10a in the peripheral portion of the n ⁺ cathode region 11. Further, in FIG. 15, the stripe width of the cathode electrode 7a is set wider than that in FIG. 14, and the n ⁺ cathode region 11 and the p ⁺ cathode short-circuit region 15 are formed so as to be entirely covered.
It is 4. By arranging and configuring in this way,
It is possible to enhance the absorption effect of holes distributed in the n ⁻ / p ⁻ region 10a.

The comparison result between the first embodiment shown in FIG. 1 and the conventional structure shown in FIG. 26 will be described below. According to the electrostatic induction main electrode short-circuiting structure of the present invention, the gate peak current value I _Gp is reduced, the turn- _off gain G _OFF is increased, the accumulation time t _s is reduced, and the voltage is decreased as compared with the conventional structure having a uniform cathode electrode structure. Reduction of time t _f , and thus turn-off time t _gq (= t
_s + t _f ) and turn-off switching energy E _OFF (mJ / pulse) are reduced.

In particular, holes distributed between the gate region 4 and the cathode region 11 are efficiently absorbed by the cathode electrode 7a, which is the main electrode, by the electric field generated by the diffusion potential between the p ⁺ cathode short-circuit region 15 and the n-type region (10). Therefore, the gate extraction charge amount Q is significantly reduced. To that extent, the load on the gate drive circuit is reduced, and the t-type weight can be reduced.

Comparing the gate extraction charges Q (μC), in the first embodiment of the present invention, it is about 1/3 of that in the conventional example.
It becomes the following.

An element of the structural example of Example 1 shown in FIG.
By comparing the turn-off switching of the conventional structure element shown in FIG. 26 with γ-ray irradiation under a predetermined condition and performing life-lime control, the lifetime control by γ-ray irradiation is compared with the conventional structure. The SI thyristor having the electrostatic induction cathode short-circuit structure of the present invention has higher speed, smaller Q, and low loss, even when compared with the case of implementation.

[0093] The forward current of the conventional example - Doing comparison voltage characteristic, the V _T in is higher forward voltage drop (ON voltage) V _T large current area in the compared with the conventional example low current region Get lower. Therefore, the SI thyristor having the electrostatic induction cathode short-circuit structure of the present invention has a high surge resistance.

Comparing the relationship between the ON voltage and the short-circuit rate by the cathode electrode in the n ⁺ cathode region and the p ⁺ cathode short-circuit region in the electrostatic induction main electrode (cathode) short-circuit structure, the short-circuit rate can be suppressed to 30% or less. For example, the rapid increase of the ON voltage V _T is suppressed.

The embodiments of the present invention are not limited to the above Embodiments 1 to 14, but various modifications are possible. For example, a shallow p region may be formed in the n ⁺ cathode region 11 at the interface with the cathode electrode 7a without a channel structure. The effect of the p region is to absorb the holes distributed in the n ⁺ cathode region 11. This shallow p region can also be formed as a shallow layer of about several tens of liters along with the sintering of Al-Si, for example. This structure may be used in combination with the above-mentioned p ⁺ cathode short-circuit structure. In the embodiment of the present invention, it is already described that the n-type region 10 may be the p ⁻ or p region, but in this case, the shallow p region is in contact with the n-type region (or p ⁻ or p region) 10. It is desirable that it is surrounded by the n ⁺ cathode region 11 or a potential barrier so as not to do so.

The electrostatic induction main electrode short-circuit structure of the present invention is SI
It can be applied not only to T and SI thyristors but also to devices having other cathode or source structures. For example, the same can be applied to IGBTs, MOS control thyristors, and the like.

Furthermore, it is needless to say that the above-mentioned embodiments may have the opposite conductivity type.

[0098]

According to the electrostatic induction type semiconductor element having the electrostatic induction main electrode short-circuit structure of the present invention, particularly when applied to a thyristor, the following remarkable effects can be obtained. That is,

The turn-off time (the sum of the accumulation time t _s and the fall time t _f ) can be reduced, and the turn-off switching loss E _OFF can be reduced. Therefore, in application of a high-frequency PWM inverter or the like, the storage time t _s is particularly reduced, so that a very easy-to-use element can be provided. Further, since the accumulation time t _s can be reduced for each segment, the in-plane variation amount of the wafer can be reduced and the diameter of the wafer can be easily increased.

Furthermore, the gate extraction charge amount is remarkably reduced by the main electrode short circuit structure, and the turn-off gain G is reduced.
_{Since OFF} increases, the gate drive circuit can be simplified and downsized, and the cost of the entire device can be reduced.

The breakdown voltage characteristics and the leak current at high temperature are similar to those of the element of the conventional structure which does not control the lifetime, and the steady loss at the time of steady blocking.
Therefore, the on-characteristics, which are usually in a trade-off relationship, can be kept good even though the turn-off performance is improved.

Since the on-voltage V _T has a positive temperature characteristic, thermal runaway is unlikely to occur particularly during high frequency operation, so that it can be applied to high frequency operation.

Even if the turn-off performance is extremely speeded up to the same level as SIT, the ignition characteristics are hardly affected. That is, there is almost no change in the gate voltage and the gate current during ignition. Even if the turn-off performance is improved, the turn-on switching loss E _ON hardly changes in the low current region. Further, the turn-on rise time _tr and E _ON tend to increase in the high current region, but the delay time t _d does not change. There is also an effect that surge withstand capability in a high current region is increased.

Even when the structure of the present invention is applied to the SIT, the effects (1) to (3) described above as the advantages of the thyristor can be similarly enjoyed.

[Brief description of drawings]

FIG. 1 is a schematic cross-sectional structural view and a top view of a unit segment portion of an electrostatic induction type semiconductor device having an electrostatic induction main electrode short-circuit structure as a first embodiment of the present invention.

FIG. 2 is a schematic cross-sectional structural view and a top view of a unit segment portion of an electrostatic induction type semiconductor device having an electrostatic induction main electrode short-circuit structure as a second embodiment of the present invention.

FIG. 3 is a schematic cross-sectional structural view and a top view of a unit segment portion of an electrostatic induction type semiconductor device having an electrostatic induction main electrode short-circuit structure as a third embodiment of the present invention.

FIG. 4 is a schematic cross-sectional structural view and a top view of a unit segment portion of an electrostatic induction type semiconductor device having an electrostatic induction main electrode short-circuit structure as a fourth embodiment of the present invention.

FIG. 5 is a schematic sectional structural view of a unit segment portion of an electrostatic induction type semiconductor device having an electrostatic induction main electrode short-circuit structure as a fifth embodiment of the present invention.

FIG. 6 is a schematic sectional structural view of a unit segment portion of an electrostatic induction type semiconductor device having an electrostatic induction main electrode short-circuit structure as a sixth embodiment of the present invention.

FIG. 7 is a schematic sectional structural view and a top view of a unit segment portion of an electrostatic induction type semiconductor device having an electrostatic induction main electrode short-circuiting structure as a seventh embodiment of the present invention.

FIG. 8 is a schematic cross-sectional structural view and a top view of a unit segment portion of an electrostatic induction type semiconductor device having an electrostatic induction main electrode short-circuit structure according to an eighth embodiment of the present invention.

FIG. 9 is a schematic cross-sectional structural view and a top view of a unit segment portion of an electrostatic induction type semiconductor device having an electrostatic induction main electrode short-circuit structure as a ninth embodiment of the present invention.

FIG. 10 is a schematic sectional structural view in the vicinity of a main electrode of an electrostatic induction type semiconductor device having a short circuit structure for an electrostatic induction main electrode as a tenth embodiment of the present invention.

FIG. 11 is a schematic sectional structural view in the vicinity of a main electrode of an electrostatic induction type semiconductor device having an electrostatic induction main electrode short circuit structure as an eleventh embodiment of the present invention.

FIG. 12 is a schematic top view of a unit channel portion of Example 11 shown in FIG.

FIG. 13 is a static induction cathode short circuit structure example of a static induction semiconductor device having a static induction main electrode short circuit structure as a twelfth embodiment of the present invention.

FIG. 14 is a static induction cathode short circuit structure example of a static induction semiconductor device having a static induction main electrode short circuit structure as a thirteenth embodiment of the present invention.

FIG. 15 is a static induction cathode short circuit structure example of a static induction type semiconductor device having a static induction main electrode short circuit structure as a fourteenth embodiment of the present invention.

FIG. 16 is a schematic diagram for explaining the operation principle of the present invention (combined structure of distributed cathode structure and electrostatic induction short-circuit structure)

FIG. 17 is a diagram showing the movement of the carrier in the ON state.

FIG. 18 is a diagram showing the movement of carriers during the accumulation period.

FIG. 19 is a diagram showing the movement of the carrier during the falling period.

FIG. 20 is a diagram showing carrier movement during a tail period.

FIG. 21 is an explanatory diagram of the electrostatic induction main electrode short circuit structure and potential distribution of the present invention.

FIG. 22 is a schematic sectional view of a conventional SI thyristor (conventional example 1).

FIG. 23 is a schematic cross-sectional view of a conventional SI thyristor (conventional example 2).

FIG. 24 is a schematic sectional view of a conventional SI thyristor (conventional example 3).

FIG. 25 is a schematic diagram showing how a large buried layer is formed directly under an n ⁺ cathode.

FIG. 26 is a schematic cross-sectional structural view and a top view of a static induction thyristor having a conventional buried gate structure in which a cathode region is uniformly formed.

FIG. 27: Typical switching (1250V-100A) in the conventional structure example (without distributed cathode)

FIG. 28 is a view showing the movement of the carrier in the ON state.

FIG. 29 is a diagram showing the movement of carriers during the accumulation period.

FIG. 30 is a diagram showing the movement of the carrier during the falling period.

FIG. 31 is a diagram showing carrier movement during the tail period.

[EXPLANATION OF SYMBOLS] 1 n ^- high resistance layer 1a substrate 1b epitaxial layer 3 p ⁺ anode region 4 p ⁺ gate region 5 channel region 6 n ⁺ shorted layer 7a the cathode electrode 7b gate electrode 7c anode electrode 10 n-type region 10a n ^- / P ⁻ region 11 n ⁺ cathode region 12 support electrode 13 p ⁺ short-circuit layer 14, 14 ′ insulating layer 15 p ⁺ cathode short-circuit region K ^* intrinsic cathode point G ^* intrinsic gate point

Claims (11)

[Claims] 1. A first main electrode region formed on a first main surface of a high resistance layer region, and a second main electrode formed on a first or second main surface of the high resistance layer region. A region and a control region formed in the vicinity of the first main electrode region, the control region forming a channel region in the high resistance layer region, and the first main electrode region and the second main electrode region. In an electrostatic induction semiconductor device in which a main current that conducts between main electrode regions is controlled by controlling the height of a potential barrier formed in the channel region, the first main electrode region has a relatively high impurity density. A region having a relatively low impurity density and a short circuit region formed in a region having a relatively low impurity density sandwiched between regions having a relatively high impurity density, and having a structure in which The electrode structure in contact with the main electrode region of The first main electrode region having the same conductivity type as the control region and having the relatively high impurity density is partially contacted with not only the region having a high object density but also the region having a low impurity density and the short circuit region. And a potential barrier between the control region and a depletion layer extending from the relatively high impurity density region to the relatively low impurity density region. An electrostatic induction type semiconductor device having a static induction main electrode short circuit structure. 2. A region having a relatively high impurity density and a region having a relatively low impurity density in the first main electrode region are of the same conductivity type and opposite conductivity to that of the control region. The electrostatic induction type semiconductor device having the electrostatic induction main electrode short-circuit structure according to claim 1, which is a mold. 3. In the first main electrode region, the region having a relatively low impurity density has a conductivity type opposite to that of the region having a relatively high impurity density, and has the same conductivity as the control region. The electrostatic induction type semiconductor device having the electrostatic induction main electrode short-circuit structure according to claim 1, which is a mold. 4. The electrode structure in contact with the first main electrode region has ohmic contact with the region having a relatively high impurity density, and is in contact with the region having a relatively low impurity density. 4. The non-ohmic contact or the Schottky contact is characterized in that
Among them, an electrostatic induction type semiconductor device having the electrostatic induction main electrode short-circuit structure according to any one of items. 5. In the electrode structure in contact with the first main electrode region, the electrode material of the part in contact with the region having a relatively low impurity density is Al, Mo, W, Pt, Ti, N.
i or an alloy of these and Si, or a silicide layer, characterized in that
An electrostatic induction type semiconductor device having the electrostatic induction main electrode short-circuit structure according to any one of claims 1. 6. The first main electrode region, wherein the region having a relatively high impurity density has a distribution structure divided from each other. An electrostatic induction type semiconductor device having the electrostatic induction main electrode short-circuit structure according to item 1. 7. The static induction semiconductor device having the static induction main electrode short-circuit structure according to claim 1, wherein the control region has a buried structure. 8. The electrostatic induction semiconductor device having the electrostatic induction main electrode short-circuit structure according to claim 1, wherein the control region has a notch structure. 9. The electrostatic induction semiconductor device having the electrostatic induction main electrode short-circuit structure according to claim 1, wherein the control region has a planar structure. . 10. The static induction main electrode short-circuit structure according to claim 1, wherein the static induction semiconductor device is a static induction thyristor. Electric induction type semiconductor device. 11. The static induction main electrode short-circuit structure according to claim 1, wherein the static induction semiconductor element is a static induction transistor. Electric induction type semiconductor device.