JPH0626268U - Power semiconductor device - Google Patents

Power semiconductor device

Info

Publication number
JPH0626268U
JPH0626268U JP6239392U JP6239392U JPH0626268U JP H0626268 U JPH0626268 U JP H0626268U JP 6239392 U JP6239392 U JP 6239392U JP 6239392 U JP6239392 U JP 6239392U JP H0626268 U JPH0626268 U JP H0626268U
Authority
JP
Japan
Prior art keywords
power semiconductor
semiconductor device
tie bar
view
resin
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP6239392U
Other languages
Japanese (ja)
Other versions
JP2597768Y2 (en
Inventor
享 藤原
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Sharp Corp
Original Assignee
Sharp Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Sharp Corp filed Critical Sharp Corp
Priority to JP1992062393U priority Critical patent/JP2597768Y2/en
Publication of JPH0626268U publication Critical patent/JPH0626268U/en
Application granted granted Critical
Publication of JP2597768Y2 publication Critical patent/JP2597768Y2/en
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001—Technical content checked by a classifier
    • H01L2924/0002—Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00

Landscapes

  • Lead Frames For Integrated Circuits (AREA)

Abstract

(57)【要約】 （修正有） 【目的】 電力半導体装置のタイバー切断跡及び放熱板
間の絶縁を簡易な構造で実現でき、従来に比べ、製造工
程の低減及びコストダウンを図れる電力半導体装置を提
供する。 【構成】 樹脂封止部７’にタイバー接続部３’側に突
出する金属放熱板８を設けてなる電力半導体装置におい
て、少なくとも前記タイバー接続部３’に金属放熱板８
から離間するよう段差１１を設けてなることを特徴とす
る。 (57) [Summary] (Modified) [Purpose] Power semiconductor device that can realize tie bar cutting traces of power semiconductor devices and insulation between heat sinks with a simple structure, and can reduce the number of manufacturing processes and costs compared to the past. I will provide a. In a power semiconductor device having a resin sealing portion 7'provided with a metal radiator plate 8 protruding toward the tie bar connecting portion 3 ', at least the metal radiator plate 8 is provided on the tie bar connecting portion 3'.
It is characterized in that a step 11 is provided so as to be separated from.

Description

【考案の詳細な説明】[Detailed description of the device]

【０００１】[0001]

【産業上の利用分野】[Industrial applications]

本考案は、リードフレーム上に搭載した電力半導体素子を樹脂封止してなる電 力半導体装置の構造に関する。 The present invention relates to a structure of an electric power semiconductor device in which a power semiconductor element mounted on a lead frame is resin-sealed.

【０００２】[0002]

【従来の技術】[Prior art]

従来の技術について図５乃至図８を参照して説明する。図５及び図６は従来の 電力半導体装置の製造工程を示す図、図７は従来の電力半導体装置の完成図、図 ８は従来の問題点を説明するための図であり、（ａ）、（ｂ）及び（ｃ）はそれ ぞれ、正面図及び側面図及び平面図である。従来は、図５に示すように、複数の 素子搭載部１、リード部２、タイバー接続部３からなるリードフレーム４上の各 素子搭載部１の上に図示しない電力半導体素子を搭載し、その後図６に示すよう に、樹脂７によってトランスファーモールド法によって樹脂封止する。図中、５ は上部タイバー、６は下部タイバーである。その後、樹脂封止した各樹脂封止部 ７’をタイバーより個別切断し、さらに、図７に示すように樹脂封止部７’に対 し放熱板８を個別切断前のタイバー接続部３方向に突出するように取り付けてい た。図中、９はタイバー切断跡である。 A conventional technique will be described with reference to FIGS. 5 and 6 are views showing a manufacturing process of a conventional power semiconductor device, FIG. 7 is a completed view of the conventional power semiconductor device, and FIG. 8 is a diagram for explaining problems of the conventional power semiconductor device, (a), (B) and (c) are respectively a front view, a side view, and a plan view. Conventionally, as shown in FIG. 5, a power semiconductor element (not shown) is mounted on each element mounting section 1 on a lead frame 4 including a plurality of element mounting sections 1, lead sections 2 and tie bar connecting sections 3, and then As shown in FIG. 6, resin 7 is resin-sealed by a transfer molding method. In the figure, 5 is an upper tie bar, and 6 is a lower tie bar. After that, each resin-sealed portion 7 ′ that has been resin-sealed is individually cut from the tie bar, and as shown in FIG. 7, the heat sink 8 is individually cut toward the tie-bar connecting portion 3 direction before the resin-sealed portion 7 ′ is cut. It was attached so that it would stick out. In the figure, 9 is a tie bar cutting trace.

【０００３】[0003]

【考案が解決しようとする課題】[Problems to be solved by the device]

ところで、図７に示すように、従来方法によって得られた電力半導体装置に外 付で放熱板８をとりつけた場合、（ｌ）部に示すように電力半導体装置のタイバ ー切断跡９と放熱板８間の十分な鉛面距離がとれないという問題点があった。そ こで、従来は、電力半導体装置のタイバー切断跡９と放熱板８間に絶縁シートを 設けるか、あるいは、図８に示すようにタイバー切断跡９を絶縁樹脂１０で覆う 必要があり、製造工程が増え複雑になるという問題点があった。そこで、本考案 の目的は、電力半導体装置のタイバー切断跡及び放熱板間の確実な絶縁を簡易な 構造で実現でき、従来に比べ、製造工程の低減及びコストダウンを図れる電力半 導体装置を提供することにある。 By the way, as shown in FIG. 7, when an external heat sink 8 is attached to the power semiconductor device obtained by the conventional method, as shown in part (l), the tie bar cutting trace 9 and the heat sink of the power semiconductor device are shown. There was a problem in that a sufficient vertical distance between 8 could not be obtained. Therefore, conventionally, it is necessary to provide an insulating sheet between the tie bar cut mark 9 and the heat sink 8 of the power semiconductor device, or to cover the tie bar cut mark 9 with the insulating resin 10 as shown in FIG. There is a problem that the number of processes increases and the process becomes complicated. Therefore, an object of the present invention is to provide a power semiconductor device capable of realizing a tie bar cutting trace of a power semiconductor device and a reliable insulation between heat sinks with a simple structure, and reducing the manufacturing process and cost compared with the conventional one. To do.

【０００４】[0004]

【課題を解決するための手段】[Means for Solving the Problems]

前記目的を達成するために本考案は、素子搭載部と、リード部と、タイバー接 続部とからなるリードフレームに電力半導体素子を搭載、樹脂封止し、該樹脂封 止部に前記タイバー接続部側に突出する金属放熱板を設けてなる電力半導体装置 において、少なくとも前記タイバー接続部に前記金属放熱板から離間するよう段 差を設けてなることを特徴とする To achieve the above object, the present invention mounts a power semiconductor device on a lead frame composed of an element mounting portion, a lead portion, and a tie bar connection portion, and resin-encapsulates the tie bar connection to the resin sealing portion. In a power semiconductor device provided with a metal heat dissipation plate projecting to the part side, at least the tie bar connection part is provided with a step so as to be separated from the metal heat dissipation plate.

【０００５】[0005]

【作用】[Action]

本考案は、上記のように、タイバー接続部に金属放熱板から離間するよう段差 を設けているので、樹脂封止後にタイバーから分離切断した後の電力半導体装置 のタイバー切断跡は、金属放熱板から十分離れているので、両者間は確実に絶縁 できる。このように非常に簡易な構造で絶縁を確保でき、従来のような絶縁シー トや絶縁用の樹脂は不要であり、コストダウンも図れる。 According to the present invention, as described above, since the step is provided at the tie bar connection portion so as to be separated from the metal heat sink, the trace of the tie bar cut of the power semiconductor device after the resin is sealed and separated from the tie bar is a metal heat sink. Since they are sufficiently separated from each other, they can be reliably insulated from each other. Insulation can be secured with such an extremely simple structure, and the conventional insulating sheet and insulating resin are not required, and the cost can be reduced.

【０００６】[0006]

【実施例】【Example】

本考案の一実施例について、図１乃至図３を参照して説明する。 An embodiment of the present invention will be described with reference to FIGS.

【０００７】 図１及び図２は、本実施例による電力半導体装置の製造工程を示す図、図３は本 実施例による電力半導体装置の完成図である。ここで、（ａ），（ｂ）及び（ｃ ）はそれぞれ、正面図、平面図及び側面図である。なお、図５乃至図８に示す従 来例と同一機能部分には同一記号を付している。ここでは、主に従来例と異なる 点について説明する。1 and 2 are views showing a manufacturing process of the power semiconductor device according to the present embodiment, and FIG. 3 is a completed view of the power semiconductor device according to the present embodiment. Here, (a), (b) and (c) are a front view, a plan view and a side view, respectively. The same functional parts as those in the conventional example shown in FIGS. 5 to 8 are designated by the same symbols. Here, differences from the conventional example will be mainly described.

【０００８】 図１に示すように、本実施例による電力半導体装置のリードフレーム４’は、 上部タイバー５と素子搭載部１との間のタイバー接続部３’に段差１１を設けて いる。この段差１１の距離は、上部タイバー５切断後のタイバー切断跡９から放 熱板８までの鉛面距離を十分確保できるようにとっている（電気用品取締法にて ２．０mm以上）。さらにこの例では、リード２にも段差１２を形成し、リード２ 側の放熱板８との絶縁性向上も同時に図っている。As shown in FIG. 1, in the lead frame 4 ′ of the power semiconductor device according to the present embodiment, a step 11 is provided in the tie bar connecting portion 3 ′ between the upper tie bar 5 and the element mounting portion 1. The distance of the step 11 is designed to ensure a sufficient lead surface distance from the tie bar cutting mark 9 after the upper tie bar 5 is cut to the heat dissipation plate 8 (2.0 mm or more according to the Electrical Appliance and Material Control Law). Further, in this example, a step 12 is also formed on the lead 2 to simultaneously improve the insulation with the heat sink 8 on the lead 2 side.

【０００９】 上記したリードフレーム４’に図示しない電力半導体素子を搭載後、図２に示 すように樹脂７を用いてトランスファーモールド法により樹脂封止し、上部タイ バー５及び下部タイバー６を切断し、さらに樹脂封止部７’に放熱板８を取り付 けることにより、図３に示すような本実施例による電力半導体装置を得る。この ようにして得られた電力半導体装置は上部タイバー切断跡９と放熱板８間の距離 が十分確保されているので、従来の電力半導体装置のように両者の間に絶縁シー トを設けたり、上部タイバー切断跡９を絶縁用の樹脂で覆うといった工程が不要 であり、製造工程の低減及びコストダウンを図れる。After mounting a power semiconductor device (not shown) on the lead frame 4 ′ described above, resin 7 is resin-sealed by a transfer molding method as shown in FIG. 2, and the upper tie bar 5 and the lower tie bar 6 are cut. Then, the heat dissipation plate 8 is attached to the resin encapsulation portion 7'to obtain the power semiconductor device according to the present embodiment as shown in FIG. In the power semiconductor device thus obtained, since the distance between the upper tie bar cutting trace 9 and the heat sink 8 is sufficiently secured, an insulating sheet may be provided between the two as in the conventional power semiconductor device. The step of covering the upper tie bar cutting trace 9 with an insulating resin is unnecessary, and the manufacturing process can be reduced and the cost can be reduced.

【００１０】 図４（ａ），（ｂ）は本考案の他の実施例による電力半導体装置のリードフレ ームの正面図及び側面図である。この例はタイバー接続部３’のみに段差１１を 設けた構造である。この構造によれば、リード２側と放熱板８との絶縁性は、図 １乃至図３に示した実施例のようには得られないが、絶縁性上最も問題のあるタ イバー接続跡９と放熱板８間は確実に絶縁できる。4A and 4B are a front view and a side view of a lead frame of a power semiconductor device according to another embodiment of the present invention. In this example, the step 11 is provided only in the tie bar connecting portion 3 '. According to this structure, the insulation between the lead 2 side and the heat sink 8 cannot be obtained as in the embodiment shown in FIGS. The heat radiation plate 8 can be reliably insulated from the heat radiation plate 8.

【００１１】[0011]

【考案の効果】[Effect of device]

以上説明したように本考案によれば、電力半導体装置に金属放熱板を取り付け る場合に、電力半導体装置本体及び金属放熱板間の絶縁を簡易な構造で確実に実 現でき、従来に比べ、製造工程の低減及びコストダウンを図れる。 As described above, according to the present invention, when a metal heat sink is attached to a power semiconductor device, insulation between the power semiconductor device body and the metal heat sink can be reliably realized with a simple structure. The manufacturing process can be reduced and the cost can be reduced.

【図面の簡単な説明】[Brief description of drawings]

【図１】（ａ）及び（ｂ）はそれぞれ本考案の一実施例
による電力半導体装置の製造工程を示す正面図及び側面
図である。1A and 1B are respectively a front view and a side view showing a manufacturing process of a power semiconductor device according to an embodiment of the present invention.

【図２】（ａ）、（ｂ）及び（ｃ）はそれぞれ本考案の
一実施例による電力半導体装置の製造工程を示す正面
図、側面図及び平面図である。2A, 2B and 2C are a front view, a side view and a plan view showing a manufacturing process of a power semiconductor device according to an embodiment of the present invention.

【図３】（ａ）及び（ｂ）はそれぞれ、本考案の一実施
例による電力半導体装置の正面図及び側面図である。3A and 3B are respectively a front view and a side view of a power semiconductor device according to an embodiment of the present invention.

【図４】（ａ）及び（ｂ）は本考案の他の実施例による
電力半導体装置のリードフレームの正面図及び側面図で
ある。4A and 4B are a front view and a side view of a lead frame of a power semiconductor device according to another embodiment of the present invention.

【図５】（ａ）及び（ｂ）はそれぞれ従来例による電力
半導体装置の製造工程を示す平面図及び断面図である。5A and 5B are respectively a plan view and a cross-sectional view showing a manufacturing process of a power semiconductor device according to a conventional example.

【図６】（ａ）、（ｂ）及び（ｃ）はそれぞれ、従来例
による電力半導体装置の製造工程を示す正面図、側面図
及び平面図である。6A, 6B and 6C are respectively a front view, a side view and a plan view showing a manufacturing process of a conventional power semiconductor device.

【図７】（ａ）及び（ｂ）はそれぞれ、従来例による電
力半導体装置の平面図及び側面図である。7A and 7B are a plan view and a side view, respectively, of a power semiconductor device according to a conventional example.

【図８】（ａ）及び（ｂ）はそれぞれ、従来例による電
力半導体装置の平面図及び側面図である。8A and 8B are respectively a plan view and a side view of a conventional power semiconductor device.

【符号の説明】[Explanation of symbols]

１ 素子搭載部 ２ リード部 ３’ タイバー接続部 ４’ リードフレーム ７’ 樹脂封止部 ８ 放熱板 １１ 段差部 1 element mounting part 2 lead part 3'tie bar connecting part 4'lead frame 7'resin encapsulation part 8 heat sink 11 stepped part

Claims (1)

【実用新案登録請求の範囲】[Scope of utility model registration request] 【請求項１】 素子搭載部と、リード部と、タイバー接
続部とからなるリードフレームに電力半導体素子を搭
載、樹脂封止し、該樹脂封止部に前記タイバー接続部側
に突出する金属放熱板を設けてなる電力半導体装置にお
いて、 少なくとも前記タイバー接続部に前記金属放熱板から離
間するよう段差を設けてなることを特徴とする電力半導
体装置。1. A metal heat sink that mounts a power semiconductor element on a lead frame composed of an element mounting portion, a lead portion, and a tie bar connecting portion, is resin-sealed, and protrudes toward the tie bar connecting portion side in the resin sealing portion. A power semiconductor device provided with a plate, wherein a step is provided at least at the tie bar connection portion so as to be separated from the metal heat dissipation plate.
JP1992062393U 1992-09-04 1992-09-04 Power semiconductor device Expired - Fee Related JP2597768Y2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP1992062393U JP2597768Y2 (en) 1992-09-04 1992-09-04 Power semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP1992062393U JP2597768Y2 (en) 1992-09-04 1992-09-04 Power semiconductor device

Publications (2)

Publication Number Publication Date
JPH0626268U true JPH0626268U (en) 1994-04-08
JP2597768Y2 JP2597768Y2 (en) 1999-07-12

Family

ID=13198848

Family Applications (1)

Application Number Title Priority Date Filing Date
JP1992062393U Expired - Fee Related JP2597768Y2 (en) 1992-09-04 1992-09-04 Power semiconductor device

Country Status (1)

Country Link
JP (1) JP2597768Y2 (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2009135444A (en) * 2007-10-15 2009-06-18 Power Integrations Inc Package for power semiconductor device

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5977241U (en) * 1982-11-15 1984-05-25 日本電気株式会社 Resin-encapsulated semiconductor device
JPH01158756A (en) * 1987-12-16 1989-06-21 Sanken Electric Co Ltd Manufacture of resin sealed semiconductor device

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5977241U (en) * 1982-11-15 1984-05-25 日本電気株式会社 Resin-encapsulated semiconductor device
JPH01158756A (en) * 1987-12-16 1989-06-21 Sanken Electric Co Ltd Manufacture of resin sealed semiconductor device

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2009135444A (en) * 2007-10-15 2009-06-18 Power Integrations Inc Package for power semiconductor device

Also Published As

Publication number Publication date
JP2597768Y2 (en) 1999-07-12

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