JPH06260998A - Dsat detection error discriminating device for cellular telephone - Google Patents

Abstract

PURPOSE:To provide a DSAT detection error discriminating device in a cellular telephone in which a power is saved by stopping a shift operation when the number of error bits reaches the number of permitted bits in DSAT detection in the cellular telephone system. CONSTITUTION:This device is equipped with a DSAT pattern comparing part 1-1 which compares a received DSAT pattern with a DSAT pattern for detection, an error bit shift part 1-3 which converts the compared data into serial data, an error bit count part 1-4 equipped with a number of permitted bit setting function which counts the number of error bits from the compared data, compares it with the number of permitted bits, and shift clock control part 1-2 which controls those parts. When the number of error bits counted by the error bit count part 1-4 reaches the number of permitted bits, the error is discriminated, the shift operation is stopped, and an error signal is outputted.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to transmission from a base station to a mobile station in a telephone communication such as a cellular telephone system when the mobile station and the base station communicate with each other through a telephone line via a radio link. The present invention relates to a determination device for DSAT detection error in a cellular phone having a downlink communication channel.

[0002]

2. Description of the Related Art AMPS (Advanced Mobil) is generally used as a mobile telephone service system in which a cellular telephone device is used.
Phone Service) and TACS (Total Access Community)
(Nation System) and NAMPS and NTACS having low frequency data are known. This is communicated between a base station and a mobile station established in the appropriate area, the mobile station digitally processes all the data and control information to be communicated and is a logic implemented by a microprocessor. It is common for a unit to provide internal control information to a set of mobile stations, often implementing the required functionality in software.

In the above mobile telephone service system, there may be a plurality of mobile stations in the radio area of one base station, so that different mobile stations may transmit at the same time and compete with each other. The base station uses a control channel to communicate digital control information with the mobile station to control the mobile stations within the radio wave area, and to prevent the competition between them to perform normal communication. For that purpose, an air-spec, a so-called regulation, is provided to judge whether the current communication is normal or not.

In the above-mentioned air-spec, as shown in FIG. 2, a downlink communication channel message from the base station to the mobile station is displayed.
The format of the distortion is decided. In the figure, a data rate of 30 bits called a synchronization word is transmitted at NRZ of 200 bits / sec. Each data
The code is Manchester coded data of 100 bits / second and is composed of 40 bits including parity. The leftmost bit is treated as the most significant bit, and the upper 28 bits in the 40-bit field are information bits. When there is no information, a sequence of DSAT (digital monitoring audio tone) patterns of a specific color code (described later) is constantly and continuously sent. When information is present, the synchronization word + data word is added to the preceding consecutive DSAT pattern sequence.
It will be sent in a form that interrupts.

Therefore, in the message extractor of the mobile station, D
The SAT is constantly detected and the synchronization word and data word are extracted. Figure 3 shows the DSAT color code and the corresponding DS
The AT pattern is shown. Base station is a specific DSAT
The mobile station sends a pattern, and the mobile station compares and detects the received DSAT pattern and the detection DSAT pattern, but the bit value ("0" or "1") affects the radio environment and noise. The bit value mismatch is allowed to some extent. This number of bits is called the allowable number of bits, and the received DSAT pattern is judged to be the same pattern as the detection DSAT pattern if the allowable number of bits is not reached.

Conventionally, a mobile station compares a received DSAT pattern with a DSAT pattern for detection, adds the result by an adder to obtain an error bit number, and further compares it with an allowable bit number to determine an error. I was doing Another method is to output the comparison result of the reception DSAT pattern and the detection DSAT pattern bit by bit using a shift register, count the error bits and compare with the allowable number of bits. There is also a method of determining

[0007]

However, the conventional method of using the adder for counting the number of error bits and comparing the addition result with the allowable number of bits to judge the error makes the apparatus complicated. There was a problem that the device became large. In addition, the method of counting the number of error bits by shifting the error bits one bit at a time using a shift register continues the shift operation even after the number of error bits exceeds the allowable number of bits, resulting in unnecessary power consumption. There was a problem that it would increase.

The present invention has been made in view of the above-mentioned problems, and eliminates the above-mentioned problems, and when the number of error bits reaches the allowable number of bits, the shift operation is stopped to save power. It is an object of the present invention to provide a DSAT detection error determination device in.

[0009]

In order to solve the above problems, the present invention provides a DS in a cellular telephone as shown in FIG.
In the AT detection error determination device, the received DSAT pattern
DSAT pattern that compares the DSAT pattern for detection with the DSAT pattern for detection.
A comparison section 1-1, an error bit shift section 1-3 for converting and outputting the comparison data serially, and an allowable bit number setting function, and counts the error bit number from the comparison data. However, an error bit count unit 1-4 for comparing with the allowable number of bits and a shift clock control unit 1-2 for controlling them are provided, and the number of error bits counted by the error bit count unit 1-4 is When the number of allowable bits is reached, an error is determined, the shift operation is stopped, and an error signal is output.

[0010]

The present invention counts the error bits serially output from the error bit shift unit 1-3 bit by bit by the error bit count unit 1-4 and compares it with a preset allowable number of bits. Since the shift operation is stopped when the number of error bits reaches the allowable number of bits, the circuit becomes simpler than the conventional one, there is no unnecessary shift operation, and power consumption is reduced.

[0011]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS An embodiment of the present invention will be described in detail below with reference to the drawings. FIG. 1 shows D in the cellular telephone of the present invention.
It is a block diagram which shows the structure of a SAT detection error determination apparatus. As shown in the figure, the DSAT detection error determination device 1 of the present invention includes a DSAT pattern comparison unit 1-1 for comparing DSAT patterns, a shift clock control unit 1-2 for controlling shift operation, and comparison data. Is composed of an error bit shift unit 1-3 that shifts and outputs each one bit, and an error bit count unit 1-4 that counts error bits.
The received DSAT pattern is constantly compared with the detection DSAT pattern supplied from the data processing unit 2.

FIG. 3 shows the DSAT color code and the corresponding D
It is a figure which shows the example of a SAT pattern. When there is no information, the base station always sends a sequence of DSAT patterns of a particular color code repeatedly and continuously.

In the mobile station, the DS transmitted from the base station
The AT pattern signal is received and the DSAT pattern comparison unit 1
-1 for input and D for detection given from the data processing unit 2
The SAT pattern is compared bit by bit.

As a result of comparing both 24-bit DSAT patterns, "1" is given to the bit whose value does not match,
For the matched bits, a value of "0" is set for each bit and 24 bits are output in parallel (signal E).

The shift clock control unit 1-2 controls the transfer of 24-bit data from the DSAT pattern comparison unit 1-1 to the error bit shift unit 1-3 by the transfer clock CPS.
The system clock NCP shifts 24-bit data bit by bit and outputs serially.

The number of "1" s in the output signal serially shifted and output from the error bit shift unit 1-3 is counted by the error bit count unit 1-4.

On the other hand, the number of permissible bits (PM) from the data processing unit 2 is set in advance in the error counting unit 1-4. When the number of error bits counted by the error bit count section 1-4 becomes equal to the allowable number of bits, it is determined that an error has occurred and a reset signal ERR is output. The reset signal ERR is input to the shift clock controller 1-2 to stop the shift operation and output an error detection signal to the data processor 2.

When all 24 bits are counted and the number of error bits does not reach the allowable number of bits, it is determined that there is no error, and it is regarded as a match with the DSAT pattern and processed.

[0019]

As described in detail above, according to the present invention, the following excellent effects are expected. The error bit serially output from the error bit shift unit is counted by the error bit count unit, compared with the allowable number of bits, and the shift operation is stopped when the error bit reaches the allowable bit. In comparison, the circuit is simpler, there is no unnecessary shift operation, and power consumption is reduced.

[Brief description of drawings]

FIG. 1 is a block diagram showing the configuration of a DSAT detection error determination device in a cellular telephone according to the present invention.

FIG. 2 is a diagram showing the format of a downlink communication channel message stream.

FIG. 3 is a diagram showing an example of a DSAT pattern corresponding to a DSAT color code.

FIG. 4 is a diagram showing an example of a pattern of a synchronization word.

[Explanation of symbols]

 1 DSAT detection error determination device 1-1 DSAT pattern comparison unit 1-2 shift clock control unit 1-3 error bit shift unit 1-4 error bit count unit 2 data processing unit

Claims (1)

[Claims] 1. A DSAT detection error determination device for a cellular telephone, which comprises a DSAT pattern comparison unit for comparing a received DSAT pattern with a detection DSAT pattern, and an error for serially converting and outputting the comparison data. -It has a bit shift part and a function to set the allowable number of bits.
An error that counts the number of bits and compares with the allowable number of bits.
A bit count section and a shift clock control section for controlling these are provided. When the number of error bits counted by the error bit count section reaches the allowable number of bits, it is judged as an error and the shift operation is stopped A DSAT detection error determination apparatus in a cellular telephone, which outputs a signal.