JPH06260891A - Signal processor - Google Patents

Signal processor

Info

Publication number
JPH06260891A
JPH06260891A JP4547693A JP4547693A JPH06260891A JP H06260891 A JPH06260891 A JP H06260891A JP 4547693 A JP4547693 A JP 4547693A JP 4547693 A JP4547693 A JP 4547693A JP H06260891 A JPH06260891 A JP H06260891A
Authority
JP
Japan
Prior art keywords
signal
output
signal processing
sensor
delay
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP4547693A
Other languages
Japanese (ja)
Other versions
JP3290492B2 (en
Inventor
Masahiko Fujimoto
正彦 藤本
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Denso Ten Ltd
Original Assignee
Denso Ten Ltd
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Filing date
Publication date
Application filed by Denso Ten Ltd filed Critical Denso Ten Ltd
Priority to JP04547693A priority Critical patent/JP3290492B2/en
Publication of JPH06260891A publication Critical patent/JPH06260891A/en
Application granted granted Critical
Publication of JP3290492B2 publication Critical patent/JP3290492B2/en
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

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Abstract

PURPOSE:To provide a signal processor which improves S/N without attenuating or abandoning a signal. CONSTITUTION:The output of a sensor 11 is delayed by time delay elements 2i (1<=i<=N) having a unit time T. Outputs of respective delay elements and the sensor output are added by adding elements 3i (1<=i<=N) to become the output of the signal processor. If the sensor output is a periodic signal and noise is a random signal, the result of the signal processing S/N ratio is improved by 10X(logi) dB.

Description

【発明の詳細な説明】Detailed Description of the Invention

【0001】[0001]

【産業上の利用分野】本発明は信号の処理装置に係わ
り、特にS/N比を改善することの可能な信号処理装置
に関する。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a signal processing device, and more particularly to a signal processing device capable of improving the S / N ratio.

【0002】[0002]

【従来の技術】信号発生源に取り付けられるセンサ、例
えば自動車に搭載される内燃機関のノッキングを検出す
るノッキングセンサの出力には信号の他に点火信号等の
ノイズが重畳していることが普通であり、ノイズ成分を
除去するためにコイルおよびコンデンサを主素子とする
フィルタが使用されることが一般的である。
2. Description of the Related Art In addition to signals, noise such as an ignition signal is usually superimposed on the output of a sensor mounted on a signal generating source, for example, a knocking sensor for detecting knocking of an internal combustion engine mounted on an automobile. In general, a filter having a coil and a capacitor as main elements is used to remove a noise component.

【0003】[0003]

【発明が解決しようとする課題】しかしながらS/N比
を向上するために選択度Qを上げるとリンギングが発生
し、かえってS/N比が悪化してしまう場合もあった。
この問題点を解決するために広域共振型センサを使用す
る処理装置も提案されているが、信号自体も減衰してし
まう。
However, if the selectivity Q is increased in order to improve the S / N ratio, ringing may occur and the S / N ratio may deteriorate.
Although a processing device using a wide-range resonance type sensor has been proposed to solve this problem, the signal itself is also attenuated.

【0004】さらに信号発生源がノイズを発生するタイ
ミングでセンサからの出力の入力を一定期間中断する処
理装置も提案されているが、中断中は信号自体も遺棄さ
れていた。本発明はかかる問題点に鑑みなされたもので
あって、信号の減衰あるいは遺棄することなくS/N比
を改善することのできる信号処理装置を提供することを
目的とする。
Further, a processing device has been proposed in which the input of the output from the sensor is interrupted for a certain period at the timing when the signal generation source generates noise, but the signal itself was also discarded during the interruption. The present invention has been made in view of the above problems, and an object thereof is to provide a signal processing device capable of improving the S / N ratio without attenuating or discarding the signal.

【0005】[0005]

【課題を解決するための手段】第1の発明にかかる信号
処理装置は、特定周波数の信号を検出するセンサと、セ
ンサによって検出される信号をセンサの自己共振周波数
の逆数の整数倍である単位時間遅延させる遅延素子と、
遅延素子の出力と前記センサによって検出される信号と
を加算する加算素子とから構成される第1段目の信号処
理素子と、遅延素子の出力を単位時間遅延させる遅延素
子と、遅延素子の出力と前段の加算素子の出力とを加算
する加算素子と、から構成されて従続接続される2以上
の自然数であるN段の信号処理素子と、からなる信号処
理装置であって、第N段目の加算素子の出力をその出力
とする信号処理装置。
A signal processing device according to a first aspect of the present invention is a sensor for detecting a signal of a specific frequency, and a unit for which the signal detected by the sensor is an integral multiple of the reciprocal of the sensor's self-resonant frequency. A delay element for delaying time,
A first-stage signal processing element including an addition element that adds the output of the delay element and the signal detected by the sensor, a delay element that delays the output of the delay element by a unit time, and an output of the delay element And an output of the addition element of the previous stage, and an N-stage signal processing element that is a natural number of 2 or more and is cascade-connected and that is an N-th stage. A signal processing device that uses the output of the addition element of the eye as its output.

【0006】第2の発明にかかる信号処理装置は、遅延
素子の遅延時間をセンサが取り付けられる信号発生源の
周期性を有する運転状態量の整数倍とする。第3の発明
にかかる信号処理装置は、第1段目の信号処理素子にお
いて加算素子に代えてセンサの出力から遅延素子の出力
を減算する減算素子を使用する。
In the signal processing device according to the second aspect of the present invention, the delay time of the delay element is set to an integral multiple of the operating state quantity having the periodicity of the signal generation source to which the sensor is attached. In the signal processing device according to the third aspect of the present invention, the subtraction element that subtracts the output of the delay element from the output of the sensor is used instead of the addition element in the signal processing element of the first stage.

【0007】第4の発明にかかる信号処理装置は、従続
接続する前記信号処理装置の段数を前記信号発生源の運
転状態に応じて変更する。
In the signal processing device according to the fourth aspect of the present invention, the number of stages of the signal processing devices to be cascade-connected is changed according to the operating state of the signal generating source.

【0008】[0008]

【作用】第1の発明にかかる信号処理装置にあっては、
センサ出力をセンサの自己共振周波数の逆数の整数倍で
ある単位遅延時間遅延することによって周期信号化され
た信号と遅延処理されない信号とを加算することによ
り、信号は(Nの2乗)倍されるのに対し、ノイズはN
倍されるだけであるため信号処理素子をN段従続接続す
ることによりS/N比は(10×log N)dB改善され
る。
In the signal processing device according to the first invention,
The signal is multiplied by (N squared) by adding the signal that has been made into a periodic signal by delaying the sensor output by a unit delay time that is an integral multiple of the reciprocal of the self-resonant frequency of the sensor and the signal that has not been subjected to delay processing. However, the noise is N
Since it is only multiplied, the S / N ratio is improved by (10 × log N) dB by cascade-connecting the signal processing elements in N stages.

【0009】第2の発明にかかる信号処理装置にあって
は、信号発生源のノイズ発生タイミングに合わせて遅延
処理される。第3の発明にかかる信号処理装置にあって
は、遅延時間を1/2として、応答性を向上させること
が可能である。第4の発明にかかる信号処理装置にあっ
ては、信号発生源の運転状態に応じて信号処理素子の段
数を変更し、ノイズの少ない時には信号の遅れを小とす
る。
In the signal processing device according to the second aspect of the invention, the delay processing is performed in accordance with the noise generation timing of the signal generation source. In the signal processing device according to the third aspect of the invention, it is possible to reduce the delay time to half and improve the responsiveness. In the signal processing device according to the fourth aspect of the invention, the number of stages of the signal processing element is changed according to the operating state of the signal generation source, and the delay of the signal is reduced when the noise is small.

【0010】[0010]

【実施例】図1は本発明にかかる信号処理装置の実施例
の構成図であって、自動車の内燃機関に取り付けられた
ノッキングセンサの信号処理装置として使用され、処理
装置自体はマイクロコンピュータシステムとして構成さ
れる。即ちノッキングセンサ11は内燃機関に直接取り
付けられ、ノッキング発生時の内燃機関のシリンダブロ
ックの振動を検出する。
1 is a block diagram of an embodiment of a signal processing device according to the present invention, which is used as a signal processing device for a knocking sensor mounted on an internal combustion engine of an automobile, and the processing device itself serves as a microcomputer system. Composed. That is, the knocking sensor 11 is directly attached to the internal combustion engine and detects the vibration of the cylinder block of the internal combustion engine when knocking occurs.

【0011】ノッキングセンサ11の出力はマイクロコ
ンピュータシステムとして構成された信号処理部12に
入力される。信号処理部12はバス121を中心とし
て、CPU122、メモリ123およびA/Dコンバー
タ124から構成される。ノッキングセンサ11の信号
はA/Dコンバータ124でディジタル情報に変換さ
れ、メモリ123に記憶されたプログラムに従ってCP
U122内で処理される。そして処理後のノッキング信
号に基づいてノッキングを抑制するための周知の点火角
制御が実行される。
The output of the knocking sensor 11 is input to the signal processing unit 12 which is configured as a microcomputer system. The signal processing unit 12 is composed of a CPU 122, a memory 123, and an A / D converter 124 around a bus 121. The signal from the knocking sensor 11 is converted into digital information by the A / D converter 124, and the CP is converted according to the program stored in the memory 123.
It is processed in U122. Then, a known ignition angle control for suppressing knocking is executed based on the processed knocking signal.

【0012】図2は第1の実施例の機能線図であって、
ノッキングセンサ11の出力はN段従続接続された遅延
要素2i(1≦i≦N)によって遅延される。遅延素子
2iにおいてはノッキングセンサ11の共振周波数f0
Hzの逆数の整数倍(m/f0 )である単位時間Tだけ
入力信号を遅延させる。即ち、 T = m/f0 が成立する。
FIG. 2 is a functional diagram of the first embodiment,
The output of the knocking sensor 11 is delayed by a delay element 2i (1 ≦ i ≦ N) cascade-connected to N stages. In the delay element 2i, the resonance frequency f 0 of the knocking sensor 11
The input signal is delayed by a unit time T that is an integral multiple (m / f 0 ) of the reciprocal of Hz. That is, T = m / f 0 is established.

【0013】加算素子3i(1≦i≦N)においては、
遅延素子2iの出力と前段の加算素子3(i−1)とを
加算する。ここでノッキングセンサ11の出力信号をx
s (t)とすると、信号のパワPxs は式(1)で表さ
れる。
In the addition element 3i (1≤i≤N),
The output of the delay element 2i and the addition element 3 (i-1) at the preceding stage are added. Here, the output signal of the knocking sensor 11 is x
If s (t), the power Px s of the signal is expressed by equation (1).

【0014】[0014]

【数1】 [Equation 1]

【0015】ノッキングセンサ11の出力信号xs
(t)を周期T毎にi回加算した信号即ち加算素子3i
の出力をysi(t)は式(2)で表される。
Output signal x s of the knocking sensor 11
A signal obtained by adding (t) i times for each cycle T, that is, an addition element 3i
The output of y si (t) is expressed by equation (2).

【0016】[0016]

【数2】 [Equation 2]

【0017】ここでノッキングセンサ11の出力信号x
s (t)は周期Tの周期関数であるから、式(3)が成
立する。
Here, the output signal x of the knocking sensor 11
Since s (t) is a periodic function of the period T, the formula (3) holds.

【0018】[0018]

【数3】 [Equation 3]

【0019】従って式(2)は式(4)に変形できる。Therefore, the equation (2) can be transformed into the equation (4).

【0020】[0020]

【数4】 [Equation 4]

【0021】よって加算素子3iの出力ysi(t)のパ
ワPysi は式(5)で表すことが可能となる。
Therefore, the power P ysi of the output y si (t) of the adder element 3i can be expressed by the equation (5).

【0022】[0022]

【数5】 [Equation 5]

【0023】一方ノイズをxn (t)とすれば、ノイズ
のパワPxnは式(6)で表すことができる。
On the other hand, if the noise is x n (t), the power P xn of the noise can be expressed by equation (6).

【0024】[0024]

【数6】 [Equation 6]

【0025】またノイズ自体の相互パワRxnは式(7)
で表すことができ、ノイズを白色ノイズであるとすれば
その値は“0”となる。
The mutual power R xn of the noise itself is expressed by the equation (7)
If the noise is white noise, its value is “0”.

【0026】[0026]

【数7】 [Equation 7]

【0027】さらにノイズxn (t)を周期T毎にi回
加算した信号即ち加算素子3iの出力をyniは式(8)
で表される。
Further, the noise x n (t) is added i times in every cycle T, that is, the output of the adder element 3i is y ni as expressed by equation (8).
It is represented by.

【0028】[0028]

【数8】 [Equation 8]

【0029】従って加算素子3iの出力yni(t)のパ
ワPyni は式(9)で表すことができる。
Therefore, the power P yni of the output y ni (t) of the adder element 3i can be expressed by the equation (9).

【0030】[0030]

【数9】 [Equation 9]

【0031】即ち図2の構成によれば、式(5)および
(9)から明らかなように信号のパワは遅延段数の2乗
倍されるのに対しノイズのパワは遅延段数倍しかされ
ず、いわゆるS/N比は遅延段数倍改善される。ここで
遅延素子iの遅延時間Tを内燃機関の点火周期あるいは
回転周期の整数倍に設定し、ノッキングセンサ11の出
力信号xs (t)から処理後信号ysi(t)を減算する
ことにより、最も大きいノイズである点火の際のノイズ
を確実に除去することが可能となる。
That is, according to the configuration of FIG. 2, as is clear from the equations (5) and (9), the power of the signal is multiplied by the square of the number of delay stages, whereas the power of the noise is only multiplied by the number of delay stages. In other words, the so-called S / N ratio is improved by the number of delay stages. Here, the delay time T of the delay element i is set to an integral multiple of the ignition cycle or the rotation cycle of the internal combustion engine, and the post-processing signal y si (t) is subtracted from the output signal x s (t) of the knocking sensor 11. It is possible to reliably remove the noise at the time of ignition, which is the largest noise.

【0032】図3は第2の実施例の機能線図であって、
遅延素子を3段縱続接続した信号処理装置である。図2
との相違点は、遅延素子2iの遅延時間をT/2に設定
すること、および加算素子31に代えて減算素子311
を使用する点にある。この構成によれば減算素子311
の出力として図2の加算素子31の出力と同一の波形を
得ることができ、遅延時間は半分でよいため時間遅延素
子による波形のなまり量を低減することが可能となる。
FIG. 3 is a functional diagram of the second embodiment,
This is a signal processing device in which delay elements are connected in three stages. Figure 2
The difference is that the delay time of the delay element 2i is set to T / 2, and the subtraction element 311 is used instead of the addition element 31.
The point is to use. According to this configuration, the subtraction element 311
The same waveform as that of the output of the adder element 31 in FIG. 2 can be obtained as the output of the above, and since the delay time can be half, the rounding amount of the waveform by the time delay element can be reduced.

【0033】図4は第2の実施例の周波数特性図であっ
て、横軸に周波数を、縦軸に利得をとる。即ち遅延素子
2iを2のk乗段(ここでは2段)縦続接続すれば、少
なくとも 2(n−1)f0 (n=1,2,3…) の周波数、即ちノッキングセンサの共振周波数f0 の偶
数倍の周波数で利得が零となるため、ノッキングセンサ
出力に含まれる偶数次の高調波、及び周波数のノイズ成
分を確実に遮断することが可能となる。
FIG. 4 is a frequency characteristic diagram of the second embodiment, in which the horizontal axis represents frequency and the vertical axis represents gain. That is, if the delay elements 2i are cascade-connected to 2 k power stages (two stages here), at least a frequency of 2 (n-1) f 0 (n = 1, 2, 3 ...) That is, a resonance frequency f of the knocking sensor Since the gain becomes zero at a frequency that is an even multiple of 0 , it is possible to reliably block even-order harmonics and frequency noise components included in the knocking sensor output.

【0034】ここでaは遅延素子を2段(k=1)、b
は遅延素子を4段(k=2)、cは遅延素子を8段(k
=3)とした場合の周波数特性図である。なお、周波数
特性図をkを用い、さらに詳細に式で表すと、 2(n−1)f0 ±f0 ・L/2k-1 (k=1,2,3…、Lは2k-1 までの自然数)とな
る。
Here, a is a delay element in two stages (k = 1), b
Is four delay elements (k = 2), c is eight delay elements (k = 2)
3 is a frequency characteristic diagram when = 3). In addition, when the frequency characteristic diagram is expressed in more detail by using an equation, 2 (n−1) f 0 ± f 0 · L / 2 k−1 (k = 1, 2, 3, ..., L is 2 k It becomes a natural number up to -1 ).

【0035】さらに切り替えスイッチ41を追設し、内
燃機関の運転状態に応じて信号処理装置の出力を、減算
素子311、第1および第2の加算素子32および33
の間で切り替えることにより、ノイズ発生の多い時は使
用する遅延素子の段数を多くしてS/N比を改善し、ノ
イズ発生の少ない時は使用する遅延素子の段数を少なく
して遅延素子通過による時間遅れの影響を低減すること
も可能である。以上本実施例においては、ノッキングセ
ンサの信号処理装置への適用について説明したが、周期
的なノイズが重畳する環境で使用される他種類のセンサ
の信号処理装置にも適用可能であることは明らかであ
る。
Further, a changeover switch 41 is additionally provided, and the output of the signal processing device is changed to the subtracting element 311, the first and second adding elements 32 and 33 according to the operating state of the internal combustion engine.
By switching between the two, the number of stages of delay elements used is increased to improve the S / N ratio when a lot of noise is generated, and the number of stages of delay elements used is reduced to pass the delay elements when a lot of noise is generated. It is also possible to reduce the effect of time delay due to. In the present embodiment, the application of the knocking sensor to the signal processing device has been described above, but it is clear that the present invention is also applicable to the signal processing device of another type of sensor used in an environment where periodic noise is superimposed. Is.

【0036】[0036]

【発明の効果】第1の発明にかかる信号処理装置によれ
ば、周期信号であるセンサ出力とランダム信号であるノ
イズのパワ比、即ちS/N比を時間遅延の段数に応じて
改善することが可能となる。第2の発明にかかる信号処
理装置によれば、時間遅延素子の遅延時間を信号発生源
の運転状態量に応じて決定することにより、運転状態に
同期して発生するノイズを確実に除去することが可能と
なる。
According to the signal processor of the first aspect of the present invention, the power ratio of the sensor output, which is a periodic signal, and the noise, which is a random signal, that is, the S / N ratio, is improved according to the number of stages of time delay. Is possible. According to the signal processing device of the second aspect of the present invention, the delay time of the time delay element is determined according to the operating state amount of the signal generating source, thereby reliably removing noise generated in synchronization with the operating state. Is possible.

【0037】第3の発明にかかる信号処理装置によれ
ば、遅延素子の遅延時間を半分にすることが可能となり
信号のなまり量を減少することが可能となるだけでな
く、偶数次の高調波ノイズを低減することも可能とな
る。第4の発明にかかる信号処理装置によれば、運転状
態に応じて使用する遅延素子の段数を切り替えることに
より、S/N比を改善するとともに時間遅延量を減少す
ることも可能となる。
According to the signal processing device of the third invention, not only the delay time of the delay element can be halved and the rounding amount of the signal can be reduced, but also the even harmonics. It is also possible to reduce noise. According to the signal processing device of the fourth aspect of the present invention, it is possible to improve the S / N ratio and reduce the time delay amount by switching the number of stages of the delay elements used according to the operating state.

【図面の簡単な説明】[Brief description of drawings]

【図1】図1は実施例の構成図である。FIG. 1 is a configuration diagram of an embodiment.

【図2】図2は第1の実施例の機能線図である。FIG. 2 is a functional diagram of the first embodiment.

【図3】図3は第2の実施例の機能線図である。FIG. 3 is a functional diagram of the second embodiment.

【図4】図4は第2の実施例の周波数特性図である。FIG. 4 is a frequency characteristic diagram of the second embodiment.

【符号の説明】[Explanation of symbols]

11…センサ 12…マイクロコンピュータ 2i(1≦i≦N)…遅延素子 3i(1≦i≦N)…加算素子 311…減算素子 41…スイッチ 11 ... Sensor 12 ... Microcomputer 2i (1≤i≤N) ... Delay element 3i (1≤i≤N) ... Addition element 311 ... Subtraction element 41 ... Switch

Claims (4)

【特許請求の範囲】[Claims] 【請求項1】 特定周波数の信号を検出するセンサと、 該センサによって検出される信号を前記センサの自己共
振周波数の逆数の整数倍である単位時間遅延させる遅延
素子と、該遅延素子の出力と前記センサによって検出さ
れる信号とを加算する加算素子とから構成される第1段
目の信号処理素子と、 前段の遅延素子の出力を前記単位時間遅延させる遅延素
子と、該遅延素子の出力と前段の加算素子の出力とを加
算する加算素子と、から構成されて従続接続される2以
上の自然数であるN段の信号処理素子と、からなる信号
処理装置であって、 第N段目の加算素子の出力をその出力とする信号処理装
置。
1. A sensor that detects a signal of a specific frequency, a delay element that delays the signal detected by the sensor by a unit time that is an integral multiple of the reciprocal of the self-resonant frequency of the sensor, and an output of the delay element. A first stage signal processing element including an adding element for adding a signal detected by the sensor, a delay element for delaying the output of the preceding delay element by the unit time, and an output of the delay element A signal processing device comprising an adder element for adding the output of an adder element in the preceding stage, and an N-stage signal processing element that is a natural number of 2 or more and is cascade-connected Signal processing device whose output is the output of the adding element of.
【請求項2】 前記遅延素子の遅延時間を、前記センサ
が取り付けられる信号発生源の周期性を有する運転状態
量の整数倍とする請求項1に記載の信号処理装置。
2. The signal processing device according to claim 1, wherein the delay time of the delay element is an integral multiple of an operating state quantity having a periodicity of a signal generation source to which the sensor is attached.
【請求項3】 前記第1段目の信号処理素子において加
算素子に代えて前記センサの出力から遅延素子の出力を
減算する減算素子を使用する請求項1に記載の信号処理
装置。
3. The signal processing device according to claim 1, wherein a subtracting element that subtracts the output of the delay element from the output of the sensor is used instead of the adding element in the signal processing element of the first stage.
【請求項4】 従続接続する前記信号処理装置の段数を
前記信号発生源の運転状態に応じて変更する請求項1に
記載の信号処理装置。
4. The signal processing device according to claim 1, wherein the number of stages of the signal processing devices to be cascade-connected is changed according to an operating state of the signal generation source.
JP04547693A 1993-03-05 1993-03-05 Signal processing device Expired - Fee Related JP3290492B2 (en)

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JPH06260891A true JPH06260891A (en) 1994-09-16
JP3290492B2 JP3290492B2 (en) 2002-06-10

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