JPH06260611A - Method for forming capacitor of semiconductor device - Google Patents

Abstract

PURPOSE:To relax concentration of electric field at the recessed and projecting parts on the surface of a storage electrode by setting the film thickness of a first silicon oxide film out of a capacitor insulation film consisting of the first silicon oxide film, silicon nitride film, and a second silicon oxide film. CONSTITUTION:After a storage electrode 28 is formed, oxidation is made to form a first silicon oxide film 29a. The film thickness of the silicon oxide film 29a is controlled to be within 2.5nm-4.0nm. Then, after silicon oxide film 29b is deposited, one part of the upper part of the silicon nitride film 29b is oxidized to form a second silicon oxide film 29c which is approximately 2nm. When the film thickness of the silicon oxide film 29a is thinner than 2.5nm, the life is short and the effect is small. When it becomes thick, the influence of the ground becomes larger so that the thickness should be smaller than 4.0nm, thus relaxing the concentration of electric field at the recessed and projecting part on the surface of the storage electrode and improving the characteristics of the capacitor insulation film such as TDDB characteristics.

Description

Detailed Description of the Invention

[0001]

The present invention relates to a DRAM (Dynamic Ran)
The present invention relates to a method for forming a capacitor in a semiconductor device such as a dom access memory), and particularly to a method for forming the capacitor insulating film.

[0002]

2. Description of the Related Art FIG. 2 is a diagram showing a method of forming a capacitor provided in a stacked memory cell in a conventional DRAM. This memory cell is a one-transistor type memory cell including one charge transfer MOS transistor and one charge storage capacitor. In this memory cell, for example, a field oxide film 2 for element isolation is formed on a silicon substrate 1, and a field region surrounded by the field oxide film 2 has a gate insulating film 3 made of a silicon oxide film interposed therebetween. Gate electrode 4 having conductivity is formed by diffusing impurities.
Then, the impurity is diffused into the silicon substrate 1 using the gate electrode 4 as a mask to form the source 5 and the drain 6. The gate electrode 4, the source 5, and the drain 6 form a MOS transistor. A silicon oxide film 7 is deposited on the entire surface, and a cell contact 7a is formed on a part thereof by patterning. In the vicinity of the cell contact 7a, a storage electrode 8 made of polysilicon in which impurities are diffused to have conductivity is formed, and a capacitor insulating film 9 made of a silicon nitride film is deposited on the storage electrode 8, and A cell plate electrode 1 made of polysilicon on which impurities are diffused to have conductivity
0 is formed. Here, the storage electrode 8, the capacitor insulating film 9, and the cell plate electrode 10 constitute a capacitor, and the capacitor is connected to the source 5 via the cell contact 7a. After forming the MOS transistor and the capacitor, the interlayer insulating film 1 is formed on the entire surface.
1 is deposited, and the wiring 12 made of aluminum or the like is selectively formed thereon, and the manufacturing process of the memory cell is completed. In this type of capacitor forming method, if the storage electrode 8 is reduced in size as the DRAM is highly integrated and the chip size is reduced, a sufficient charge storage capacity cannot be obtained. Therefore, conventionally, a method of increasing the effective area of the storage electrode 8 by making the storage electrode 8 into a fin type or a cylindrical type has been considered. An example of this is shown in FIG.
Shown in.

FIG. 3 is a diagram showing another method for forming a capacitor in a conventional DRAM memory cell. In this capacitor forming method, instead of the storage electrode 8, the capacitor insulating film 9 and the cell plate electrode 10 in FIG. 2, the surface of the storage electrode 18 is made uneven, and the cell plate is formed on the surface of the storage electrode 18 via the capacitor insulating film 19. By forming the electrode 20, the surface area of the storage electrode 18 is increased and the capacitance is increased. With this method, it is possible to easily form an uneven shape on the surface of the storage electrode 8, and
Since the same method as the conventional memory cell manufacturing method can be used, the compatibility with the conventional method is large.

[0004]

However, in the conventional method of forming a capacitor shown in FIG. 3, although the charge storage capacity can be increased, TD which is one of the life tests against the applied voltage is performed.
There is a problem that DB (Time dependent dielectric breakdown) characteristics deteriorate and long-term reliability cannot be maintained, and it is difficult to solve it. The present invention solves the problems that the above-mentioned conventional art has, that is, the TDDB characteristics are deteriorated and the long-term reliability cannot be maintained, and the formation of a capacitor of a semiconductor device capable of obtaining a high-yield capacitor having excellent device characteristics. It provides a method.

[0005]

According to the present invention, in order to solve the above-mentioned problems, conductive polysilicon is selectively formed on a semiconductor substrate to form a storage electrode having an uneven surface, In a method of forming a capacitor of a semiconductor device, which comprises depositing a capacitor insulating film on an electrode and then forming a cell plate electrode made of conductive polysilicon on the capacitor insulating film, forming the capacitor insulating film as follows. There is. That is, the capacitor insulating film is
After the storage electrode is formed, oxidation is performed to form a first silicon oxide film having a film thickness of about 2.5 nm to 4.0 nm on the storage electrode, and a silicon nitride film is deposited on the first silicon oxide film. Then, a part of the upper portion of the silicon nitride film is oxidized to form a second silicon oxide film, and then the cell plate electrode is formed.

[0006]

According to the present invention, since the method of forming a capacitor is configured as described above, 2.5 nm of the capacitor insulating film including the first silicon oxide film, the silicon nitride film, and the second silicon oxide film is formed. The first silicon oxide film having a thickness of about 4.0 nm serves as a barrier for holes that control the current conduction mechanism of the silicon nitride film, and relaxes the electric field concentration of the uneven shape of the silicon nitride film, and further constitutes a storage electrode. It has the function of reducing the influence of polysilicon. As a result, a high-yield capacitor having excellent life characteristics can be obtained. Therefore, the above problem can be solved.

[0007]

1 (a) to 1 (c) show an embodiment of the present invention and are schematic manufacturing process diagrams of a one-transistor type DRAM memory cell having a stacked structure as in the prior art. The capacitor forming method of this embodiment will be described with reference to this drawing. Step of FIG. 1A For example, a thick field oxide film 22 is selectively formed on the surface portion of the silicon substrate 21, and element isolation is performed. After element isolation, a thin gate insulating film 23 made of a silicon oxide film is formed, and then polysilicon for forming a gate electrode is formed on the entire surface, and impurities are diffused into the polysilicon to make it conductive. Then, patterning is performed to form the gate electrode 24. Next, using the gate electrode 24 as a mask, impurities are diffused in the silicon substrate 21, and the source 25
And the drain 26 is formed. As a result, a MOS transistor including the gate electrode 24, the source 25, and the drain 26 is formed.

A silicon oxide film 27 is grown on the entire surface of the step shown in FIG . 1B and patterned to form a cell contact 27a on the source 25. After forming the cell contact 27a, for example, LPCVD
Polysilicon for forming a storage electrode is formed using a (low pressure chemical vapor deposition) method. At the time of forming this polysilicon, formation conditions such as temperature and pressure in LPCVD are changed from normal conditions (for example, if the temperature is 620 ° C. is 5
70 ° C.) to make the surface uneven and increase the surface area. The surface of the polysilicon becomes uneven,
This is due to a migration phenomenon at the time of crystallization of silicon. Impurities are diffused into such uneven polysilicon to make it conductive, and the storage electrode 28 is formed by patterning. After forming the storage electrode 28, oxidation is performed to form a first silicon oxide film 29a. The thickness of the silicon oxide film 29a is 2.5 nm
Control in the range of 4.0 nm. Then, for example, LPCVD
After the silicon nitride film 29b is deposited by the method, a part of the upper portion of the silicon nitride film 29b is oxidized to form a second silicon oxide film 29c of about 2 nm. The first silicon oxide film 29a, the silicon nitride film 29b, and the second silicon
Of the silicon oxide film 29c of the capacitor insulating film 29
Will be formed. After the capacitor insulating film 29 is formed, polysilicon to be a cell plate electrode is formed, impurities are diffused in the polysilicon to make it conductive, and patterning is performed to form a cell plate electrode 30.
The storage electrode 28, the capacitor insulating film 29, and the cell plate electrode 30 form a capacitor. Here, the reason for controlling the film thickness of the first silicon oxide film 29a in the capacitor insulating film 29 within the range of 2.5 nm to 4.0 nm will be described with reference to FIG. FIG. 4 is a TDD showing the life with respect to the applied voltage in the silicon oxide film.
It is a measurement diagram of B characteristics. As shown in this figure, when the thickness of the silicon oxide film 29a is thinner than 2.5 nm, the life is short and the effect is small. This is the silicon nitride film 29b
This is because the hole is dominant in the conduction mechanism of the current, and by making the silicon oxide film 29a thicker than 2.5 nm, it becomes a barrier of the hole and the electric field concentration in the concave portion and the convex portion is alleviated. On the contrary, the silicon oxide film 29 on the storage electrode 28 made of polysilicon containing a large amount of impurities.
In general, the film quality of a is greatly deteriorated due to the influence of the underlying polysilicon, and it is desirable that the film be as thin as possible. However, in the case of polysilicon having unevenness on the surface, deterioration due to electric field concentration in the unevenness is larger than deterioration of the film quality. Therefore, the silicon oxide film 29a
Is better than 2.5 nm, but if it is too thick, the influence of the base becomes larger, so it is better to be thinner than 4.0 nm. This silicon oxide film 29a can be formed by normal thermal oxidation, but the thermal oxidation rate of polysilicon containing a large amount of impurities is very fast, and the oxidation rate greatly differs due to a slight difference in impurity concentration. Therefore, it is difficult to accurately form a very thin silicon oxide film 29a having a thickness of 2.5 nm to 4.0 nm. Therefore, in this embodiment, for example, the silicon oxide film 29a is formed by immersing in a solution (H ₂ SO ₄ + HCl).

After forming a capacitor composed of the storage electrode 28, the capacitor insulating film 29, and the cell plate electrode 30 of FIG . 1C , an interlayer insulating film 31 is deposited on the entire surface, and after predetermined patterning, The formation of the stacked type memory cell is completed by forming the wiring 32 of aluminum or the like.

As described above, this embodiment has the following advantages. In the step of forming the capacitor of FIG. 1B, the first silicon oxide film 29a and the silicon nitride film 29 are formed on the storage electrode 28 having an uneven surface.
Since the film thickness of the first silicon oxide film 29a is set to about 2.5 nm to 4.0 nm when the capacitor insulating film 29 having a three-layer structure composed of b and the second silicon oxide film 29c is formed, TDDB A capacitor having improved characteristics and long-term reliability can be obtained. The present invention is not limited to the above embodiment, and various modifications can be made. For example, the silicon oxide film 29a may be formed using a solution other than (H ₂ SO ₄ + HCl), or may be formed using another oxidation method whose film thickness can be easily controlled. In addition, in the steps of FIGS.
Each of these steps can be executed by using a method other than the above, or the present invention can be applied to a semiconductor device other than the DRAM memory cell.

[0011]

As described above in detail, according to the present invention, the first silicon oxide among the capacitor insulating films formed of the first silicon oxide film, the silicon nitride film, and the second silicon oxide film is used. Since the thickness of the film is set to about 2.5 nm to 4.0 nm, the electric field concentration on the uneven portion of the surface of the storage electrode is relieved and is not affected by the underlying storage electrode. The characteristics can be improved, and a capacitor with excellent long-term reliability can be realized.

[Brief description of drawings]

FIG. 1 is a schematic manufacturing process diagram of a memory cell showing a capacitor forming method according to an embodiment of the present invention.

FIG. 2 is a schematic cross-sectional view of a memory cell showing a conventional method for forming a capacitor.

FIG. 3 is a schematic cross-sectional view of a memory cell showing another conventional method for forming a capacitor.

FIG. 4 is a TDDB characteristic diagram of FIG.

[Explanation of symbols]

 21 Silicon Substrate 23 Gate Insulating Film 24 Gate Electrode 25 Source 26 Drain 27 Silicon Oxide Film 27a Cell Contact 28 Storage Electrode 29 Capacitor Insulating Films 29a, 29c First and Second Silicon Oxide Film 29b Silicon Nitride Film 30 Cell Plate Electrode

Claims (1)

[Claims] 1. A conductive polysilicon is selectively formed on a semiconductor substrate to form a storage electrode having an uneven surface, a capacitor insulating film is deposited on the storage electrode, and then the capacitor insulating film is formed. In a method of forming a capacitor of a semiconductor device, in which a cell plate electrode made of conductive polysilicon is formed on the capacitor insulating film, the capacitor insulating film is oxidized after the storage electrode is formed to have a film thickness of 2.5 nm or more on the storage electrode. A first silicon oxide film having a thickness of about 4.0 nm is formed, a silicon nitride film is deposited on the first silicon oxide film, and a part of the upper portion of the silicon nitride film is oxidized to form a second silicon oxide film. A method of forming a capacitor in a semiconductor device, comprising forming the cell plate electrode after forming a film.