JPH06260520A - Wire bonding method - Google Patents
Wire bonding methodInfo
- Publication number
- JPH06260520A JPH06260520A JP5044978A JP4497893A JPH06260520A JP H06260520 A JPH06260520 A JP H06260520A JP 5044978 A JP5044978 A JP 5044978A JP 4497893 A JP4497893 A JP 4497893A JP H06260520 A JPH06260520 A JP H06260520A
- Authority
- JP
- Japan
- Prior art keywords
- bonding
- bonding pad
- semiconductor chip
- wire
- mounting
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Withdrawn
Links
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/74—Apparatus for manufacturing arrangements for connecting or disconnecting semiconductor or solid-state bodies
- H01L24/78—Apparatus for connecting with wire connectors
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/4805—Shape
- H01L2224/4809—Loop shape
- H01L2224/48091—Arched
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/481—Disposition
- H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/48225—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
- H01L2224/48227—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation connecting the wire to a bond pad of the item
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/484—Connecting portions
- H01L2224/4847—Connecting portions the connecting portion on the bonding area of the semiconductor or solid-state body being a wedge bond
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/74—Apparatus for manufacturing arrangements for connecting or disconnecting semiconductor or solid-state bodies and for methods related thereto
- H01L2224/78—Apparatus for connecting with wire connectors
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/74—Apparatus for manufacturing arrangements for connecting or disconnecting semiconductor or solid-state bodies and for methods related thereto
- H01L2224/78—Apparatus for connecting with wire connectors
- H01L2224/7801—Means for cleaning, e.g. brushes, for hydro blasting, for ultrasonic cleaning, for dry ice blasting, using gas-flow, by etching, by applying flux or plasma
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L2224/85—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a wire connector
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L2224/85—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a wire connector
- H01L2224/85009—Pre-treatment of the connector or the bonding area
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L2224/85—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a wire connector
- H01L2224/85009—Pre-treatment of the connector or the bonding area
- H01L2224/8501—Cleaning, e.g. oxide removal step, desmearing
- H01L2224/85012—Mechanical cleaning, e.g. abrasion using hydro blasting, brushes, ultrasonic cleaning, dry ice blasting, gas-flow
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L2224/85—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a wire connector
- H01L2224/852—Applying energy for connecting
- H01L2224/85201—Compression bonding
- H01L2224/85205—Ultrasonic bonding
Abstract
Description
【０００１】[0001]
【産業上の利用分野】本発明は、ワイヤボンディング方
法の改良に関する。FIELD OF THE INVENTION The present invention relates to improvements in wire bonding methods.
【０００２】[0002]
【従来の技術】実装用基板面に、ＩＣ素子などの半導体
チップを搭載・実装して構成されるモジュールは、電子
部品ないし回路素子として広く実用に供されている。そ
して、この種モジュールの構成においては、実装用基板
面の所定位置に、半導体チップをマウントするととも
に、一方では、前記半導体チップをマウントする領域周
辺に予め配置・形設されているボンディングパッド面
と、半導体チップ面の電極端子との間をワイヤボンディ
ングにより電気的に接続している。すなわち、予め所定
領域面にマウント剤や半田を塗布・被着した実装用基板
面に、たとえばチップコンデンサーを半田付けするとと
もに、ＩＣ素子などの半導体チップをマウントした
後、、ステージ面に載置・固定し、いわゆるボンディン
グ装置の駆動、換言するとボンディングツールを介して
のボンディング用ワイヤの供給、および順次供給される
ワイヤのボンディングツールによる圧接・切断など反復
的な動作によって、前記実装用基板面のボンディングパ
ッドと、対応する半導体チップ面の電極端子との間の電
気的な接続をワイヤボンディングによって行っている。
なお、このワイヤボンディングに当たっては、信頼性の
高いワイヤボンディングを達成するため、一般的に、前
記実装用基板のボンディングパッド面を、予め洗浄液に
よって清浄化している。つまり、上記半導体チップのマ
ウントに先立って、マウント剤や半田用のフラックスな
どが所定領域面に塗布・被着されている。そして半導体
チップをマウントした後、そのマウント剤をキュアさせ
て半導体チップを固定する段階で、マウント剤などから
溶剤が放出されたりすることに伴い、ボンディングパッ
ド面が汚染して、確実なワイヤボンディングを成し得な
い場合がしばしば認められるからである。2. Description of the Related Art A module constituted by mounting and mounting a semiconductor chip such as an IC element on a mounting substrate surface is widely put to practical use as an electronic component or a circuit element. In the configuration of this type of module, a semiconductor chip is mounted at a predetermined position on the mounting substrate surface, and on the other hand, a bonding pad surface that is arranged and shaped in advance around a region where the semiconductor chip is mounted is formed. , And the electrode terminals on the semiconductor chip surface are electrically connected by wire bonding. That is, for example, a chip capacitor is soldered to a mounting substrate surface on which a mounting material or solder has been applied and adhered to a predetermined area surface in advance, and a semiconductor chip such as an IC element is mounted, and then mounted on a stage surface. Bonding of the surface of the mounting substrate by fixing, driving a so-called bonding device, in other words, supplying a bonding wire through a bonding tool, and pressing and cutting the sequentially supplied wires with the bonding tool. Electrical connection between the pad and the corresponding electrode terminal on the semiconductor chip surface is performed by wire bonding.
In this wire bonding, in general, the bonding pad surface of the mounting substrate is previously cleaned with a cleaning liquid in order to achieve highly reliable wire bonding. That is, prior to the mounting of the semiconductor chip, a mounting material, a flux for soldering, etc. are applied and adhered to the surface of a predetermined area. After mounting the semiconductor chip, at the stage where the mounting agent is cured to fix the semiconductor chip, the bonding pad surface is contaminated due to the release of the solvent from the mounting agent, etc., and reliable wire bonding is performed. This is because there are often cases where it cannot be done.
【０００３】[0003]
【発明が解決しようとする課題】しかしながら、上記ワ
イヤボンディング方法においては、実用上次のような問
題がある。すなわち、半導体チップのマウント後、その
半導体チップがマウントされた実装用基板を洗浄液中に
浸漬し、たとえば超音波を印加して超音波洗浄を施した
場合、ボンディングパッド面の清浄化を図り得る反面、
前記および洗浄液超音波の相互作用によって、ボンディ
ングパッド膜（層）の接着（密着）強度の低下が起こ
り、結果的にボンディングパッドの剥離を招来し易く、
歩留まりの低下および MCMとしての信頼性低下をもたら
している。こうした事情に基づいて、前記ボンディング
パッド面の清浄化は、いわゆる手作業による部分洗浄で
対応している。しかし、その作業が煩雑であり、特に高
密度実装化に伴うボンディングパッドの微細化や微小ピ
ッチ化により、前記手作業による部分洗浄も一層困難と
なって、非量産的で、多量生産性に適さないことから由
々しい問題を提起しているといえる。However, the above wire bonding method has the following practical problems. That is, after mounting the semiconductor chip, the mounting substrate on which the semiconductor chip is mounted is immersed in a cleaning liquid, and when ultrasonic cleaning is performed by applying ultrasonic waves, for example, the bonding pad surface can be cleaned. ,
Due to the interaction of the cleaning liquid ultrasonic wave and the cleaning liquid ultrasonic wave, the bonding (adhesion) strength of the bonding pad film (layer) is lowered, and as a result, the bonding pad is easily peeled off.
This results in a decrease in yield and a decrease in reliability as an MCM. Based on these circumstances, the cleaning of the bonding pad surface is supported by so-called manual partial cleaning. However, the work is complicated, and due to the miniaturization and fine pitch of the bonding pad especially with the high-density mounting, the partial cleaning by the manual work becomes more difficult, and the non-mass production is suitable for the mass production. It can be said that it poses a serious problem because it does not exist.
【０００４】本発明はこのような事情に対処してなされ
たもので、量産的で、かつ信頼性の高い実装回路装置の
構成が可能なワイヤボンディング方法の提供を目的とす
る。The present invention has been made in view of such circumstances, and an object of the present invention is to provide a wire bonding method which is mass-producible and capable of forming a highly reliable mounted circuit device.
【０００５】[0005]
【課題を解決するための手段】本発明に係るワイヤボン
ディング方法は、実装用基板面に半導体チップをマウン
トし、この半導体チップの電極端子を前記実装用基板の
ボンディングパッドにワイヤボンディングするワイヤボ
ンディング方法において、前記ワイヤボンディングに先
立って実装用基板のボンディングパッド面に、超音波お
よび荷重を印加し、前記ボンディングパッド面を清浄化
することを特徴とする。According to the wire bonding method of the present invention, a semiconductor chip is mounted on the surface of a mounting substrate, and the electrode terminals of the semiconductor chip are wire bonded to the bonding pads of the mounting substrate. In the above method, ultrasonic waves and a load are applied to the bonding pad surface of the mounting substrate prior to the wire bonding to clean the bonding pad surface.
【０００６】本発明において、実装用基板のボンディン
グパッド面に、超音波および荷重を印加し、ボンディン
グパッド面を清浄化する場合、通常のワイヤボンディン
グ用のボンディングツールに較べて、その先端面積がや
や大きめのボンディングツールを用いることが望まし
く、また印加する超音波出力，荷重および印加時間は、
前記ボンディングパッド面を破損しない程度の範囲、た
とえば超音波出力0.05〜0.3 W程度、荷重15〜15gf程
度、印加時間10〜50msec程度にそれぞれ選択・設定すれ
ばよい。In the present invention, when ultrasonic waves and a load are applied to the bonding pad surface of the mounting substrate to clean the bonding pad surface, the tip area of the bonding tool is slightly smaller than that of a normal bonding tool for wire bonding. It is desirable to use a large bonding tool, and the applied ultrasonic output, load and application time are
The ultrasonic wave output may be selected to be about 0.05 to 0.3 W, the load may be about 15 to 15 gf, and the application time may be about 10 to 50 msec.
【０００７】[0007]
【作用】本発明によれば、超音波および荷重の印加によ
って、各ボンディングパッド面の清浄化が容易になされ
る。すなわち、マウント剤のキュアで半導体チップが固
定される段階で、マウント剤などから放出された溶剤な
どの付着によって汚染しているボンディングパッド面
は、前記超音波および荷重の印加により付着物が容易
に，また確実にボンディングパッド面から離脱し、清浄
な面を露出する反面、前記超音波洗浄は対応するボンデ
ィングパッド面に荷重が印加された状態で行われるの
で、ボンディングパッド自体の離脱・損傷なども回避さ
れる。According to the present invention, the surface of each bonding pad can be easily cleaned by applying ultrasonic waves and a load. That is, when the semiconductor chip is fixed by the curing of the mount agent, the bonding pad surface which is contaminated by the adhesion of the solvent released from the mount agent or the like easily adheres to the bonding pad surface by the application of the ultrasonic wave and the load. ， Although it is surely separated from the bonding pad surface to expose a clean surface, the ultrasonic cleaning is performed with a load applied to the corresponding bonding pad surface, so that the bonding pad itself may be separated or damaged. Avoided.
【０００８】[0008]
【実施例】以下図１ (a)〜 (d)および図２を参照して本
発明の実施例を説明する。Embodiments of the present invention will be described below with reference to FIGS. 1 (a) to 1 (d) and FIG.
【０００９】図１ (a)〜 (d)は本発明に係るワイヤボン
ディング方法の実施態様を、工程順に模式的に示したも
ので、先ず、図１ (a)に断面的に示すような、実装用基
板面１に所要の電子部品、たとえばチップコンデンサー
２を配線パターン3a，3b間に半田付け４で接続・配置す
る一方、マウント剤５を介して半導体チップ６をマウン
トした実装回路基板を用意した。なお、図１において、
７はボンディングパッド、８は前記ボンディングパッド
７面に付着した付着物（汚染物）である。1 (a) to 1 (d) schematically show an embodiment of a wire bonding method according to the present invention in the order of steps. First, as shown in a sectional view in FIG. 1 (a), A mounting circuit board is prepared in which required electronic components such as a chip capacitor 2 are connected and arranged between the wiring patterns 3a and 3b by soldering 4 on the mounting board surface 1 while a semiconductor chip 6 is mounted via a mounting agent 5. did. In addition, in FIG.
Reference numeral 7 is a bonding pad, and 8 is a deposit (contaminant) attached to the surface of the bonding pad 7.
【００１０】次いで、図１ (b)に断面的に示すごとく、
前記実装回路基板の付着物８が付着したボンディングパ
ッド７面に、超音波印加出力 0.1 W，荷重 20 gf程度の
ボンディングツール９の先端面を対接し、たとえば30ms
ec程度の時間超音波を印加して、ボンディングパッド７
面の所要領域を超音波清浄化処理する。前記の超音波清
浄化処理により、図１ (c)に断面的に示すごとく、所要
領域の付着物（汚染物）８選択的に剥離・除去され、清
浄化したボンディングパッド７面が露出される。このよ
うにして、清浄化したボンディングパッド７面が露出さ
せた後、図１ (d)に断面的に示すごとく、前記清浄化面
を一方のボンディング面とし、常套のワイヤボンディン
グ手段により、前記マウントされている半導体チップ６
の対応する電極端子との間をワイヤ10でボンディングす
る。Next, as shown in a sectional view in FIG.
The tip of a bonding tool 9 having an ultrasonic wave applied output of 0.1 W and a load of about 20 gf is brought into contact with the surface of the bonding pad 7 to which the adhered matter 8 of the mounting circuit board adheres.
Apply ultrasonic waves for about ec to bond pad 7
The required area of the surface is ultrasonically cleaned. By the ultrasonic cleaning process, as shown in a sectional view in FIG. 1 (c), the adhered substances (contaminants) 8 in a required area 8 are selectively peeled and removed to expose the cleaned bonding pad 7 surface. . In this way, after the cleaned bonding pad 7 surface is exposed, as shown in a sectional view in FIG. 1D, the cleaning surface is used as one bonding surface, and the mount is mounted by a conventional wire bonding means. Semiconductor chip 6
The wire 10 is bonded to the corresponding electrode terminal of.
【００１１】前記手法にによって、実装回路基板面にお
ける面の大きさ64×61mm，ピッチ 0.1mm以下に形設され
たボンディングパッド７面とマウントされた半導体チッ
プ６の電極端子とを対応させてワイヤボンディングを行
い、接続の信頼性を評価したところ従来の手法に較べ
て、作業時間の大幅な低減および歩留まりの向上を図り
得た。 なお、上記では実装回路基板面に半導体チップ
６をマウントしたとき、マウント剤から放出された溶剤
で汚染したボンディングパッド７面の洗浄化につき例示
したが、たとえば図２に平面的に示すごとく、実装回路
基板１面のシールリング11面に予備半田層を形成すると
き、半田から噴出したフラックスが、隣接した領域に形
設されているボンディングパッド７面に付着して汚染し
ている場合にも有効である。すなわち、前記半田フラッ
クスで汚染されたボンディングパッド７面に、超音波印
加出力 0.1 W，荷重 20 gfの洗浄用ボンディングツール
の先端面を対接し、たとえば30msec程度の時間超音波を
印加した場合、半田フラックスはほぼ完全に除去され、
ボンディングパッド７は清浄な面を露出した。According to the above method, the bonding pad 7 surface formed to have a surface size of 64 × 61 mm and a pitch of 0.1 mm or less on the surface of the mounting circuit board and the electrode terminals of the mounted semiconductor chip 6 are made to correspond to each other. When bonding was performed and the reliability of the connection was evaluated, it was possible to significantly reduce the working time and improve the yield compared to the conventional method. In the above, when the semiconductor chip 6 is mounted on the surface of the mounting circuit board, the cleaning of the surface of the bonding pad 7 contaminated by the solvent released from the mount agent is illustrated, but as shown in plan view in FIG. When forming a preliminary solder layer on the seal ring 11 side of the circuit board 1 side, it is also effective when the flux ejected from the solder adheres to the surface of the bonding pad 7 formed in the adjacent area and is contaminated. Is. That is, when the tip surface of a cleaning bonding tool having an ultrasonic wave application output of 0.1 W and a load of 20 gf is brought into contact with the bonding pad 7 surface contaminated with the solder flux and ultrasonic waves are applied for a time of, for example, about 30 msec, The flux is almost completely removed,
The bonding pad 7 has a clean surface exposed.
【００１２】[0012]
【発明の効果】このように本発明に係るワイヤボンディ
ング方法によれば、いわゆる実装回路装置の構成過程に
おいて、洗浄液など使用せずに、またボンディングパッ
ドなどの損傷など招来することなく、半田フラックスな
どによるボンディングパッド面の汚染状態を、容易かつ
確実に清浄化することが可能である。つまり、本発明方
法は、量産的に信頼性の高い実装回路装置の製造・構成
に好適する手段といえる。As described above, according to the wire bonding method of the present invention, in the so-called mounting circuit device forming process, the solder flux or the like is used without using a cleaning liquid or the like and without causing damage to the bonding pad or the like. It is possible to easily and surely clean the contamination state of the bonding pad surface due to. That is, the method of the present invention can be said to be a means suitable for manufacturing and configuring a mounted circuit device which is highly reliable in mass production.
【図１】本発明に係るワイヤボンディング方法の実施態
様例を模式的に示すもので、(a)は実装回路基板面に半
導体チップをマウントした後の状態を示す断面図、(b)
は実装回路基板の汚染しているボンディングパッド面に
洗浄用の超音波ボンディングツールを配置した状態を示
す断面図、 (c)は汚染していたボンディングパッド面の
一部を清浄化した状態を示す断面図、 (d)は清浄化した
ボンディングパッド面にワイヤをボンディングした状態
を示す断面図。FIG. 1 schematically shows an embodiment of a wire bonding method according to the present invention, in which (a) is a cross-sectional view showing a state after a semiconductor chip is mounted on the surface of a mounting circuit board, (b).
Is a cross-sectional view showing a state in which an ultrasonic bonding tool for cleaning is arranged on the contaminated bonding pad surface of the mounting circuit board, and (c) shows a state in which a part of the contaminated bonding pad surface is cleaned. Sectional view, (d) is a sectional view showing a state in which a wire is bonded to the cleaned bonding pad surface.
【図２】本発明に係るワイヤボンディング方法が適用さ
れる実装回路基板面のボンディングパッドなどの他の配
置例を示す平面図。FIG. 2 is a plan view showing another example of arrangement of bonding pads and the like on the surface of a mounted circuit board to which the wire bonding method according to the present invention is applied.
１…実装用基板 ２…チップコンデンサー 3a，3b
…回路パターン ４…半田付け ５…マウント剤
６…半導体チップ ７…ボンディングパッド ８
…ボンディングパッド面の付着物（汚染） ９…洗浄
用のボンディングツール 10…ワイヤ（ボンディング
ワイヤ）1 ... Mounting substrate 2 ... Chip capacitors 3a, 3b
… Circuit pattern 4… Soldering 5… Mounting agent
6 ... Semiconductor chip 7 ... Bonding pad 8
… Adhesion (contamination) on the bonding pad surface 9… Bonding tool for cleaning 10… Wire (bonding wire)
Claims (1)
し、この半導体チップの電極端子を前記実装用基板のボ
ンディングパッドにワイヤボンディングするワイヤボン
ディング方法において、 前記ワイヤボンディングに先立って、実装用基板のボン
ディングパッド面に、超音波および荷重を印加し、前記
ボンディングパッド面を清浄化することを特徴とするワ
イヤボンディング方法。1. A wire bonding method for mounting a semiconductor chip on the surface of a mounting substrate and wire-bonding the electrode terminals of the semiconductor chip to bonding pads of the mounting substrate, the method comprising the steps of: A wire bonding method comprising applying ultrasonic waves and a load to the bonding pad surface to clean the bonding pad surface.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP5044978A JPH06260520A (en) | 1993-03-05 | 1993-03-05 | Wire bonding method |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP5044978A JPH06260520A (en) | 1993-03-05 | 1993-03-05 | Wire bonding method |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPH06260520A true JPH06260520A (en) | 1994-09-16 |
Family
ID=12706563
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP5044978A Withdrawn JPH06260520A (en) | 1993-03-05 | 1993-03-05 | Wire bonding method |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH06260520A (en) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2002231754A (en) * | 2001-02-05 | 2002-08-16 | Nec Corp | Manufacturing method for semiconductor device |
-
1993
- 1993-03-05 JP JP5044978A patent/JPH06260520A/en not_active Withdrawn
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2002231754A (en) * | 2001-02-05 | 2002-08-16 | Nec Corp | Manufacturing method for semiconductor device |
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Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| A300 | Withdrawal of application because of no request for examination |
Free format text: JAPANESE INTERMEDIATE CODE: A300 Effective date: 20000509 |