JPH06252984A - Data transmission terminal equipment - Google Patents

Abstract

PURPOSE:To quickly execute a return operation of the terminal equipment by charging a capacitor by receiving a polling text, resetting the terminal equipment, when it becomes a prescribed potential, discharging the capacitor and reinitializing the terminal equipment. CONSTITUTION:A host equipment sends repeatedly a polling text to the terminal equipment, and continues to wait for an answer text from the terminal equipment. To a capacitor 5 of the terminal equipment which comes to be unable to execute transmission with respect to a received signal from the host equipment, charge is charged continuously and the potential rises, and in the end, when it becomes the charge potential exceeding a detection level, it is decided by a comparator 7 that the terminal equipment is executing a malfunction, a CPU 2a is reset, and also, a transistor 8 is turned on and discharge of the capacitor 5 is executed, the terminal equipment is reinitialized and the equipment is returned. That is, even in the case the terminal equipment is subjected to malfuction due to a disturbance, etc., an operation stop state of the terminal equipment is decided and reset is applied.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a data transmission terminal device capable of self-recovering even when a terminal device having a transmission function for transmitting data according to an instruction from a host device malfunctions.

[0002]

2. Description of the Related Art As an example, in FIG. 4 showing an example of the configuration of a factory FA system, terminal equipment 2 controls factory equipment and collects data to upper equipment 1 according to instructions from higher equipment 1. A system of sending can be built.

In such a system, if the terminal device 2 is put into an operation stop state due to a disturbance or the like, it seriously hinders the operation of the factory, so it is necessary to sufficiently consider noise resistance measures. In addition, even if the software does not respond to the higher-level device 1 due to a runaway, it causes a serious trouble as described above. Therefore, a watchdog timer is provided so that recovery from a software runaway can be performed. ing.

[0004]

However, in reality, in reality,
Nevertheless, in the terminal device 2 shown in FIG. 5, the CPU 2a may run away or the transmission control LSI 2b may be locked due to the influence of disturbance or the like, and the operation may be stopped.

In such a case, for example, the transmission control LSI 2
When b is locked, the watchdog timer does not operate because the CPU 2a itself is normal, and in order to restore the function of the terminal device 2, the power of the terminal device 2 is turned on / off to perform a power-on reset. Become.

[0006] When the operation of the terminal device 2 is stopped, a serviceman goes out to deal with the operation of the terminal device 2 each time, and a person in charge must spend a lot of effort for the power-on reset. SUMMARY OF THE INVENTION The present invention has been made in view of the above problems, and an object thereof is to provide a data transmission terminal device that restores the operation stop of the terminal device without labor of an attendant.

[0007]

Means for Solving the Problems The present invention which achieves the above-mentioned object is provided in a data transmission terminal device having a transmission function in which a communication function is activated by a polling text from a host device, by receiving the polling text. A comparator that has a capacitor charging / discharging circuit that charges the capacitor and sends a response text and discharges at the reset output, compares the potential of the capacitor with a fixed value, and obtains the reset output by raising the potential of the capacitor by multiple polling texts. The gist is that the output terminal of the comparator is connected to the reset terminal of the terminal device.

[0008]

When the terminal device is normal in the interaction between the host device and the terminal device, the polling text and the response text are paired for transmission and reception as shown in FIG. When the operation is stopped,
As shown in, the transmission of only the polling text is repeated (retryed), and the response text cannot be returned.

Paying attention to such a point, the capacitor is charged by receiving the polling text, the terminal device is reset when the potential becomes constant, and the capacitor is discharged by the reset or the transmission of the response text at the normal time. By doing so, the terminal device can be reinitialized, so that the recovery operation of the terminal device can be performed quickly.

[0010]

EXAMPLES Examples of the present invention will now be described with reference to FIGS. Figure 1 is an internal block of the terminal equipment,
2a is a CPU and 2b is a transmission control LSI. The transmission control LSI 2b is connected to the receiving unit 2c via a receiving line, and is also connected to the transmitting unit 2d via a transmitting line.

A backflow prevention diode 3 and a resistor 4 for determining an integration time constant are sequentially connected from the reception line, and then a ground capacitor 5 for determining an integration time constant, a bias resistor 6 for a transistor, and a comparator. 7-inputs are respectively branched and connected.

In this case, the transistor 8 having the bias resistor 6 is for discharging the charge stored in the capacitor 5 when the emitter is grounded and turned on, and the comparator 7 is connected to the charge potential of the capacitor 5. To compare with the detection level. The output terminal of the comparator 7 is connected to the reset terminal of the CPU 2a via the OR circuit, and a reset signal is output when the charging potential of the capacitor 5 becomes equal to or higher than the detection level.

The output terminal of the comparator 7 is also connected to the base of the transistor 8 via an OR circuit, and the transistor 8 is turned on when the charging voltage of the capacitor 5 exceeds the detection level and a reset signal is output. By doing so, the electric charge in the capacitor 5 is discharged.

The transmission line is also connected to the base of the transistor 8 via the OR circuit, and the transmission signal turns on the transistor 8 to discharge the electric charge in the capacitor 5.

In such a circuit, the received signal from the host device is passed through the diode 3 and the resistor 4 and the capacitor 5
Are integrated by the time constants of and, and the capacitor 5 starts to be charged. When the terminal device 2 operates normally in response to the received signal from the host device and the transmission signal is returned from the transmission control LSI 2b, the transistor 8 is turned on by the transmission signal from the transmission line and the capacitor 5 is charged. Discharge the electric charge that is being stored. This state is the state shown in FIG. Next, when the terminal device malfunctions due to the influence of disturbance or the like, the terminal device cannot return the response text to the polling text from the host device.

Therefore, the host device repeatedly sends the polling text to the terminal device and continues to wait for the response text from the terminal device. As shown in FIGS. 2B, 2C, 2D, and 2D, the capacitor 5 of the terminal device that cannot transmit the received signal from the host device continues to be charged, and the potential rises. When the charging potential exceeds the detection level in 7, it is determined that the terminal device is malfunctioning, the CPU 2a is reset, the transistor 8 is turned on, the capacitor 5 is discharged, and the terminal device is reinitialized. Is performed and the function is restored.
The diode 3 is for cutting off the current in the direction of the resistor 4 due to the charging potential of the capacitor 5.
FIG. 3 is an overall configuration diagram including the host device 1, and the terminal device 20 is similar to FIG. 1 except that the OR circuit and the like are omitted.

[0017]

As described above, according to the present invention, even if the terminal device malfunctions due to disturbance or the like, the operation stop state of the terminal device is judged at the timing of transmission / reception and the terminal device is reset. Can be done quickly and easily.

[Brief description of drawings]

FIG. 1 is a block diagram of an embodiment of the present invention.

FIG. 2 is a diagram showing a message response example of a higher-level device and a terminal device, and a capacitor charging state.

FIG. 3 is a block diagram showing the whole.

FIG. 4 is a block diagram of a conventional example.

FIG. 5 is a block diagram of an internal device of the terminal device.

FIG. 6 is a diagram showing an example of a telegram response during normal operation.

FIG. 7 is a diagram showing an example of a telegram response when an abnormality occurs.

[Explanation of symbols]

 1 Upper device 2 Terminal device 2a CPU 2b Transmission control LSI 5 Capacitor 7 Comparator 8 Transistor 20 Terminal device

Claims (1)

[Claims] 1. In a data transmission terminal device having a transmission function in which a communication function is activated by a polling text from a higher-level device, a capacitor is charged when the polling text is received and a response text is sent and a reset output is discharged. It is equipped with a capacitor charging / discharging circuit that compares the potential of the capacitor with a constant value and obtains the reset output by raising the potential of the capacitor by multiple polling texts.The output terminal of this comparator is used as the reset terminal of the terminal device. Connected, data transmission terminal equipment characterized by the following.