JPH06252415A - Semiconductor device and manufacture thereof - Google Patents

Abstract

PURPOSE:To shut out the leak current flowing through a silicon substrate from the structure containing a conduction channel or a quantum line in a quantization functional element or various kinds of elements. CONSTITUTION:The first silicon oxide film 17, surrounding the prescribed region is formed on a silicon substrate 11, and a source 13 and a drain 14 are formed on a quantum wire 16 and both ends of the above-mentioned region. Then, a part of the silicon substrate 11, which comes in contact with one of the source 13 and the drain 14 or both of them, is removed by etching, and the silicon substrate and the silicon oxide film are left without etching by utilizing the difference in etching rate between the silicon substrate and a p-type impurity doped silicon layer. As a result, a leak current can be shut off through the intermediary of the silicon substrate 11 which comes in contact with the source 13 and the drain 14.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a semiconductor device, and more particularly to a quantization function element and a method for manufacturing the same.

[0002]

2. Description of the Related Art In recent years, research on a quantizing functional element utilizing the quantum effect has been advanced. As one of them, there is a need for a structure including a quantum wire having a size of about the wavelength of an electron and a method for forming the structure. As one of the structures including such a quantum wire, there is one that forms a wiring by a quantum wire between a source and a drain, forms an element including a gate electrode between them, and controls a weak current between the source and the drain by a gate voltage. It is considered. However, the conventional technique has a problem in that it is difficult to suppress the leakage current flowing from the quantum wire and the source and drain at both ends of the wire through the substrate, which adversely affects the purpose of controlling the current conducted in the quantum wire.

An example of the above-described conventional quantum wire forming technique will be described below with reference to the drawings. FIG. 3 shows an outline of a conventional quantum wire and its forming technique. An N-type substrate is used as the silicon substrate. Silicon substrate 3
Etching is performed on the first surface using the first etching mask to form a reverse taper type groove 32 having a line and space of 800 nm and a length of 2 μm. (Fig. 3 (a), (a '),
(a ")) Next, the structure including the groove 32 is anisotropically etched with ethylenediamine to form a ridge structure 31a and an inverted triangular structure 38 having a side of about 100 nm at the apex (Fig. 3 (b), (b '), (b ")) Further, the surface of the silicon substrate including the above structure is thermally oxidized to form a second silicon oxide film 35, and at the same time, each side of the inverted triangular structure 38 is about 50 nm. To form the quantum wire 36. Further, the first silicon oxide film on the surface of the silicon substrate which is in contact with both ends of the quantum wire is removed by hydrofluoric acid etching into a square of 10 μm * 10 μm. Then, the P-type impurity B is implanted to form the source 33 and the drain 34.
(FIG. 11) Hereinafter, the quantum wire 36, the source 33, the drain 34, and the ridge structure 31 a will be collectively referred to as a “structure including quantum wires”.

[0004]

In the structure described above, the quantum wires 36 are insulated by the second oxide film 35 in the directions other than the lengthwise direction, whereas the structure including the quantum wires and the silicon. It cannot be insulated from the substrate 31. for that reason,
There is a problem that it is difficult to suppress the leak current flowing through the silicon substrate 31 from the structure including the quantum wires.

In view of the above-mentioned problems, the present invention has a quantum wire 36.
It is an object of the present invention to provide a method for manufacturing an element structure in which a structure including the above and the silicon substrate 31 are insulated from each other and a leak current does not occur.

[0006]

In order to solve the above-mentioned problems, a method of manufacturing a semiconductor device according to the present invention provides a structure including the quantum wires for insulating a structure including the quantum wires from a silicon substrate. It is provided with a structure in which the lower silicon substrate is removed by etching to interrupt the path of the leak current.

[0007]

According to the present invention, with the above-described structure, the portion of the silicon substrate below the structure including the quantum wires is removed, and the structure including the quantum wires is surrounded by the first silicon oxide film to form the quantum wires. And the silicon substrate is the first
By making contact only through the silicon oxide film, it is possible to cut off the leak current from the structure including the quantum wires through the silicon substrate. Further, the structure including the quantum wires can be supported on the silicon substrate by the first silicon oxide film.

[0008]

(Embodiment 1) A semiconductor device and a method of manufacturing the same according to Embodiment 1 of the present invention will be described below with reference to the drawings.

FIG. 1 shows a semiconductor device and a method of manufacturing the same in an embodiment of the present invention. A first silicon oxide film 17 having a width of 5 μm and surrounding a rectangular region of 30 μm in length and 10 μm in width is formed on the surface of the N-type silicon substrate 11, and a reverse taper type with a line and space of 800 nm and a length of 2 μm is formed in the region. The groove 12 is formed. (Fig. 1 (a), (a '),
(a ")) Next, using the conventional technique, the ridge structure 11a and the diameter 100
An inverted triangular structure 18 of nm is formed. (Fig. 1 (b), (b '),
(b ")) Also using conventional techniques, length 2 um, size 5
A quantum wire 16 of 0 nm is formed, and a p-type impurity B is formed on both ends thereof.
Are implanted to form the source 13 and the drain 14. (FIGS. 1 (c), (c '), and (c ")) Next, using a kind of amine-based etchant, ethylenediamine, etching is performed from the back surface of the substrate to obtain a structure including the quantum wires in the silicon substrate 11. The contact portion is removed, but the structure including the quantum wires is left unetched by utilizing the etching selection ratio between the silicon and the silicon oxide film and the silicon and the P-type silicon layer (FIG. 1 (d), ( d ′), (d ″)) As a result, the structure including the quantum wire is surrounded by the first silicon oxide film 17, and the quantum wire is removed by removing the portion of the silicon substrate 11 in contact with the structure including the quantum wire. A leak current through the silicon substrate 11 can be cut off from the structure including the above.

(Second Embodiment) A semiconductor device manufacturing method according to a second embodiment of the present invention will be described below with reference to the drawings.

FIG. 2 shows a method of manufacturing a semiconductor device according to an embodiment of the present invention. A first silicon oxide film 27 having a width of 5 μm is formed on the surface of the N-type silicon substrate 21 so as to surround a rectangular region having a length of 30 μm and a width of 10 μm. Where source 2
3. The small regions 211 of 1 μm in length and width and 1 μm are provided at equal intervals around the drain 24, the first silicon oxide film 27 is not formed in the small regions 211, and the silicon substrate 21 is exposed. (FIGS. 2 (a), (a '), (a ")) Next, a ridge structure 21a and an inverted triangular structure 28 having a diameter of 100 nm are formed by a conventional technique (FIGS. 2 (b), (b). '), (B ")) Similarly, a quantum wire 26 having a length of 2 μm and a dimension of 50 nm is formed by using the conventional technique, and a P-type impurity B is implanted into both ends of the quantum wire 26 to form a source 23 and a drain 24. Form. (Fig. 2 (c),
(c ′), (c ″)) Here, a third oxide film 212 is formed to a thickness of 200 nm so as to protect the surface of the silicon substrate 21 around the region surrounded by the first silicon oxide film, and is then dried. By etching, the small region is etched, thereby forming a recess having a depth of 400 nm in the small region, and then anisotropically etching from the small region 211 with ethylenediamine to form a structure including the thin line. A cavity 29 is formed on the lower side, so that it is possible to form a structure in which only the first silicon oxide film exists between the structure including the thin line and the silicon substrate 21 (FIG. 2).
(d), (d '), (d ")) As a result, the first silicon oxide film 2
By surrounding the structure including the thin wire with 7, and removing the portion of the silicon substrate 21 in contact with the structure including the quantum wire, the leakage current from the structure including the quantum wire through the silicon substrate 21 can be blocked.

[0012]

As described above, according to the present invention, the silicon substrate in contact with the structure including the quantum wires is removed and the periphery of the structure is surrounded by the first insulating film, so that the leakage from the structure through the surface of the silicon substrate. The current can be cut off.
Further, the structure including the thin wires can be supported on the silicon substrate by the first insulating film.

[Brief description of drawings]

FIG. 1 is a configuration diagram of a semiconductor device and a manufacturing method thereof according to a first embodiment of the present invention.

FIG. 2 is a configuration diagram of a semiconductor device and a manufacturing method thereof according to a second embodiment of the present invention.

FIG. 3 is a configuration diagram of a semiconductor device and a method of manufacturing the same in a third embodiment of the present invention.

[Explanation of symbols]

 11 Silicon Substrate 11a Ridge Structure 12 Groove 13 Source 14 Drain 15 Second Silicon Oxide Film 16 Quantum Wire 17 First Silicon Oxide Film 18 Inverse Triangle Structure 19 Cavity 21 Silicon Substrate 21a Ridge Structure 22 Groove 23 Source 24 Drain 25 Second Oxide Film 26 Quantum Wire 27 First Silicon Oxide Film 28 Inverse Triangular Structure 29 Cavity 31 Silicon Substrate 31a Ridge Structure 32 Groove 33 Source 34 Drain 35 Second Silicon Oxide Film 36 Quantum Wire 37 First Silicon oxide film 38 Inverted triangular structure 39 Cavity 112 First etching mask 113 Second etching mask 210 Third silicon oxide film 211 Small region 212 First etching mask 213 Second etching mask 312 First etching mask 313 second etch Gumasuku

─────────────────────────────────────────────────── ─── Continuation of the front page (51) Int.Cl. ⁵ Identification number Internal reference number FI Technical display location H01L 29/66 (72) Inventor Juro Yasui 1006 Kadoma, Kadoma City, Osaka Prefecture Matsushita Electric Industrial Co., Ltd. (72) Inventor Kenji Okada 1006 Kadoma, Kadoma City, Osaka Prefecture Matsushita Electric Industrial Co., Ltd.

Claims (7)

[Claims] 1. A first substrate surrounding a predetermined region on a silicon substrate.
The first insulating film having an insulating film of, and an element including a channel part through which carriers can be conducted and source and drain parts connected to both ends thereof in the region and formed from the source and drain parts over the silicon substrate. A semiconductor device having a structure of being connected to a semiconductor substrate according to. Hereinafter, the channel portion in which the carriers can be conducted is referred to as a conduction channel. 2. The semiconductor device according to claim 1, further comprising a second insulating film around the conduction channel. 3. The semiconductor device according to claim 1, wherein a quantum wire is used as the conduction channel. 4. A first substrate surrounding a predetermined region on a silicon substrate.
First step of forming an insulating film, a second step of forming a conductive channel in the region, a third step of forming a second insulating film around the conductive channel, and the conductive channel A fourth step of implanting impurities into both ends of the source and the drain to form a source and a drain, the conduction channel and the source,
2. The method according to claim 1, further comprising a fifth step of etching a structure including a drain from a rear surface direction of the silicon substrate and removing a part of the silicon substrate in contact with one or both of the source and the drain. Of manufacturing a semiconductor device of. 5. A method of removing a part of a silicon substrate contacting one or both of the source and drain, instead of performing etching from the back side of the silicon substrate,
Several regions are provided on the silicon substrate at predetermined positions inside the insulating film of, and etching is performed from the regions, and the cavities formed by the etching are circulated under the structure including the conduction channel, the source and the drain. The method of manufacturing a semiconductor device according to claim 4, wherein a method is used. 6. A method for removing only a part of a silicon substrate in contact with one or both of the source and the drain without damaging the structure including the conduction channel, the source, and the drain by etching, and silicon and the first method, respectively. 5. The semiconductor device according to claim 4, wherein the silicon substrate is selectively etched by utilizing the difference in etching rate between the insulating film, the silicon and the second oxide film, and the silicon substrate and the source and drain. Manufacturing method. 7. The method of manufacturing a semiconductor device according to claim 6, wherein an amine-based etching solution is used as an etcher used for the selective etching.