JPH06252301A - Electronic device - Google Patents

Abstract

PURPOSE:To raise the heat dissipating efficiency by a method wherein the area of a heat dissipating fin is made wider than that of a cap covering a semiconductor chip and bonded onto the rear surface of the same. CONSTITUTION:A semiconductor chip 4 is connected facedown to the main surface of a package substrate 2 comprising a wiring substrate through the intermediary of solder bumps 3. On the other hand, the main surface of the package substrate 2 is sealed with a cap 6 covering the semiconductor chip 4 through the intermediary of a sealing solder 5. Next, a heat dissipating fin 7 is fixed on the cap 6 furthermore leads 8 as outer terminals are fixed to the main surface of the package substrate 2. At this time, the flat main body 12 of the semiconductor chip 4 is formed wider than the other cap 6 part in the same size as that of the heat dissipating fin 7. In such a constitution, the heat dissipating efficiency can be raised thereby enabling the title electronic device to be made applicable to a cooling system in a simple mechanism.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION The present invention relates to an electronic device, particularly an LSI.
(Large-scale integrated circuit) Cooling technology for electronic devices (microchip carriers) incorporating semiconductor chips that generate high heat.

[0002]

2. Description of the Related Art Semiconductor devices such as ICs (integrated circuits) and LSIs used in computers are required to have high reliability. For example, in the December 10, 1990 issue of Nikkei Electronics, "Nikkei Electronics", P209 to P241, "Processing Method and Hardware Technology of Large Computer M-880," the mounting structure of an LSI incorporated in a computer is described. There is. In addition, the same content is published by Hitachi Hyoronsha "Hitachi Hyoron", No. 1991, No. 2, February 25, the same year, P41
~ P48 "Super Large Processor Group" HITAC M-8
80 "Hardware Technology". The necessary parts are summarized below.

According to these documents, the instruction processor and the LSI chip of the system controller constituting the computer are newly developed MCC (micro carrier for micro carrier for).
It is sealed in a package called LSI chip). The large processor board that makes up the instruction processor is a multilayer printed circuit board of 46 layers (the size is 730 mm x 534 m).
m) and 20 arranged on one surface of this multilayer printed circuit board.
Each module connector, a high-density module attached to these module connectors, a cooling mechanism for circulating cooling water in a water cooling jacket of the high-density module, and the like. The water cooling jacket made of copper is provided with joints at two locations, and pipes are connected to these joints. In the case of a water cooling jacket, the pipe of one fitting is connected to the inlet pipe or the fitting of the water cooling jacket of the upstream high-density module, and the pipe of the other fitting is the fitting of the water cooling jacket of the downstream high-density module or It is connected to a water pipe on the take-out side, and cooling is performed by circulating cooling water.

The high-density module comprises a multilayer ceramic substrate (module substrate) mainly composed of 44 layers of AlN, and 36 to 41 MCCs mounted on the module substrate.
And a ceramic (AlN: aluminum nitride) small fin (microfin) mounted on the MCC, and a ceramic cap (module) that is airtightly attached to the module substrate and covers the MCC and the like. Cap) and a water cooling jacket which contacts the module cap through a thermal grease. The number of layers of the module substrate is two layers on the front and back sides and one signal
There are a total of 44 layers, 8 layers, 11 layers for matching, and 13 layers for power supply / grounding. The surface layer has approximately 40,000 patterns such as MCC bonding pads, repair patterns for design changes and manufacturing defects, and probing pads for in-circuit testing. Further, on the back surface layer of the module substrate, there are prepared a brazing pad for the terminal pin and a back surface repairing pad. The total number of terminal pins on the back surface is 2521.
The terminal pins have a 2.7 mm pitch face-centered lattice arrangement. The space between adjacent pins is 1.91 mm. On the other hand, the upper part of the micro fin has a comb tooth-shaped cut (lower comb tooth), and the inner surface (ceiling surface) of the module cap facing the MCC has a comb tooth-shaped cut (upper comb tooth). Teeth) are inserted, and the upper and lower comb teeth mesh with each other to transfer heat. Further, He gas is filled in the ceramic cap in order to secure thermal conductivity and an inert atmosphere, and heat is dissipated via He gas in a minute gap between the comb teeth. Module size is 106
mm square.

The MCC is an MCC substrate made of mullite ceramic (coefficient of thermal expansion 3.5 × 10 ⁻⁶ / ° C) and silicon (Si) mounted (flip-chip) on the MCC substrate via solder bumps. : Coefficient of thermal expansion 3.0 × 1
LSI chip consisting of 0 ^-6 / ° C) and AlN which covers the LSI chip and is solder-sealed on the MCC substrate
It is composed of an MCC cap (AlN cap) having a thermal expansion coefficient of 3.8 × 10 ⁻⁶ / ° C. and a solder bump provided on the exposed surface (lower surface) of the MCC substrate. Further, the back surface of the LSI chip is connected to the ceiling of the MCC cap by soldering for heat dissipation (heat transfer). The MCC substrate includes a thick film conductor 7 layer and a thin film conductor 5
Layer / thin film resistor consisting of a thick film / thin film hybrid substrate structure and bump pitch of LSI chip (25 min minimum)
(0 μm interval) and the grid pitch (450 μm grid for solder bumps) of the module substrate on which the MCC is mounted are matched. The MCC has a size of 10 to 12 mm square, and the total number of terminals is 528 pins. Terminals (pins) are assigned to 252 pins for LSI signals, 99 pins for terminating resistors, and the remaining power pins, ground pins, and monitor pins.

The solder material used for connection and sealing is selected so that the solder bumps of the LSI chip have the highest melting point and the solder that seals the module cap has the lowest melting point. The temperature hierarchy in the process is added to increase the reliability of the connection.

The heat generated in the LSI chip is transferred to the MCC cap through the solder on the back surface of the LSI chip. MC
The heat transmitted to the C cap is transmitted to the micro fin, the module cap, the grease, and the water cooling jacket, and is released to the cooling water. As a result, the thermal resistance from the LSI junction to the cooling water is 2 ° C./W or less.

Further, Japanese Patent Laid-Open No. 63-310139 discloses a CPU (Central CPU) of an ultra-high speed main frame computer.
There is disclosed a structure (microchip carrier) in which a semiconductor chip constituting a Processing Unit) is sealed in a package by a carrier having a multilayer wiring board structure and a cap. The microchip carrier described in this document includes a carrier made of ceramic such as mullite, a multilayer wiring layer provided on the carrier, and a semiconductor chip connected to the multilayer wiring layer via a bump electrode.
The semiconductor chip includes a cap formed of AlN or SiC that is soldered to the carrier and covers the semiconductor chip, the back surface of the semiconductor chip is bonded to the cap by solder, and bump electrodes are provided on the bottom surface of the carrier. It is provided. This microchip carrier is mounted on a mounting substrate, and a lower radiation fin is attached on the cap, and is cooled by air cooling or heat transfer for use. The cap and the lower radiating fin have the same size. This document also describes the assembly of the microchip carrier.

On the other hand, in optical communication, a large capacity, long distance transmission system is being developed. For example, “Hitachi Criticism”, No. 9, 1989, issued by Hitachi Hyoronsha, published on September 25, the same year, P
39 to P46 describe a 2.4 G to 10 Gbit / sec optical transmission system. Also, the same issue, P53-P
Reference 60 describes an optical communication LSI. The document discloses a transmission IC compatible with 600 Mbit / sec and 2.4 Gbit / sec as an ultra-high-speed transmission IC.

[0010]

In the electronic device referred to as the MCC or the microchip carrier as described above, the package is made smaller and smaller due to the improvement of the mounting density. Regarding heat dissipation, the main heat dissipation surface is the flat top surface of the cap. Therefore, in an electronic device mounted with an LSI chip that is a high heating element,
It is necessary to adopt a liquid cooling system with high cooling efficiency. However, this liquid cooling method has the dislike of large-scale equipment.

On the other hand, the present inventor is examining a package structure including cooling of a digital IC for optical transmission. Since a 10 Gbit / sec optical transmission digital IC also generates high heat, adoption of the MCC structure is being considered. However, as described above, the liquid cooling method has a dislike of large-scale equipment. By the way, in the MCC disclosed in the above document, the MCC cap is smaller than that of the micro fin which is a radiator. Therefore, the present inventor has realized that the heat dissipation efficiency can be further improved by improving the heat transfer in the cap portion, and has made the present invention.

An object of the present invention is to provide an electronic device having high heat dissipation efficiency. The above and other objects and novel features of the present invention will be apparent from the description of the present specification and the accompanying drawings.

[0013]

The outline of the representative ones of the inventions disclosed in the present application will be briefly described as follows. That is, the electronic device of the present invention includes a package substrate including a wiring substrate having external electrode terminals, a semiconductor chip mounted on the upper surface of the package substrate via bump electrodes, and airtightly bonded to the upper surface of the package substrate. While having the cap that is covered with the semiconductor chip and is bonded to the back surface of the semiconductor chip via a bonding material, and a heat radiation fin having a larger area than the cap attached to the upper surface of the cap via the bonding material, The cap portion from the back surface of the semiconductor chip to the heat radiation fin is wider than other cap portions,
Moreover, it has the same size as the heat radiation fin.

In another embodiment of the present invention, the cap and the radiation fin are integrally formed.

[0015]

According to the above-mentioned means, although the lower portion of the cap of the electronic device of the present invention is smaller than the radiation fin,
The cap portion on the back surface of the semiconductor chip is large in area and has the same size as the heat radiation fin. The heat generated in the semiconductor chip is transferred from the bonding material on the back surface of the semiconductor chip to the cap, and then to the heat radiation fins for heat dissipation, but since the cap part on the back surface of the semiconductor chip is wide, the heat transfer area And the heat dissipation efficiency is increased.

[0016]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS An embodiment of the present invention will be described below with reference to the drawings. 1 is a sectional view showing an essential part of an electronic device according to an embodiment of the present invention, FIG. 2 is a sectional view showing an essential part of a mounted state of the electronic device of the present invention, and FIGS. 3 to 6 are electronic devices of the present invention. FIG. 4 is a cross-sectional view showing the main part in each manufacturing process, FIG. 3 is a cross-sectional view showing a state before the semiconductor chip is mounted on the package substrate, and FIG. 4 is a cross-sectional view showing the state where the semiconductor chip is mounted on the package substrate. 5 is a cross-sectional view showing a state in which a cap is combined with the package substrate, and FIG. 6 is a cross-sectional view showing a state in which the cap is bonded to the package substrate.

In this embodiment, an electronic device incorporating a 10 Gbit / sec optical transmission digital IC will be described. As shown in FIG. 1, an electronic device 1 of the present invention includes a package substrate 2 having a multilayer wiring structure and a solder bump (electrode terminal) 3 on a main surface (upper surface) of the package substrate 2 by face-down bonding. The connected semiconductor chip 4, the cap 6 adhered to the main surface of the package substrate 2 via the solder (sealing solder) 5 so as to cover the semiconductor chip 4, and the cap 6 mounted on the cap 6. Further, a heat radiation fin 7 and a lead 8 as an external terminal attached to the main surface of the package substrate 2 are attached. Further, the back surface of the semiconductor chip 4 is adhered to the ceiling portion of the flat main body 12 of the cap 6 with solder (heat transfer solder) 10.

The package substrate 2 has a multilayer wiring structure made of mullite ceramic (coefficient of thermal expansion: 3.5 × 10 ^-6 / ° C). This is the semiconductor chip 4
Is silicon (Si: coefficient of thermal expansion 3.0 × 10 ⁻⁶ / ° C)
This is because the thermal expansion coefficient is matched because it is formed of. Although not shown, the solder bumps 3 of the semiconductor chip 4 are provided on the main surface (upper surface) of the package substrate 2.
An electrode pad is provided corresponding to. Further, a connection pad (not shown) is also provided in the periphery, and the inner end portion of the lead 8 is electrically connected to this connection pad. The electrode pad and the connection pad are electrically connected by an inner layer wiring 9 arranged inside the package substrate 2.

The semiconductor chip 4 comprises an LSI which constitutes a 10 Gbit / sec optical transmission digital IC.
The solder bumps 3 provided on the main surface (lower surface) of the semiconductor chip 4 contain Pb containing, for example, about 1 to 3% by weight of Sn.
/ Sn alloy (melting temperature is about 320 to 327 ° C.).

The cap 6 has, for example, a coefficient of thermal expansion of 3.
A flat main body 12 made of high thermal conductive ceramic such as aluminum nitride (AlN) having a temperature of 8 × 10 ⁻⁶ / ° C.
And a frame-shaped leg portion 11 provided on one surface side of the main body 12.
It consists of The tip surface of the leg portion 11 faces the main surface of the package substrate 2, and the leg portion 11
The portion is connected to the package substrate 2 with the sealing solder 5. The back surface of the semiconductor chip 4 is adhered to the flat body 12 of the cap 6 by the heat transfer solder 10. this is,
This is because the heat generated in the semiconductor chip 4 is transferred to the cap 6 through the heat transfer solder 10. The heat transfer solder 10
In order to improve the wettability of the cap 6, a metallization layer (not shown) is provided at a portion of the main body 12 of the cap 6 facing the back surface of the semiconductor chip 4. The sealing solder 5 and the heat transfer solder 10 are, for example, about 10% by weight of S.
Pb / Sn alloy containing n (melting temperature is 275-30
Au containing about 0 ° C.) or about 20 wt% Sn
/ Sn alloy (melting temperature is 280 ° C),
The melting point is lower than that of the sealing solder 5.

On the other hand, this is one of the features of the present invention. The semiconductor chip 4 of the cap 6 to the heat radiation fin 7 are used.
Up to, that is, the flat main body 12 of the cap 6 is formed wide in area and has the same size as the heat radiation fin 7 (the vertical and horizontal dimensions match the heat radiation fin 7). In general,
The leg portion 11 of the cap has a structure provided along the periphery of the flat main body 12 of the cap 6, and the tip surface of the leg portion 11 facing the package substrate 2 is attached to the package substrate 2 by the sealing solder 5. Fixed. On the other hand, in the present invention, since the leg portion 11 is provided in the middle of the flat body 12 of the cap 6, the periphery of the flat body 12 has a structure protruding beyond the leg portion 11. The MC
With C cap, the size of the cap is 10 mm □ to 12 m
It becomes m □. In the cap 6 of the present invention, the outer dimension of the portion facing the package substrate 2, that is, the leg portion 11 is 10 mm □ to 12 mm □ as in the conventional cap.
The size of the flat body 12 of the cap 6 is 2-3 on one side.
It is wider by about mm, and is wider by about 4 to 6 mm as a whole. As a result, when the heat generated in the semiconductor chip 4 is transferred to the flat body 12 of the cap 6, the heat is transferred to the heat radiation fins 7 while spreading rapidly. Therefore, in the case of a conventional cap smaller than the heat radiation fins 7, The heat dissipation becomes higher in comparison. With this structure, an electronic device incorporating an LSI that constitutes a 10 Gbit / sec optical transmission digital IC can operate sufficiently stably with air cooling without using a water cooling structure.

The radiating fin 7 is made of an aluminum alloy having a good thermal conductivity, for example, duralumin, and has a flat body portion 15 and a fin 16. The fins 16 have a thickness and interval of 2-3 mm and a length of 30 m.
It is more than m. The heat radiation fin 7 is used by being bonded with solder or grease. When the solder is thin, the thermal resistance is small and the heat dissipation efficiency is not reduced.

As shown in FIG. 2, such an electronic device 1 is mounted on a mounting board 20 for use. Mounting board 2
0 has a wiring board structure, although the inside is not described in detail, and leads 8 of the electronic device 1 are connected to a wiring layer portion (not shown).

Next, the assembly of the electronic device 1 will be described with reference to FIGS. At first,
As shown in FIG. 3, the solder bumps 3 formed on the main surface of the semiconductor chip 4 are accurately positioned on the electrode pads (not shown) on the main surface of the package substrate 2. This positioning is performed using a machine such as a chip mounter device. Next, the package substrate 2 is transferred to a reflow furnace (not shown). The inside of the reflow furnace is in an atmosphere of an inert gas such as nitrogen or argon in order to prevent the surface of the solder bump 3 from being oxidized. Then, the temperature inside the furnace is set slightly higher than the melting temperature of the solder bumps 3 (about 340 to 350 ° C.) to heat and melt the solder bumps 3, so that the semiconductor chip 4 is placed on the main surface of the package substrate 2. Face down bonding is performed (see FIG. 4).

Next, as shown in FIG. 5, sealing is performed. The cap 6 is placed on the lower jig 30 while being turned upside down. The lower jig 30 is formed of AlN so that the thermal expansion coefficient of the lower jig 30 matches that of the cap 6. In the center of the main surface of the lower jig 30, an accommodation recess 31 for mounting the cap 6 is provided. An escape space 32 is provided in the middle of the accommodation recess 31 so that the leads 8 do not come into contact with each other. Next, the solder preform 33 having a predetermined volume is placed on the metallized layer of the cap 6, and the semiconductor chip 4 is positioned and placed thereon. Since the semiconductor chip 4 is attached to the package substrate 2 via the solder bumps 3, the back surface of the semiconductor chip 4 is placed on the solder preform 33.
An upper jig 35 is placed on the package substrate 2 protruding above the lower jig 30. This upper jig 35
Has a box shape that covers the upper and lower jigs 30 halfway, and a receiving piece 36 is provided on the peripheral edge portion thereof. Therefore, a ring-shaped weight 37 is placed on the receiving piece 36. By this, the cap 6, the solder preform 3
3. A predetermined pressing force is applied between the semiconductor chips 4.

In this state, it is conveyed to the reflow furnace. Inside the reflow furnace, in order to prevent reoxidation of the surface of the solder preform 33 and oxidation of the surface of the molten sealing solder 5,
For example, the atmosphere is filled with an inert gas such as nitrogen or a reducing gas obtained by adding hydrogen to nitrogen. And
The temperature in the furnace is set to a temperature range (about 310 ° C.) which is in a temperature range in which the solder bumps 3 do not melt and which is slightly higher than the melting temperature of the solder preform 33 in which the solder preform 33 melts. The reform 33 is heated and melted. As a result, when the solder preform 33 is melted, the semiconductor chip 4 is lowered until it comes into contact with the cap 6 under the load of the weight 37, and the amount of heat transfer solder and the cavity capacity are determined. A metallization layer (not shown) is provided in each of the region of the cap 6 to which the semiconductor chip 4 is bonded and the sealing region of the leg 11. Further, a metallization layer (not shown) is also provided in the sealing region on the package substrate 2 side. When the melted solder contacts the metallized layer on the inner wall surface of the leg 11 of the cap 6, the package substrate 2 and the cap 6
It is sucked into the gap of the sealing portion formed by the leg portion 11 of the sheet by surface tension. The melted solder sucked in spreads over the entire circumference along the leg portion 11 arranged in a ring shape due to the surface tension of the solder, and the sealing is completed. The remaining solder is heat transfer solder 10 for bonding the semiconductor chip 4 to the flat body 12 of the cap 6.
Becomes Part of the melted solder is attracted to the tips of the legs 11 by the thickness of the solder preform 33, the weight 3
7 weight, reflow temperature and time, etc. The electronic device 1 as shown in FIG. 1 can be obtained by taking out from the reflow furnace, removing the weight 37 and the upper / lower jig 30, and attaching the radiating fin 7.

[0027]

(1) The electronic device of the present invention has a structure in which the heat generated in the semiconductor chip is transmitted to the heat radiation fins via the body of the cap on the back surface of the semiconductor chip, but the body of the cap is different. Since the area is larger than that of the cap portion and the size is the same as that of the heat radiating fins, the heat transfer paths are increased and the heat dissipation efficiency is improved.

(2) According to the above (1), the electronic device of the present invention has an increased radiation effect, and depending on the LSI to be incorporated, a cooling device by air (air cooling) without a cooling device having a water cooling structure can be used without a cooling device. The effect that it can also be used in) is obtained.

(3) Due to the above (1) and (2), according to the present invention, it is also possible to provide an air-coolable electronic device (high-power LSI mounting structure) incorporating a 10 Gbit / sec optical transmission digital IC. The synergistic effect of being possible is obtained.

Although the invention made by the present inventor has been specifically described based on the embodiments, the present invention is not limited to the above embodiments, and various modifications can be made without departing from the scope of the invention. Needless to say, for example,
As shown in FIG. 7, the heat dissipation efficiency can be further improved by forming the cap and the radiation fin in an integrated structure. In this embodiment, the entire body is made of duralumin, and the cap 40 with the heat radiation fin is used. Also,
Although the external electrode terminals of the package substrate 2 are used as leads in the above-described embodiment, bump electrodes or the like may be used. Moreover, even if the present invention is applied to an MCC as it is, the MCC has a high heat dissipation efficiency.

In the above description, the invention mainly made by the present inventor is shown as an example of only face-down bonding with solder bumps which is a field of application which is the background of the invention, but it is also applicable to other bonding methods such as TAB. . INDUSTRIAL APPLICABILITY The present invention can be applied to an electronic device incorporating a semiconductor chip that requires at least cooling.

[Brief description of drawings]

FIG. 1 is a sectional view showing a main part of an electronic device according to an embodiment of the present invention.

FIG. 2 is a cross-sectional view showing a main part of a mounted state of an electronic device according to an embodiment of the present invention.

FIG. 3 is a cross-sectional view showing a state in which a semiconductor chip is mounted on a package substrate in manufacturing an electronic device according to an exemplary embodiment of the present invention.

FIG. 4 is a cross-sectional view showing a state in which a semiconductor chip is mounted on a package substrate in manufacturing an electronic device according to an exemplary embodiment of the present invention.

FIG. 5 is a cross-sectional view showing a state in which a cap is combined with a package substrate in manufacturing an electronic device according to an exemplary embodiment of the present invention.

FIG. 6 is a cross-sectional view showing a state in which a cap is adhered to a package substrate in manufacturing an electronic device according to an exemplary embodiment of the present invention.

FIG. 7 is a cross-sectional view showing a main part of an electronic device having a cap with a radiation fin according to another embodiment of the present invention.

[Explanation of symbols]

1 ... Electronic device, 2 ... Package substrate, 3 ... Solder bump,
4 ... Semiconductor chip, 5 ... Solder (sealing solder), 6 ... Cap, 7 ... Radiating fin, 8 ... Lead, 9 ... Internal wiring layer,
10 ... Solder (heat transfer solder), 11 ... Leg portion, 12 ... Main body (flat main body), 15 ... Main body portion, 16 ... Fin, 20
... Mounting board, 30 ... Lower jig, 31 ... Accommodation recess, 32 ... Escape space, 33 ... Solder preform, 35 ... Upper jig, 36
... Receiving piece, 37 ... Weight, 40 ... Cap with radiating fins.

Claims (2)

[Claims] 1. A package substrate comprising a wiring substrate having external electrode terminals, a semiconductor chip mounted on the upper surface of the package substrate via electrode terminals, and airtightly adhered to the upper surface of the package substrate and An electronic device having a cap that covers a semiconductor chip and is adhered to the back surface of the semiconductor chip, and a heat dissipation fin that has a larger area than the cap that is attached to the upper surface of the cap, the heat dissipation fin extending from the back surface of the semiconductor chip to the heat dissipation fin. The electronic device is characterized in that the cap portion is wider than the other cap portions and has the same size as the heat radiation fins. 2. The electronic device according to claim 1, wherein the cap and the radiation fin are integrally formed.