JPH06252207A - Method for mounting semiconductor chip - Google Patents

Method for mounting semiconductor chip

Info

Publication number
JPH06252207A
JPH06252207A JP5035131A JP3513193A JPH06252207A JP H06252207 A JPH06252207 A JP H06252207A JP 5035131 A JP5035131 A JP 5035131A JP 3513193 A JP3513193 A JP 3513193A JP H06252207 A JPH06252207 A JP H06252207A
Authority
JP
Japan
Prior art keywords
solder
semiconductor chip
chip
electrode
electrodes
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP5035131A
Other languages
Japanese (ja)
Inventor
Shigeru Kamiya
茂 神谷
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Yazaki Corp
Original Assignee
Yazaki Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Yazaki Corp filed Critical Yazaki Corp
Priority to JP5035131A priority Critical patent/JPH06252207A/en
Publication of JPH06252207A publication Critical patent/JPH06252207A/en
Pending legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/81Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a bump connector

Landscapes

  • Wire Bonding (AREA)

Abstract

PURPOSE:To provide a large tolerance of the height of a connecting bump forming the electrode of an IC chip while maintaining the connection strength between the IC chip and a liquid crystal display panel, and to prevent the occurrence of a crack in the connecting bump due to solder. CONSTITUTION:A solder foil 7 mounted on a conductor board 5 is heated and melt in a reducing gas atmosphere, a connecting bump 3 of an IC chip 1 is put in contact with a molten solder 7a to deposit the solder 7a on the connecting bump 3. With a solder part 7b on the tip of the connecting bump 3 on which the solder 7a is deposited being in contact with an electrode 19 on a liquid crystal display panel 17, the IC chip 1 is heated in a reducing gas atmosphere, thereby connecting the connecting bump 3 on the IC chip 3 with the electrode 19 on the liquid crystal display panel 17.

Description

【発明の詳細な説明】Detailed Description of the Invention

【0001】[0001]

【産業上の利用分野】この発明は、半導体チップを回路
基板に実装するための半導体チップの実装方法に関す
る。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a semiconductor chip mounting method for mounting a semiconductor chip on a circuit board.

【0002】[0002]

【従来の技術】近年では、半導体チップを液晶表示パネ
ルのガラス基板上のメタライズ化した透明電極にフェイ
スダウンにより直付けし、これにより実装面積の効率的
利用と配線の合理化を図ろうとしている。
2. Description of the Related Art In recent years, a semiconductor chip has been directly attached to a metallized transparent electrode on a glass substrate of a liquid crystal display panel by face down, whereby an efficient use of a mounting area and a rationalization of wiring are attempted.

【0003】このような半導体チップの実装方法として
は、例えば特開平2−199847号公報に記載された
ものがある。この方法は、まず半導体チップ上に形成し
た突起電極の先端を、支持フィルム上に設けた熱溶融形
導電性接着剤に加熱条件下で接触させて、この接着剤を
突起電極先端に付着させる。次に、この半導体チップの
突起電極先端を液晶表示パネルのガラス基板上の透明電
極に接触させた状態で、半導体チップを加圧、加熱する
と、突起電極先端の接着剤が溶融して突起電極と透明電
極とが接着剤を介して電気的に接続される。導電性接着
剤としては、熱溶融形のものを用いることで、加熱によ
り半導体チップの交換を可能とし、半導体チップのリペ
ア性をもたせている。
As a method of mounting such a semiconductor chip, for example, there is one described in Japanese Patent Application Laid-Open No. 2-199847. In this method, first, the tip of a protruding electrode formed on a semiconductor chip is brought into contact with a hot-melt conductive adhesive provided on a support film under heating conditions, and the adhesive is attached to the tip of the protruding electrode. Next, when the semiconductor chip is pressed and heated while the tip of the protruding electrode of this semiconductor chip is in contact with the transparent electrode on the glass substrate of the liquid crystal display panel, the adhesive at the tip of the protruding electrode melts The transparent electrode is electrically connected via an adhesive. By using a heat-melting type of conductive adhesive, the semiconductor chip can be replaced by heating, and the semiconductor chip has repairability.

【0004】一方、半導体チップの電極上に半田による
接続バンプを形成し、これをガラス基板上の透明電極に
接触させて半田を溶融させ接続固定する、いわゆるフリ
ップチップ法によるフェイスダウンボンディングは、1
964年にIBM社から発表され、その後各社で突起電
極、つまり半田バンプの材質、形成方法が開発されてき
た。このうち特開昭63−122155号公報には、半
導体チップのAl電極上に、Cr,Tiなどのバリア層
とCu,Auなどの接着強度強化層とからなる多層の中
間金属層を成膜後、球状の接続バンプを形成している。
この接続バンプは、In−Snを母材としてZn,S
b,Al,Ti,Cuなどの酸素親和力の大きい元素を
添加することで、透明電極上に無電解メッキ法あるいは
蒸着法により金属被膜を形成することなくダイレクトに
実装でき、製造コストが低下する。
On the other hand, face down bonding by the so-called flip chip method, in which connection bumps made of solder are formed on the electrodes of a semiconductor chip, and the bumps are brought into contact with transparent electrodes on a glass substrate to melt and fix the solder,
It was announced by IBM Corporation in 964, and since then, each company has developed the material and forming method of the bump electrode, that is, the solder bump. Among them, in JP-A-63-122155, after forming a multi-layered intermediate metal layer consisting of a barrier layer such as Cr and Ti and an adhesion strength enhancing layer such as Cu and Au on an Al electrode of a semiconductor chip. , Spherical connection bumps are formed.
This connection bump is made of In-Sn as a base material and is made of Zn, S.
By adding an element having a high oxygen affinity, such as b, Al, Ti, or Cu, it is possible to mount directly on the transparent electrode by electroless plating or vapor deposition without forming a metal film, and the manufacturing cost is reduced.

【0005】[0005]

【発明が解決しようとする課題】しかしながら、上記し
たような従来の半導体チップの実装方法では、前者の接
着剤を用いたものにあっては、接着強度が充分でないた
め、例えばガラス基板に実装された状態の半導体チップ
の全体を包む形で封止剤をコーティングし、このコーテ
ィング剤とガラス基板との接着力によって接続強度を強
化するなどの工程が必要となる。このため、従来の実装
方法では、作業工程が増えるうえ、突起電極の高さが高
すぎると半導体チップとガラス基板との間でコーティン
グ剤に亀裂が生じ、したがって突起電極の高さは±2μ
m程度と極めて厳しい公差に収めなければならず、製造
コストが高いものになる。また、後者の半導体チップの
Al電極上に球状の半田の接続バンプを形成するものに
あっては、一般的に熱衝撃などで球状の半田部にクラッ
クが生じやすく、導通不良を引き起こす可能性がある。
However, in the conventional method of mounting a semiconductor chip as described above, since the adhesive strength of the former adhesive is not sufficient, it is mounted on, for example, a glass substrate. It is necessary to coat the encapsulant so as to wrap the entire semiconductor chip in the opened state, and to strengthen the connection strength by the adhesive force between the coating agent and the glass substrate. Therefore, in the conventional mounting method, the number of working steps is increased, and if the height of the protruding electrode is too high, the coating agent is cracked between the semiconductor chip and the glass substrate, and therefore the height of the protruding electrode is ± 2 μm.
The manufacturing cost must be high because it must be within a very strict tolerance of about m. Further, in the latter case where the spherical solder connection bumps are formed on the Al electrodes of the semiconductor chip, cracks are likely to occur in the spherical solder portion due to thermal shock or the like, which may cause poor conduction. is there.

【0006】そこで、この発明は、半導体チップとガラ
ス基板との接続強度を高く維持しつつ半導体チップ上の
突起電極の高さの公差が大きく取れ、しかも半田による
接続部のクラックの発生を防止することを目的としてい
る。
Therefore, according to the present invention, while maintaining a high connection strength between the semiconductor chip and the glass substrate, the tolerance of the height of the protruding electrode on the semiconductor chip can be made large, and further, the occurrence of cracks at the connection portion due to solder can be prevented. Is intended.

【0007】[0007]

【課題を解決するための手段】前記目的を達成するため
に、この発明は、半導体チップ上に突起電極を形成する
一方、還元ガス雰囲気中で半田箔を加熱板上に載置して
加熱溶融し、この加熱溶融した半田に前記突起電極を接
触させて半田を突起電極に付着させ、半田が付着固化し
た突起電極を回路基板上の電極に接触させた状態で還元
ガス雰囲気中で加熱させて半田を溶融させ、溶融した半
田が固化することにより半導体チップ上の突起電極と回
路基板上の電極とを接続する。
In order to achieve the above-mentioned object, the present invention is to form a protruding electrode on a semiconductor chip while placing a solder foil on a heating plate in a reducing gas atmosphere and heating and melting. Then, the projecting electrodes are brought into contact with the heated and melted solder to attach the solder to the projecting electrodes, and the projecting electrodes having the solder adhered and solidified are heated in a reducing gas atmosphere in a state of being brought into contact with the electrodes on the circuit board. The protruding electrodes on the semiconductor chip and the electrodes on the circuit board are connected by melting the solder and solidifying the melted solder.

【0008】[0008]

【作用】このような半導体チップの実装方法によれば、
半導体チップ上の突起電極と回路基板との接続には半田
を用いているので、接着剤を使用するものに比べて接続
強度が高いものとなる。しかも、半田は単に突起電極上
に付着するだけであるので、突起電極の高さの公差をあ
る程度大きくしても問題はないうえ、熱衝撃を受けても
球状の半田部に比べてクラックが発生しにくいものとな
る。
According to such a semiconductor chip mounting method,
Since solder is used to connect the protruding electrode on the semiconductor chip to the circuit board, the connection strength is higher than that using an adhesive. Moreover, since the solder only adheres to the protruding electrodes, there is no problem if the tolerance of the height of the protruding electrodes is increased to some extent, and cracks occur even when subjected to thermal shock, as compared to spherical solder parts. It becomes difficult to do.

【0009】[0009]

【実施例】以下、この発明の実施例を図面に基づき説明
する。
Embodiments of the present invention will be described below with reference to the drawings.

【0010】図1(a)〜(d)は、この発明の一実施
例を示す半導体チップの実装方法の作業工程図である。
図1(a)では、半導体チップであるICチップ1上
に、突起電極であるAuからなる接続バンプ3を形成す
る。図1(b)では、加熱板となるCu板などの導体板
5上に、厚さ10〜50μm程度のSnまたはIn系の
半田箔7を載置し、この半田箔7を電源9,抵抗器11
及び電流計13を用いてN2 +H2 の還元雰囲気中で加
熱溶融する。図1(c)では、N2 +H2 の還元雰囲気
中で、接続バンプ3を形成したICチップ1をコレット
15により真空チャックし、接続バンプ3の先端を導体
板5上の溶融状態の半田7aに、矢印Aのように接近さ
せて接触させる動作を示している。接続バンプ3の先端
を半田7aに接触させることにより接続バンプ3の先端
に付着する半田は、接続バンプ3の高さの1/4〜1/
5程度でよい。
FIGS. 1A to 1D are work process diagrams of a semiconductor chip mounting method showing an embodiment of the present invention.
In FIG. 1A, the connection bumps 3 made of Au which is a protruding electrode are formed on the IC chip 1 which is a semiconductor chip. In FIG. 1B, a Sn or In-based solder foil 7 having a thickness of about 10 to 50 μm is placed on a conductor plate 5 such as a Cu plate serving as a heating plate, and the solder foil 7 is connected to a power source 9 and a resistor. Bowl 11
And using an ammeter 13 to heat and melt in a reducing atmosphere of N 2 + H 2 . In FIG. 1C, the IC chip 1 on which the connection bumps 3 are formed is vacuum-chucked by the collet 15 in a reducing atmosphere of N 2 + H 2 , and the tips of the connection bumps 3 are melted with solder 7a on the conductor plate 5. In the figure, an operation of bringing them into close contact with each other as shown by an arrow A is shown. The solder attached to the tips of the connection bumps 3 by bringing the tips of the connection bumps 3 into contact with the solder 7a is 1/4 to 1 / the height of the connection bumps 3.
5 is enough.

【0011】次に、図1(d)では、回路基板としての
液晶表示パネル17上のメタライズされた例えばAuメ
ッキなどによる電極19に、ICチップ1の接続バンプ
3先端に付着している半田部7bを接触させた状態で、
2 +H2 の還元雰囲気中でICチップ1を加熱し、接
続バンプ3先端の半田部7bを溶融させて接続する。こ
れにより、ICチップ1の接続バンプ3と液晶表示パネ
ル17の電極19との双方に半田が拡散し、両者の導通
が図れる。
Next, in FIG. 1D, the solder portion attached to the tip of the connection bump 3 of the IC chip 1 is attached to the metalized electrode 19 such as Au plating on the liquid crystal display panel 17 as a circuit board. With 7b in contact,
The IC chip 1 is heated in a reducing atmosphere of N 2 + H 2 to melt and connect the solder portion 7b at the tip of the connection bump 3. As a result, the solder diffuses into both the connection bumps 3 of the IC chip 1 and the electrodes 19 of the liquid crystal display panel 17, and the two can be electrically connected.

【0012】このような実装方法によれば、ICチップ
1上の接続バンプ3と液晶表示パネル17の電極19と
の接続には半田を用いているので、接続強度を強化する
ための封止剤をコーティングするなどの作業工程を必要
とすることなく、接続強度が高いものとなる。しかも、
半田部7bは単に接続バンプ3の先端に付着するだけで
あるので、接続バンプ3の高さの公差をある程度大きく
しても問題はないうえ、熱衝撃を受けても球状の半田部
に比べてクラックが発生しにくいものとなる。また、接
続バンプ3にはAuを用いているので、熱衝撃を受ける
際に接続バンプ3が緩衝材となり、半田部7bのクラッ
クなどの発生はより一層防止される。
According to such a mounting method, since solder is used to connect the connection bumps 3 on the IC chip 1 to the electrodes 19 of the liquid crystal display panel 17, a sealing agent for strengthening the connection strength is used. The connection strength is high without the need for working steps such as coating. Moreover,
Since the solder portion 7b simply adheres to the tips of the connection bumps 3, there is no problem even if the tolerance of the height of the connection bumps 3 is increased to some extent, and even if a thermal shock is applied, it is more than that of a spherical solder portion. It is difficult for cracks to occur. Further, since Au is used for the connection bumps 3, the connection bumps 3 serve as a cushioning material when receiving a thermal shock, and cracks and the like in the solder portion 7b are further prevented.

【0013】[0013]

【発明の効果】以上説明してきたように、この発明によ
れば、半導体チップ上の突起電極と回路基板との接続に
は半田を用いているので、接続強度を強化するための封
止剤をコーティングするなどの作業工程を必要とするこ
となく、接続強度を高めることができる。しかも、半田
は単に突起電極上に付着するだけであるので、突起電極
の高さの公差をある程度大きくすることができて製造コ
ストを低くすることができるうえ、熱衝撃を受けても球
状の半田部に比べてクラックが発生しにくいものとな
る。
As described above, according to the present invention, since the solder is used to connect the protruding electrode on the semiconductor chip and the circuit board, a sealant for strengthening the connection strength is used. The connection strength can be increased without requiring a working process such as coating. Moreover, since the solder only adheres to the bump electrodes, the tolerance of the height of the bump electrodes can be increased to some extent, which can reduce the manufacturing cost, and even when the solder bumps are subjected to thermal shock, the spherical solder can be used. Cracks are less likely to occur compared to the parts.

【図面の簡単な説明】[Brief description of drawings]

【図1】この発明の一実施例を示す半導体チップの実装
方法の作業工程図である。
FIG. 1 is a work process diagram of a semiconductor chip mounting method according to an embodiment of the present invention.

【符号の説明】[Explanation of symbols]

1 ICチップ(半導体チップ) 3 接続バンプ(突起電極) 5 導体板(加熱板) 7 半田箔 17 液晶表示パネル(回路基板) 19 電極 1 IC Chip (Semiconductor Chip) 3 Connection Bump (Protruding Electrode) 5 Conductor Plate (Heating Plate) 7 Solder Foil 17 Liquid Crystal Display Panel (Circuit Board) 19 Electrode

─────────────────────────────────────────────────────
─────────────────────────────────────────────────── ───

【手続補正書】[Procedure amendment]

【提出日】平成5年8月4日[Submission date] August 4, 1993

【手続補正1】[Procedure Amendment 1]

【補正対象書類名】明細書[Document name to be amended] Statement

【補正対象項目名】0012[Correction target item name] 0012

【補正方法】変更[Correction method] Change

【補正内容】[Correction content]

【0012】このような実装方法によれば、ICチップ
1上の接続バンプ3と液晶表示パネル17の電極19と
の接続には半田を用いているので、接続強度が高いもの
となる。しかも、半田部7bは単に接続バンプ3の先端
に付着するだけであるので、接続バンプ3の高さの公差
をある程度大きくしても問題はないうえ、熱衝撃を受け
ても球状の半田部に比べてクラックが発生しにくいもの
となる。また、接続バンプ3にはAuを用いているの
で、熱衝撃を受ける際に接続バンプ3が緩衝材となり、
半田部7bのクラックなどの発生はより一層防止され
る。
According to such a mounting method, since solder is used to connect the connection bumps 3 on the IC chip 1 to the electrodes 19 of the liquid crystal display panel 17 , the connection strength is high. In addition, since the solder portion 7b simply adheres to the tip of the connection bump 3, there is no problem even if the tolerance of the height of the connection bump 3 is increased to some extent, and the solder portion 7b has a spherical shape even when it is subjected to thermal shock. Compared to this, cracks are less likely to occur. Further, since Au is used for the connection bumps 3, the connection bumps 3 serve as a cushioning material when receiving a thermal shock,
Generation of cracks or the like on the solder portion 7b is further prevented.

【手続補正2】[Procedure Amendment 2]

【補正対象書類名】明細書[Document name to be amended] Statement

【補正対象項目名】0013[Correction target item name] 0013

【補正方法】変更[Correction method] Change

【補正内容】[Correction content]

【0013】以上説明してきたように、この発明によれ
ば、半導体チップ上の突起電極と回路基板との接続には
半田を用いているので、熱溶融形導電性接着剤に比べ、
高い接続強度が得られる。しかも、半田は単に突起電極
上に付着するだけであるので、突起電極の高さの公差が
大きくてもよいため、突起電極の形状や高さを揃える必
要がないことから製造コストを低くすることができるう
え、熱衝撃を受けても球状の半田部に比べてクラックが
発生しにくいものとなる。
As described above, according to the present invention, solder is used to connect the projecting electrodes on the semiconductor chip to the circuit board. Therefore, as compared with the heat-melting type conductive adhesive,
High connection strength can be obtained. Moreover, since the solder only adheres to the protruding electrodes, the height tolerance of the protruding electrodes is small.
Since it may be large, it is necessary to align the shape and height of the protruding electrodes.
Since it is not necessary, the manufacturing cost can be reduced, and cracks are less likely to occur even when subjected to thermal shock, as compared with the spherical solder portion.

Claims (1)

【特許請求の範囲】[Claims] 【請求項1】 半導体チップ上に突起電極を形成する一
方、還元ガス雰囲気中で半田箔を加熱板上に載置して加
熱溶融し、この加熱溶融した半田に前記突起電極を接触
させて半田を突起電極に付着させ、半田が付着固化した
突起電極を回路基板上の電極に接触させた状態で還元ガ
ス雰囲気中で加熱させて半田を溶融させ、溶融した半田
が固化することにより半導体チップ上の突起電極と回路
基板上の電極とを接続することを特徴とする半導体チッ
プの実装方法。
1. A bump electrode is formed on a semiconductor chip, and a solder foil is placed on a heating plate in a reducing gas atmosphere and heated and melted. On the semiconductor chip by heating in a reducing gas atmosphere with the protruding electrode with the solder adhered and solidified in contact with the electrode on the circuit board to melt the solder and solidifying the melted solder. A method of mounting a semiconductor chip, characterized in that the protruding electrode of (1) and the electrode on the circuit board are connected.
JP5035131A 1993-02-24 1993-02-24 Method for mounting semiconductor chip Pending JPH06252207A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP5035131A JPH06252207A (en) 1993-02-24 1993-02-24 Method for mounting semiconductor chip

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP5035131A JPH06252207A (en) 1993-02-24 1993-02-24 Method for mounting semiconductor chip

Publications (1)

Publication Number Publication Date
JPH06252207A true JPH06252207A (en) 1994-09-09

Family

ID=12433380

Family Applications (1)

Application Number Title Priority Date Filing Date
JP5035131A Pending JPH06252207A (en) 1993-02-24 1993-02-24 Method for mounting semiconductor chip

Country Status (1)

Country Link
JP (1) JPH06252207A (en)

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